ES537900A0 - Un metodo de convertir una senal digital en una senal codificada en inverso sin vuelta a cero, especialmente aplicable a senales de audio - Google Patents
Un metodo de convertir una senal digital en una senal codificada en inverso sin vuelta a cero, especialmente aplicable a senales de audioInfo
- Publication number
- ES537900A0 ES537900A0 ES537900A ES537900A ES537900A0 ES 537900 A0 ES537900 A0 ES 537900A0 ES 537900 A ES537900 A ES 537900A ES 537900 A ES537900 A ES 537900A ES 537900 A0 ES537900 A0 ES 537900A0
- Authority
- ES
- Spain
- Prior art keywords
- zero
- digital signal
- return
- converting
- audio signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/14—Conversion to or from non-weighted codes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
- G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Dc Digital Transmission (AREA)
- Burglar Alarm Systems (AREA)
- Radar Systems Or Details Thereof (AREA)
- Analogue/Digital Conversion (AREA)
- Communication Control (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58221235A JPS60113366A (ja) | 1983-11-24 | 1983-11-24 | 情報変換方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| ES8607648A1 ES8607648A1 (es) | 1986-05-16 |
| ES537900A0 true ES537900A0 (es) | 1986-05-16 |
Family
ID=16763583
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES537900A Expired ES8607648A1 (es) | 1983-11-24 | 1984-11-23 | Un metodo de convertir una senal digital en una senal codificada en inverso sin vuelta a cero, especialmente aplicable a senales de audio |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US4577180A (es) |
| EP (1) | EP0143005B1 (es) |
| JP (1) | JPS60113366A (es) |
| KR (1) | KR930005644B1 (es) |
| AT (1) | ATE58270T1 (es) |
| AU (1) | AU564002B2 (es) |
| CA (1) | CA1227871A (es) |
| DE (1) | DE3483562D1 (es) |
| ES (1) | ES8607648A1 (es) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4833471A (en) * | 1984-03-26 | 1989-05-23 | Canon Kabushiki Kaisha | Data processing apparatus |
| US4775985A (en) * | 1987-04-06 | 1988-10-04 | Sony Corporation | Method of dc-free 8/9 nrz coding using a unique sync word pattern |
| JP2508491B2 (ja) * | 1987-09-28 | 1996-06-19 | ソニー株式会社 | デ―タ再生装置 |
| US4967289A (en) * | 1987-09-30 | 1990-10-30 | Sony Corporation | PCM signal recording apparatus |
| JPH01107373A (ja) * | 1987-10-21 | 1989-04-25 | Sony Corp | データ再生装置 |
| GB8912471D0 (en) * | 1989-05-31 | 1989-07-19 | Int Computers Ltd | Data transmission code |
| JPH0362621A (ja) * | 1989-07-31 | 1991-03-18 | Ricoh Co Ltd | データ変調方式 |
| DE69031701T2 (de) * | 1989-09-08 | 1998-03-12 | Fujitsu Ltd | Kodier- und Dekodierschaltung für lauflängenbegrenzte Kodierung |
| DE4011894A1 (de) * | 1990-04-12 | 1991-10-17 | Thomson Brandt Gmbh | Uebertragungsverfahren fuer ein binaersignal |
| EP0593173B1 (en) * | 1992-10-16 | 1998-11-11 | Matsushita Electric Industrial Co., Ltd. | Apparatus for recording digital signals by controlling frequency characteristics of digital signals |
| JP3528929B2 (ja) * | 1993-09-22 | 2004-05-24 | ソニー株式会社 | 磁気記録装置 |
| IL137950A0 (en) * | 1998-12-21 | 2001-10-31 | Koninkl Philips Electronics Nv | Device for encoding a stream of databits |
| US6492918B1 (en) * | 1999-09-30 | 2002-12-10 | Stmicroelectronics, Inc. | Code word having data bits and code bits and method for encoding data |
| DE102006056903B4 (de) * | 2006-12-02 | 2008-07-17 | Semikron Elektronik Gmbh & Co. Kg | Verfahren zur digitalen Kommunikation zwischen zwei Funktionsblöcken eines leistungselektronischen Bauteils |
| JP6197249B2 (ja) * | 2014-07-30 | 2017-09-20 | 日立建機株式会社 | 車両用動力伝達装置 |
| CN104682922A (zh) * | 2014-12-02 | 2015-06-03 | 国家电网公司 | 一种高速rz/nrz转换装置和nrz/rz转换装置 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1250908A (es) * | 1968-12-13 | 1971-10-27 | ||
| US4001811A (en) * | 1972-01-28 | 1977-01-04 | General Motors Corporation | Method and apparatus for coding and decoding digital information |
| NL7707540A (nl) * | 1977-07-07 | 1979-01-09 | Philips Nv | Inrichting voor het koderen van signalen die over een aantal kanalen worden verdeeld. |
| JPS5619506A (en) * | 1979-07-23 | 1981-02-24 | Sony Corp | Code converting method |
| JPS5665311A (en) * | 1979-10-27 | 1981-06-03 | Nippon Telegr & Teleph Corp <Ntt> | Magnetic recording and reproduction system for digital information |
| US4352129A (en) * | 1980-02-01 | 1982-09-28 | Independent Broadcasting Authority | Digital recording apparatus |
| NL186790C (nl) * | 1980-07-14 | 1991-02-18 | Philips Nv | Werkwijze voor het coderen van een reeks van blokken tweetallige databits in een reeks van blokken van tweetallige kanaalbits, alsmede modulator, demodulator en registratiedrager te gebruiken bij de werkwijze. |
| JPS57195308A (en) * | 1981-05-26 | 1982-12-01 | Sony Corp | Block coding method |
| JPH0683271B2 (ja) * | 1983-10-27 | 1994-10-19 | ソニー株式会社 | 情報変換方式 |
-
1983
- 1983-11-24 JP JP58221235A patent/JPS60113366A/ja active Granted
-
1984
- 1984-11-20 CA CA000468199A patent/CA1227871A/en not_active Expired
- 1984-11-20 US US06/673,374 patent/US4577180A/en not_active Expired - Lifetime
- 1984-11-23 KR KR1019840007359A patent/KR930005644B1/ko not_active Expired - Fee Related
- 1984-11-23 ES ES537900A patent/ES8607648A1/es not_active Expired
- 1984-11-23 DE DE8484308148T patent/DE3483562D1/de not_active Expired - Lifetime
- 1984-11-23 AT AT84308148T patent/ATE58270T1/de not_active IP Right Cessation
- 1984-11-23 EP EP84308148A patent/EP0143005B1/en not_active Expired - Lifetime
- 1984-11-23 AU AU35831/84A patent/AU564002B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0519226B2 (es) | 1993-03-16 |
| CA1227871A (en) | 1987-10-06 |
| AU564002B2 (en) | 1987-07-30 |
| DE3483562D1 (de) | 1990-12-13 |
| ES8607648A1 (es) | 1986-05-16 |
| JPS60113366A (ja) | 1985-06-19 |
| KR850005061A (ko) | 1985-08-19 |
| ATE58270T1 (de) | 1990-11-15 |
| KR930005644B1 (ko) | 1993-06-23 |
| EP0143005A3 (en) | 1987-04-01 |
| AU3583184A (en) | 1985-05-30 |
| US4577180A (en) | 1986-03-18 |
| EP0143005B1 (en) | 1990-11-07 |
| EP0143005A2 (en) | 1985-05-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FD1A | Patent lapsed |
Effective date: 20040916 |