ES413258A1 - A BINARY INFORMATION STORAGE DEVICE WITH OPTICAL DETECTION, IN AN INTEGRATED CIRCUIT. - Google Patents
A BINARY INFORMATION STORAGE DEVICE WITH OPTICAL DETECTION, IN AN INTEGRATED CIRCUIT.Info
- Publication number
- ES413258A1 ES413258A1 ES413258A ES413258A ES413258A1 ES 413258 A1 ES413258 A1 ES 413258A1 ES 413258 A ES413258 A ES 413258A ES 413258 A ES413258 A ES 413258A ES 413258 A1 ES413258 A1 ES 413258A1
- Authority
- ES
- Spain
- Prior art keywords
- charge
- region
- diffusion
- electric field
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001514 detection method Methods 0.000 title abstract 2
- 230000003287 optical effect Effects 0.000 title abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 4
- 230000005684 electric field Effects 0.000 abstract 4
- 239000000969 carrier Substances 0.000 abstract 3
- 239000004065 semiconductor Substances 0.000 abstract 3
- 239000012535 impurity Substances 0.000 abstract 2
- 239000000463 material Substances 0.000 abstract 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract 1
- 238000005401 electroluminescence Methods 0.000 abstract 1
- 230000006798 recombination Effects 0.000 abstract 1
- 238000005215 recombination Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/35—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices with charge storage in a depletion layer, e.g. charge coupled devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D44/00—Charge transfer devices
- H10D44/40—Charge-coupled devices [CCD]
- H10D44/45—Charge-coupled devices [CCD] having field effect produced by insulated gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
- H10H29/10—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
- H10H29/14—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 comprising multiple light-emitting semiconductor components
- H10H29/142—Two-dimensional arrangements, e.g. asymmetric LED layout
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Led Devices (AREA)
- Semiconductor Memories (AREA)
- Facsimile Heads (AREA)
Abstract
An integrated circuit optical detection binary information storage device comprising: a body of semiconductor material incorporating a first-type impurity for semiconductors, said semiconductor material being selected from the group of direct energy band consisting of GaAs and GaP, a region obtained by diffusion of an impurity of the second opposite type of conductivity in said body capable of introducing a charge inside said body, at least one charge storage electrode in close proximity to said region obtained by diffusion intended to exert an electric field within said body, means for selectively forming an inversion region between said region obtained by diffusion and the region of electric field underlying said charge storage electrode, a recombination electrode in close proximity to said charge storage electrode intended for exerting an electric field on said body, operating means to selectively transfer a charge of minority carriers from said region obtained by diffusion to the region underlying said charge storage electrodes, to retain said charge with the electric field established by the electrodes of storage of charge for a finite time, transferring the charge to the region under the re-combining electrode, and subsequently causing minority carriers of the charge to recombine with major carriers in the body to produce electroluminescence. (Machine-translation by Google Translate, not legally binding)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US24730072A | 1972-04-25 | 1972-04-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES413258A1 true ES413258A1 (en) | 1976-01-01 |
Family
ID=22934384
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES413258A Expired ES413258A1 (en) | 1972-04-25 | 1973-04-02 | A BINARY INFORMATION STORAGE DEVICE WITH OPTICAL DETECTION, IN AN INTEGRATED CIRCUIT. |
Country Status (10)
| Country | Link |
|---|---|
| JP (1) | JPS5212073B2 (en) |
| CA (1) | CA1003106A (en) |
| CH (1) | CH546461A (en) |
| DE (1) | DE2319714A1 (en) |
| ES (1) | ES413258A1 (en) |
| FR (1) | FR2181850B1 (en) |
| GB (1) | GB1414228A (en) |
| IT (1) | IT979035B (en) |
| NL (1) | NL7305263A (en) |
| SE (1) | SE389573B (en) |
Families Citing this family (58)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5428578A (en) * | 1977-08-08 | 1979-03-03 | Clarion Co Ltd | Semiconductor memory |
| EP1351307A1 (en) * | 2002-03-28 | 2003-10-08 | Innovative Silicon SA | Method of driving a semiconductor device |
| TWI230392B (en) | 2001-06-18 | 2005-04-01 | Innovative Silicon Sa | Semiconductor device |
| EP1355316B1 (en) | 2002-04-18 | 2007-02-21 | Innovative Silicon SA | Data storage device and refreshing method for use with such device |
| EP1357603A3 (en) | 2002-04-18 | 2004-01-14 | Innovative Silicon SA | Semiconductor device |
| US7085153B2 (en) | 2003-05-13 | 2006-08-01 | Innovative Silicon S.A. | Semiconductor memory cell, array, architecture and device, and method of operating same |
| US20040228168A1 (en) | 2003-05-13 | 2004-11-18 | Richard Ferrant | Semiconductor memory device and method of operating same |
| US6912150B2 (en) | 2003-05-13 | 2005-06-28 | Lionel Portman | Reference current generator, and method of programming, adjusting and/or operating same |
| US7335934B2 (en) | 2003-07-22 | 2008-02-26 | Innovative Silicon S.A. | Integrated circuit device, and method of fabricating same |
| US7184298B2 (en) | 2003-09-24 | 2007-02-27 | Innovative Silicon S.A. | Low power programming technique for a floating body memory transistor, memory cell, and memory array |
| US7476939B2 (en) | 2004-11-04 | 2009-01-13 | Innovative Silicon Isi Sa | Memory cell having an electrically floating body transistor and programming technique therefor |
| US7251164B2 (en) | 2004-11-10 | 2007-07-31 | Innovative Silicon S.A. | Circuitry for and method of improving statistical distribution of integrated circuits |
| US7301838B2 (en) | 2004-12-13 | 2007-11-27 | Innovative Silicon S.A. | Sense amplifier circuitry and architecture to write data into and/or read from memory cells |
| US7301803B2 (en) | 2004-12-22 | 2007-11-27 | Innovative Silicon S.A. | Bipolar reading technique for a memory cell having an electrically floating body transistor |
| US7606066B2 (en) | 2005-09-07 | 2009-10-20 | Innovative Silicon Isi Sa | Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same |
| US7355916B2 (en) | 2005-09-19 | 2008-04-08 | Innovative Silicon S.A. | Method and circuitry to generate a reference current for reading a memory cell, and device implementing same |
| US7683430B2 (en) | 2005-12-19 | 2010-03-23 | Innovative Silicon Isi Sa | Electrically floating body memory cell and array, and method of operating or controlling same |
| US7542345B2 (en) | 2006-02-16 | 2009-06-02 | Innovative Silicon Isi Sa | Multi-bit memory cell having electrically floating body transistor, and method of programming and reading same |
| US7492632B2 (en) | 2006-04-07 | 2009-02-17 | Innovative Silicon Isi Sa | Memory array having a programmable word length, and method of operating same |
| US7606098B2 (en) | 2006-04-18 | 2009-10-20 | Innovative Silicon Isi Sa | Semiconductor memory array architecture with grouped memory cells, and method of controlling same |
| US7933142B2 (en) | 2006-05-02 | 2011-04-26 | Micron Technology, Inc. | Semiconductor memory cell and array using punch-through to program and read same |
| US8069377B2 (en) | 2006-06-26 | 2011-11-29 | Micron Technology, Inc. | Integrated circuit having memory array including ECC and column redundancy and method of operating the same |
| US7542340B2 (en) | 2006-07-11 | 2009-06-02 | Innovative Silicon Isi Sa | Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same |
| WO2008090475A2 (en) | 2007-01-26 | 2008-07-31 | Innovative Silicon S.A. | Floating-body dram transistor comprising source/drain regions separated from the gated body region |
| WO2009031052A2 (en) | 2007-03-29 | 2009-03-12 | Innovative Silicon S.A. | Zero-capacitor (floating body) random access memory circuits with polycide word lines and manufacturing methods therefor |
| US8064274B2 (en) | 2007-05-30 | 2011-11-22 | Micron Technology, Inc. | Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same |
| US8085594B2 (en) | 2007-06-01 | 2011-12-27 | Micron Technology, Inc. | Reading technique for memory cell with electrically floating body transistor |
| WO2009039169A1 (en) | 2007-09-17 | 2009-03-26 | Innovative Silicon S.A. | Refreshing data of memory cells with electrically floating body transistors |
| US8536628B2 (en) | 2007-11-29 | 2013-09-17 | Micron Technology, Inc. | Integrated circuit having memory cell array including barriers, and method of manufacturing same |
| US8349662B2 (en) | 2007-12-11 | 2013-01-08 | Micron Technology, Inc. | Integrated circuit having memory cell array, and method of manufacturing same |
| US8773933B2 (en) | 2012-03-16 | 2014-07-08 | Micron Technology, Inc. | Techniques for accessing memory cells |
| US8014195B2 (en) | 2008-02-06 | 2011-09-06 | Micron Technology, Inc. | Single transistor memory cell |
| US8189376B2 (en) | 2008-02-08 | 2012-05-29 | Micron Technology, Inc. | Integrated circuit having memory cells including gate material having high work function, and method of manufacturing same |
| US7957206B2 (en) | 2008-04-04 | 2011-06-07 | Micron Technology, Inc. | Read circuitry for an integrated circuit having memory cells and/or a memory cell array, and method of operating same |
| US7947543B2 (en) | 2008-09-25 | 2011-05-24 | Micron Technology, Inc. | Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation |
| US7933140B2 (en) | 2008-10-02 | 2011-04-26 | Micron Technology, Inc. | Techniques for reducing a voltage swing |
| US7924630B2 (en) | 2008-10-15 | 2011-04-12 | Micron Technology, Inc. | Techniques for simultaneously driving a plurality of source lines |
| US8223574B2 (en) | 2008-11-05 | 2012-07-17 | Micron Technology, Inc. | Techniques for block refreshing a semiconductor memory device |
| US8213226B2 (en) | 2008-12-05 | 2012-07-03 | Micron Technology, Inc. | Vertical transistor memory cell and array |
| US8319294B2 (en) | 2009-02-18 | 2012-11-27 | Micron Technology, Inc. | Techniques for providing a source line plane |
| US8710566B2 (en) | 2009-03-04 | 2014-04-29 | Micron Technology, Inc. | Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device |
| KR20120006516A (en) | 2009-03-31 | 2012-01-18 | 마이크론 테크놀로지, 인크. | Techniques for Providing Semiconductor Memory Devices |
| US8139418B2 (en) | 2009-04-27 | 2012-03-20 | Micron Technology, Inc. | Techniques for controlling a direct injection semiconductor memory device |
| US8508994B2 (en) | 2009-04-30 | 2013-08-13 | Micron Technology, Inc. | Semiconductor device with floating gate and electrically floating body |
| US8498157B2 (en) | 2009-05-22 | 2013-07-30 | Micron Technology, Inc. | Techniques for providing a direct injection semiconductor memory device |
| US8537610B2 (en) | 2009-07-10 | 2013-09-17 | Micron Technology, Inc. | Techniques for providing a semiconductor memory device |
| US9076543B2 (en) | 2009-07-27 | 2015-07-07 | Micron Technology, Inc. | Techniques for providing a direct injection semiconductor memory device |
| US8199595B2 (en) | 2009-09-04 | 2012-06-12 | Micron Technology, Inc. | Techniques for sensing a semiconductor memory device |
| US8174881B2 (en) | 2009-11-24 | 2012-05-08 | Micron Technology, Inc. | Techniques for reducing disturbance in a semiconductor device |
| US8310893B2 (en) | 2009-12-16 | 2012-11-13 | Micron Technology, Inc. | Techniques for reducing impact of array disturbs in a semiconductor memory device |
| US8416636B2 (en) | 2010-02-12 | 2013-04-09 | Micron Technology, Inc. | Techniques for controlling a semiconductor memory device |
| US8411513B2 (en) | 2010-03-04 | 2013-04-02 | Micron Technology, Inc. | Techniques for providing a semiconductor memory device having hierarchical bit lines |
| US8576631B2 (en) | 2010-03-04 | 2013-11-05 | Micron Technology, Inc. | Techniques for sensing a semiconductor memory device |
| US8369177B2 (en) | 2010-03-05 | 2013-02-05 | Micron Technology, Inc. | Techniques for reading from and/or writing to a semiconductor memory device |
| WO2011115893A2 (en) | 2010-03-15 | 2011-09-22 | Micron Technology, Inc. | Techniques for providing a semiconductor memory device |
| US8411524B2 (en) | 2010-05-06 | 2013-04-02 | Micron Technology, Inc. | Techniques for refreshing a semiconductor memory device |
| US8531878B2 (en) | 2011-05-17 | 2013-09-10 | Micron Technology, Inc. | Techniques for providing a semiconductor memory device |
| US9559216B2 (en) | 2011-06-06 | 2017-01-31 | Micron Technology, Inc. | Semiconductor memory device and method for biasing same |
-
1973
- 1973-02-13 IT IT20299/73A patent/IT979035B/en active
- 1973-03-06 GB GB1091073A patent/GB1414228A/en not_active Expired
- 1973-03-21 FR FR7311015A patent/FR2181850B1/fr not_active Expired
- 1973-03-21 CA CA167,263A patent/CA1003106A/en not_active Expired
- 1973-03-23 JP JP3278173A patent/JPS5212073B2/ja not_active Expired
- 1973-03-26 SE SE7304177A patent/SE389573B/en unknown
- 1973-04-02 ES ES413258A patent/ES413258A1/en not_active Expired
- 1973-04-13 CH CH529373A patent/CH546461A/en not_active IP Right Cessation
- 1973-04-16 NL NL7305263A patent/NL7305263A/xx not_active Application Discontinuation
- 1973-04-18 DE DE2319714A patent/DE2319714A1/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| IT979035B (en) | 1974-09-30 |
| CA1003106A (en) | 1977-01-04 |
| SE389573B (en) | 1976-11-08 |
| JPS5212073B2 (en) | 1977-04-04 |
| DE2319714A1 (en) | 1973-11-15 |
| FR2181850B1 (en) | 1978-05-26 |
| FR2181850A1 (en) | 1973-12-07 |
| CH546461A (en) | 1974-02-28 |
| JPS4922882A (en) | 1974-02-28 |
| NL7305263A (en) | 1973-10-29 |
| GB1414228A (en) | 1975-11-19 |
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