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ES393039A2 - A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE. - Google Patents

A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE.

Info

Publication number
ES393039A2
ES393039A2 ES393039A ES393039A ES393039A2 ES 393039 A2 ES393039 A2 ES 393039A2 ES 393039 A ES393039 A ES 393039A ES 393039 A ES393039 A ES 393039A ES 393039 A2 ES393039 A2 ES 393039A2
Authority
ES
Spain
Prior art keywords
layer
silicon
conductivity type
attached
shaped
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES393039A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from NL7010208A external-priority patent/NL7010208A/xx
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of ES393039A2 publication Critical patent/ES393039A2/en
Expired legal-status Critical Current

Links

Classifications

    • H10W15/00—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/112—Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs
    • H10D84/403—Combinations of FETs or IGBTs with BJTs and with one or more of diodes, resistors or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors
    • H10P14/61—
    • H10W10/00—
    • H10W10/01—
    • H10W10/012—
    • H10W10/0121—
    • H10W10/0126—
    • H10W10/13—
    • H10W15/01—

Landscapes

  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

Enhancements Made to the Object of Main Patent Number 345,702 issued on November 22, 1969, for: "A method of manufacturing a semiconductor device" comprising a silicon semiconductor body having at least one semiconductor circuit element, as a representation of the which a layer of silicon oxide is attached, attached to the silicon body, in the form of a silicon oxide layer-shaped structure and by means of an oxidation treatment on the surface of the silicon body, in which the structure of Layer shape is embedded in the silicon body at least part of its thickness thanks to locally protecting, during oxidation treatment, the surface of the silicon body against oxidation, and in which a semiconductor body in the form of a silicon layer of a conductivity type that is present on a support, the oxidation treatment being continued during the formation of the structure of layer-shaped silicon oxide until the structure extends to the full thickness of the silicon layer, the silicon layer being divided into a number of parts, called islands hereafter, which are separated from each other by the structure, characterized because the silicon layer is arranged as an epitaxial layer of a conductivity type on a semiconductor body that is used as a starting material, and of which, during the formation of the epitaxial layer, at least one surface region of the opposite conductivity type it serves as a support, and this semiconductor body is arranged with a surface area of the opposite conductivity type that belongs to the support and is attached to the layer-shaped oxide structure, and which has such high doping that channel formation is prevented that connect the islands and that are attached to the layer-shaped insulating structure. (Machine-translation by Google Translate, not legally binding)
ES393039A 1970-07-10 1971-07-08 A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE. Expired ES393039A2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7010208A NL7010208A (en) 1966-10-05 1970-07-10

Publications (1)

Publication Number Publication Date
ES393039A2 true ES393039A2 (en) 1973-08-16

Family

ID=19810548

Family Applications (1)

Application Number Title Priority Date Filing Date
ES393039A Expired ES393039A2 (en) 1970-07-10 1971-07-08 A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE.

Country Status (11)

Country Link
JP (1) JPS522273B2 (en)
AT (1) AT344788B (en)
BE (1) BE769733R (en)
CA (1) CA933675A (en)
CH (1) CH539949A (en)
ES (1) ES393039A2 (en)
GB (1) GB1363515A (en)
HK (2) HK59276A (en)
IT (1) IT995017B (en)
NL (1) NL176414C (en)
SE (1) SE383581B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5370687A (en) * 1976-12-07 1978-06-23 Toshiba Corp Production of semiconductor device
JP2007535160A (en) * 2004-04-27 2007-11-29 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Semiconductor device and method of manufacturing such a device

Also Published As

Publication number Publication date
BE769733R (en) 1972-01-10
NL176414B (en) 1984-11-01
HK59276A (en) 1976-10-01
HK59576A (en) 1976-10-01
JPS5176086A (en) 1976-07-01
JPS522273B2 (en) 1977-01-20
CA933675A (en) 1973-09-11
CH539949A (en) 1973-07-31
IT995017B (en) 1975-11-10
AT344788B (en) 1978-08-10
NL176414C (en) 1985-04-01
GB1363515A (en) 1974-08-14
ATA594171A (en) 1977-12-15
NL8002038A (en) 1980-07-31
SE383581B (en) 1976-03-15

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