EP1602017A2 - Method for using a microprocessor and a microprocessor system - Google Patents

Abstract

The invention relates to a method for using a microprocessor consisting of at least one program branching and/or program delay which are regulated by random bits in order to modulate a program flow, implemented and stored in the form of a material command. The inventive method is characterised in that a program runtime for each program run is different each time with respect to the runtime of the previous programs. A microprocessor system for carrying out said method is also disclosed.

Description

 description

Method for operating a microprocessor and a microprocessor arrangement

The present invention relates to a method for operating a microprocessor and a microprocessor arrangement according to the independent claims 1 and 9.

In programs in security applications that are programmed on a microprocessor, there is generally the possibility of spying on secret information, such as keys, by evaluating command sequences.

There are various ways of attacking such circuits for safety applications. In so-called "side-channel attacks", for example, the current consumption or the electromagnetic emission of the circuit is detected when a specific process takes place in the circuit. From the temporal course, in particular the temporal reference of the

Current consumption or the electromagnetic emission can be deduced, for example, from the key used.

Differential Power Analysis (DPA) is a known attack scenario for safety CPUs. In the case of such an attack, a sequence of commands from a program and their effects in the circuit are determined by means of statistical evaluations of the characteristic curves of the power consumption. From these evaluations, detailed conclusions can be drawn about the program implemented. The detection of the electromagnetic emission is known under the name DEMA ("Differential Electro-Magnetic Analysis").

Programs always have several program or code sequences that are independent of one another and whose order in processing is interchangeable. The program flow was previously used to protect against the above types of attacks randomly changed by software. For example, command sequences were interchanged by permutation, redundant command sequences were inserted or several different code sequences that lead to the same result were introduced. However, this requires the use of a random generator that generates undeterminable random bits that are software-evaluated at corresponding branch points within the program, for example in order to branch to the corresponding code sequence in the case of a jump instruction.

Another method of protection against this type of attack is a randomly controlled program delay, in which dummy code sequences, the execution time of which is determined with the aid of a random generator, are inserted into the current program code.

A method known from published WO / 9963419 describes the control of a "wait-state connection" of a circuit by a random generator, the operation of the circuit being stopped or restarted as a function of the number generated by the random generator, and thus uniform processing cycles be prevented.

It is disadvantageous in the above-mentioned methods that the program size increases, the program runtime is extended, the performance decreases and an increased power consumption is recorded.

On the basis of this prior art, the object of the invention is to provide a method for operating a microprocessor or a microprocessor arrangement with which adequate security is ensured with minimal program expenditure.

This object is achieved by a method or a microprocessor arrangement in which at least one program Branch and / or program delay is provided, which is random bit-controlled for the modulation of a program run and implemented as a hardware-based command.

Since the program sequence is determined by the order of the commands and their runtime required for the execution, the modulation of a program sequence is controlled in an advantageous manner in that, for example, a bit randomly generated by a pseudo-random generator with a non-determinable bit of a real one generated physical

Random generator is linked to a random bit, which is used by the hardware-based instructions of the microprocessor in order to randomly execute program branches and / or program delays.

Instructions are advantageously introduced which have a variable execution time by randomly changing the runtime of the instructions via the parameters assigned to the instructions, which, for example, indicate operating cycles. Commands can also be inserted into the program flow which carry out an empty operation and have no influence on the result of a code sequence.

Randomly controlled program branches are advantageously implemented by jump commands with at least one jump target. The jump is carried out or not depending on the value of a random bit. In the case of a jump instruction with at least two jump destinations, with code sequences to be processed independently of one another under the destination addresses, the sequence of the code sequences to be processed can be varied in a random bit-controlled manner. The destination addresses do not necessarily have to be processed if they achieve the same result. If these code sequences have, for example, different runtime profiles, the time behavior for achieving a result when the program is run again cannot be determined, so that the attack methods described above do not produce any usable information.

The invention is explained in more detail below on the basis of exemplary embodiments.

In the first exemplary embodiment below, a jump instruction ("jumble") is implemented, the jump instruction specifying a jump destination:

Jumble <addressl>

code sequence 1 goto address 2 adressl:

code sequence 2 address2:

common code sequence

Depending on the value of the random bit, the jump is carried out or not. If, for example, the random bit is set, ie has the value "1", the jump operation to address "address1" is carried out, where code sequence 2 is processed and then the common code sequence "common code sequence" is processed under address "address2" becomes. Code sequence 1 can include a dummy operation here that has no influence on the result. In the event that the random bit is not set, ie has the value "0", the jump to address "adressl" is not carried out, but the program flow is linear with the code sequence "code sequence 1" and subsequent jump to address "address2" continued. In the next exemplary embodiment, a jump instruction ("jumble") is implemented, the jump instruction branching into three jump destinations:

Jumble <addrl>, <addr2>, <addr3>

addrl: code sequence 1 goto addr 4 addr2: code sequence 2 goto addr 4 addr3: code sequence 3 goto addr 4 addr4: common code sequence

The sequence of processing the code sequences "code sequence 1, code sequence 2 and code sequence 3" at the addresses "addrl, addr2 and addr3" of the jump destinations can be interchanged, since they are not functionally dependent on one another. The code sequences equivalent to the result to be achieved do not necessarily all have to be processed, so that an address can be jumped to under random bit control, under which the corresponding code sequence is processed and the program sequence is then continued under the address "address4". The fact that the code sequences have different runtime behavior and that each time the program is run again jumps to a different address, it is not possible to analyze the data obtained by interception processes. The random bit-controlled sequence when all code sequences have to be processed also does not provide any usable data.

The following exemplary embodiment shows a jump command with two possible jump targets, which is implemented as a "jumblecall" call command and implements a context change by a jump: Jumblecall <addl>, <addr2>

some code

addrl: code sequence 1 return

some code

addr2: code sequence 2 return

In this example, random bit-controlled, the command can be executed either to one or to both jump destinations. In order to exit the subroutine after processing a code sequence, a "return" command is executed which restores the previous context.

The following embodiment shows a command that performs an empty operation "jumplenop":

jumplenop <n>, <m>

The random bit-controlled parameters <n> and <m> specify the upper and lower limits of possible operation cycles, so that a variable run length of the command is achieved. In order to achieve a variable execution time of a command, whereby the parameters can be assigned to any command, only one parameter could also be specified as an upper limit. If the parameters have the value "0", the command is executed in an optimal period. If the parameters have a value other than "0", up to <n> or <m> cycles are required to execute this command. The command "jumpleadd" of the following exemplary embodiment can also be used for all commands:

jumpleadd R, Ry

This command also extends the execution time randomly.

In general, the parameters determining the runtime of a command do not necessarily have to be specified for each individual command. These parameters can be stored in a configuration register, which is accessed, for example, using a configuration command "jumple_config <opl> <op2>.

The procedure described above does not only refer to the examples given. Rather, they are intended to clarify that program delays and program branches for modulating a program sequence can be implemented in any variation.

Claims

claims 1. A method for operating a microprocessor, the provision of at least one program branch and / or program delay which is randomly bit-controlled and implemented as a hardware-based command for modulating a program sequence. 2. The method of claim 1, d a d u r c h g e k e nn z e i c h n e t that a program delay is achieved by means of hardware-based commands with randomly varying runtime. 3. The method of claim 2, d a d u r c h g e k e n n z e i c h n e t that the randomly varying transit time is determined by the random bit-controlled parameters associated with the commands that determine the runtime of a command. , Method according to claim 3, so that the parameters of the commands determining the runtime are fixedly predetermined by a configuration register assigned to the microprocessor. 5. The method of claim 1, d a d u r c h g e k e n n z e i c h n e t that a program branch is achieved by means of a hardware-based jump instruction with a jump target and that the random bit determines whether a jump is executed or not. 6. The method according to claim 1, characterized in that a program branching is achieved by means of a hardware-based jump instruction with at least two jump targets and that the random bit determines the order in which the jump targets are jumped to. 7. The method of claim 6, d a d u r c h g e k e n n z e i c h n e t that the jump targets are determined arbitrarily at the time of execution of the jump command. 8. The method according to any one of claims 1 to 7, so that the random bit-controlled program branching and / or program delay ensures that each execution of a specific program causes a program execution time that is different from previous program runs. 9. Microprocessor arrangement, at least one hardware-based instruction, which causes a random bit-controlled program branching and / or program delay for modulating a program sequence.