WO2021148123A1 - Method and devices for operating an electrical or electronic apparatus - Google Patents

Abstract

The invention relates to a method for operating an electrical or electronic apparatus (10) comprising a main component (12) and an accessory component (14), the method comprising the following steps: - transmitting an enquiry message (16) from the main component (12) to the accessory component (14); - performing a first test program on the accessory component (14); - transmitting a response message (18) from the accessory component (14) to the main component (12); - evaluation, by the main component (12), of the response message (18) received from the accessory component (14); said response message (18) having a test value determined by the first test program, and the test value being compared with a reference value during the evaluation of the response message (18); and - the test value compared with the reference value being dependent on a processing speed of the first test program by the accessory component (14); and - activating a predetermined and previously deactivated function of the apparatus (10) if the comparison of the test value with the reference value has shown that the compared values are identical.

Description

METHODS AND DEVICES FOR OPERATING AN ELECTRIC

OR ELECTRONIC DEVICE

The present invention relates to a method for operating an electrical or electronic device comprising a main component and an accessory component.

Electrical and electronic devices that have a main component and an accessory component are generally known. For example, who sells drills with rechargeable batteries, printers with printer cartridges, e-cigarettes with liquid cartridges, coffee machines with capsules and smartphones with rechargeable batteries. The consumer often wants or needs to replace the accessory component because, for example, the performance of a rechargeable battery has deteriorated after a certain period of time or because the accessory component (such as coffee capsules, for example) only needs to be used once.

In some cases, for safety reasons, it may be advisable or even absolutely necessary to replace the accessory component to be exchanged with an original accessory component from the same manufacturer. In the case of batteries, for example, it has been shown in the past that the use of counterfeit accessory components can pose a serious security problem, as some of the counterfeits available on the market by no means meet the manufacturers' high security requirements. This can cause the batteries to heat up excessively or even explode.

Excessive heating or an explosion of a battery can not only destroy the main component (e.g. a smartphone) but also pose a significant safety risk for the consumer.

For the reasons mentioned, it is in certain cases desirable for the manufacturer to take security measures that allow a device to be deactivated as soon as it is recognized that the accessory component used is not an original. To distinguish between an original and an imitation, it is necessary to enable reliable authentication of the accessory component.

Various approaches for the authentication of accessory components are already known from the prior art. In particular, US 2011/0093714 A1 describes a method for authenticating accessory components in which a cryptographic method is used to check the authenticity of the accessory component. In the method described in the cited publication, a key pair consisting of a private key and a public key is used. The accessory component sends a message signed with the private key to the main component, which can use the public key to verify whether the accessory component is actually in possession of the private key belonging to the public key. If so, the main component classifies the accessory component as "authentic" and the device is allowed to operate.

Even if cryptographic methods offer certain advantages, these are also associated with some disadvantages. In particular, cryptographic processes can easily be bypassed if the private key falls into the wrong hands. In this case, numerous replicas of an accessory component can easily be provided, since the private key can be stored on each of the replicated accessory components.

Based on the problem described above, it is the object of the present invention to provide a method for operating an electrical or electronic device that allows a secure and efficient as possible authentication of an accessory component by a main component.

To achieve the stated object, the present invention provides a method for operating an electrical or electronic device comprising a main component and an accessory component, the method comprising the following steps:

Sending an inquiry message from the main component to the accessory component;

Executing a first test program on the accessory component; Sending a response message from the accessory component to the main component;

Evaluation of the response message received from the accessory component by the main component, the response message having a test value determined by the first test program and the test value being compared with a reference value during the evaluation of the response message; wherein the test value compared with the reference value is dependent on a processing speed of the first test program by the accessory component; and

Activation of a predefined and previously deactivated function of the device, provided that the comparison of the test value with the reference value has shown that the values compared with one another are identical.

The method according to the invention advantageously allows individual or all functions of a device to be activated only if it is proven that the accessory component used is in the original. As a result, the safety when operating the device can be significantly increased. In the method according to the invention, a unique authentication method is provided in which the accessory component is authenticated by the main component without having to rely on a cryptographic method and the use of a private key. Rather, the present invention is based on the fact that different hardware modules process a given test program at different speeds. As a rule, the main component and the accessory component have a microcontroller. A microcontroller has several hardware modules, of which the processing speed of the corresponding component for a specific program or a specific software routine depends. The present invention is also based on the fact that different types of microcontrollers have different hardware modules, so that each type of microcontroller can be uniquely identified by its specific hardware configuration. If a manufacturer wants to imitate an accessory component, there is generally no microcontroller available to him that is identical to the specific microcontroller type used by the original manufacturer of the accessory component. Even if the imitator copies the software stored on the accessory component, it can still be recognized during the authentication process that the imitation is not the original. In other words, each type of microcontroller has an individual rhythm with which it processes the first test program. This rhythm is dependent on the individual hardware modules of a microcontroller type and in this respect is practically unique for a specific microcontroller type.

In the context of the present invention, the electrical or electronic device can in particular be a drill with a rechargeable battery, a printer with a printer or toner cartridge, a smartphone with a rechargeable battery, etc. The test program can be implemented as a program that has a predetermined number of instructions. For example, the test program can have 100 or 1000 individual instructions. The instructions are processed by a microcontroller of type A at a different processing speed than by a microcontroller of type B. Thus, the microcontrollers of type A and B can be distinguished from one another. When the test program is executed, a test value is determined which is sent to the main component. The main component compares the test value obtained with a reference value. If the two values match, the main component can classify the accessory component as "authentic" and then activate a previously deactivated function of the device. In this way, a method is provided that can be implemented very safely on the one hand and efficiently on the other. In particular, no method for securely storing private keys are required according to the present invention. An imitator can do that too Do not bypass authentication procedures by manipulating the accessory component using software. Finally, the method can be implemented efficiently, since no complex arithmetic operations have to be carried out on the main component and the accessory component. In the simplest case, the transmitted test value can have a single numerical value which is compared with the reference value. The reference value can be stored in the memory of the main component. According to one embodiment, it can also be provided that the reference value is stored in an external database. It can also be provided that the test value has a sequence of numerical values, as will be explained in detail below.

According to one embodiment of the method according to the invention, it can be provided that the first test program has a number n of CPU instructions and that the first test program provides that after execution of nl instructions on the accessory component, a counter reading is read out, where nl is less than or equal to n is, and wherein the read out count is contained in the check value sent to the main component. The counter reading can in particular be the counter reading of a CPU clock. For example, the first test program can have 100 CPU instructions, the counter reading being read out after nl = 75 instructions. A response message is then transmitted to the main component, which has a check value in which the counter reading is contained. According to one embodiment, the test value can be identical to the counter reading read out. According to a further embodiment of the invention, it can also be provided that the test value corresponds to a value that was determined from the counter reading that has been read out. In this way, a particularly easy-to-implement method can be provided in which a counter reading is read out and transmitted to the main component only after a predetermined number of instructions and the main component can decide whether it should be by simply comparing the counter reading with a reference value whether the accessory component used is an original or not. According to a further embodiment of the method according to the invention, it can be provided that after execution of n2 instructions on the accessory component, the counter reading is read again, where n2 is greater than nl and less than or equal to n, the two counter readings or the difference between the two counter readings in the check value sent to the main component are included. For example, it can be provided that n = 100, nl = 35 and n2 = 85. In this way, the processing speed of the accessory component can be "measured" at two different points in time. In this way it can be achieved in an advantageous manner that the reliability of the authentication is increased, since it is very unlikely that two different microcontrollers happen to have the same processing time for both n1 and n2 instructions. It can also be provided that the counter reading is read out at more than two places in the test program. This can further improve the reliability of the authentication. If the counter reading is read out at a particularly large number of points in the test program, it can be achieved that the accessory component is analyzed in great detail. This increases the reliability of the authentication. Otherwise, the associated computing effort and the amount of data transmitted from the accessory component to the main component increase if the corresponding counter reading is to be read out at a particularly large number of points in the test program and all counter readings are to be transmitted to the main component. As will be explained in detail below, according to further embodiments of the invention it can therefore be advantageous if not all the counter readings are transmitted to the main component, but only a test value determined from the individual counter readings. For example, the check value can have a hash value that was previously determined from the product of the individual counter readings. Then only the hash value has to be transmitted to the main component, so that the main component only has to compare the hash value with a reference value. As a result, it is achieved in an advantageous manner that on the one hand a very detailed analysis of the accessory component takes place, but on the other hand the amount of data transferred from the accessory component to the main component remains small.

According to a further embodiment of the method according to the invention, it can be provided that the execution of the first test program on the accessory component requires a number m of clock cycles and that the first test program provides that program status data stored on a memory element of the accessory component are read out after ml clock cycles, with ml being smaller or is equal to m, and wherein the read program status data are contained in the check value sent to the main component. The program status data can in particular be data which indicate what percentage of the test program has been executed so far. For example, it can be provided that a specified first test program on an original accessory component requires m = 10,000 clock cycles and the first test program provides that the program status data are read out after ml = 3,500 clock cycles. For example, it can be determined that after ml = 3,500 clock cycles, 20% of the instructions have been executed. This value can then be transmitted with the response message to the main component, which then compares the received test value with a reference value.

Furthermore, according to one embodiment of the invention, it can be provided that after m2 clock cycles on the accessory component program status data are read out again, where m2 is greater than ml and less than or equal to m, and the two program status data is contained in the test value sent to the main component. For example, it can be provided that the entire test program on an original accessory component requires m = 10,000 clock cycles and that the program status data are read out after ml = 4,000 and m2 = 7,800 clock cycles. For example, it can be determined that after ml clock cycles 25% of the instructions were executed by the accessory component, while after m2 clock cycles 70% of the instructions were executed. The determined values can then be transmitted to the main component, which uses the received values Accessory component authentication can use. The reliability of the authentication can be further increased in that the program status data is read out at more than two different clock cycles and transmitted to the main component. As already explained above, the program status data can also be transmitted either directly or in the form of a test value that was calculated from the program status data. For example, the transmitted check value can be implemented as a hash value that was calculated from the sum or the product of the individual program status data.

According to a further embodiment of the invention it can also be provided that the first test program provides for the execution of an interrupt service routine and that after an interrupt is triggered on the accessory component, program status data is read out and then contained in the test value sent to the main component. In this embodiment, the program status data can contain the return address, i.e. the program address to be called immediately after termination of the interrupt service routine.

Furthermore, according to one embodiment of the method according to the invention, it can be provided that the first test program contains at least one write instruction and / or one read instruction. As already explained above, the test program can have numerous instructions. It can be provided that the test program has several write instructions, one or more values being written into one or more registers a number of times. For example, a single value can be written to a register, a value to different registers or several different values to several different registers.

It can also be provided that the write instruction includes the writing of a value in a peripheral register and / or the read instruction includes the reading of a value from a peripheral register. The reliability of the authentication process can be increased by increasing the diversity of the test program is increased. In other words, a differentiated picture of the accessory component can be obtained if not only is writing to a single register or reading from a single register, but if different peripheral registers are involved in the execution of the test program. A person skilled in the art will recognize that the probability that different accessory components will execute a test program with the same processing speed is extremely low, especially when several different hardware modules of a microcontroller are used to execute the test program. This is because each individual hardware component has its own individual performance that can be used to clearly differentiate the microcontrollers. Test values that are determined by means of a test program in which a peripheral register is written to or read from a peripheral register are also referred to as microcontroller authentication data in the context of the present invention. According to one embodiment of the invention, it can therefore be provided that a response message contains microcontroller authentication data.

According to a further preferred embodiment of the method according to the invention it can be provided that the response message has a device ID of the accessory component and that when the main component evaluates the response message, the device ID received from the accessory component or a part of this device ID with a specified device ID reference value is compared. In particular, one embodiment of the invention provides that the device ID is stored in a read-only memory (also referred to as ROM or read-only memory) of the accessory component. In this way, the security of the method according to the invention can be further increased. Even if an imitator should come into possession of hardware modules that should be identical to the original manufacturer hardware, the additional check of the device ID can still reliably check whether the accessory component being examined is a component Original or a fake. For example, it can be provided that the device ID has a total of 20 digits, from which the first five digits specify the group to which a microcontroller belongs, while the other 15 digits identify the specific microcontroller. In this way, by checking the device ID, the main component can determine whether or not the accessory component belongs to a group of “authentic accessory components”.

According to a preferred embodiment of the method according to the invention, it can be provided that the response message is not transmitted to the main component as plain text, but rather as a hash value calculated from the response message. As a result, it can be achieved in an advantageous manner that the amount of data that is transmitted from the accessory component to the main component is reduced. In addition, the use of the hash value offers the advantage that even slight changes in the value determined when the test program is executed can be recognized more easily. This is because even minor changes to the input of a hash function lead to a complete change in the value calculated by the hash function. The hash value can be calculated from a single value or, as already explained above by way of example, from a plurality of individual values that were determined when the test program was executed (e.g. from several counter values or from different program status data).

Furthermore, according to one embodiment of the invention, it can be provided that the response message to be hashed comprises microcontroller authentication data and / or processor authentication data and / or program authentication data and / or a device ID. The processor authentication data can in particular have one or more counter readings and / or program status data. The processor authentication data are used for hardware authentication of the accessory component. The program authentication data can include, for example, binary data from the first test program. The program authentication data allow the main component to check whether the first test program is authentic and with integrity or whether the first test program has been manipulated by a third party became. If the program authentication data or a hash value determined from the program authentication data is not identical to a test value, it can be concluded from this that the first test program was manipulated in order to apply the same test value to an inauthentic accessory component as with an original accessory component. The device ID can consist, for example, of a sequence of numbers that determine membership of an authentic group. The use of processor authentication data, program authentication data and a device ID can significantly increase the reliability of the authentication process. In this way, both a hardware check, a software check and a check of the accessory components carried out via a device ID are guaranteed. This makes it much more difficult to imitate an accessory component. Even if only one of the three authentication components is modified slightly, the corresponding hash value changes significantly. The microcontroller authentication data are data that are determined by executing a test program in which not only the processor of the accessory component is involved, but also at least one peripheral register. In contrast, processor authentication data can be determined by executing a test program in which no peripheral registers are involved. The use of microcontroller authentication data can be particularly advantageous because, in addition to the specific properties of a processor, the specific properties of one or more peripheral registers are also taken into account. This enables microcontroller types that have the same processor type to be distinguished from one another.

According to one embodiment of the invention, it can also be provided that the response message (regardless of the use of a hash function) comprises microcontroller authentication data and / or processor authentication data and / or program authentication data and / or a device ID.

According to a further advantageous embodiment of the invention can be provided that the first test program in a memory element of the Accessory component is stored. This has the advantage that the program data do not have to be transferred to the accessory component every time. This enables a particularly fast and efficient authentication process. The requirements for the bandwidth of the transmission channel between the main component and the accessory component are thereby advantageously reduced.

According to a further embodiment of the method according to the invention, it can be provided that the first test program is stored in a memory element of the main component. This has the advantage that the corresponding data does not have to be stored permanently on every accessory component. This advantageously reduces the memory requirements with regard to the accessory component.

According to a further preferred embodiment of the invention, provision can be made for at least one second test program to be stored on the memory element of the accessory component in addition to the first test program and for the request message to have program selection data that indicates to the accessory component which of the test programs is to be executed . This has the advantage that not all of the program data have to be transferred from the main component to the accessory component. Instead, it is sufficient to simply transfer the information about which test program is to be executed to the accessory component. With a total of two test programs, it is sufficient to transmit a single program selection bit to the accessory component, with which of the two test programs is to be executed is coded in the program selection bit. It can also be provided that more than two test programs are stored on a memory element of the accessory component and that the program selection data contain information about which of the test programs is to be executed on the accessory component. Correspondingly, several reference values can be stored on the main component, one reference value being assigned to a test program in each case. In other words, the main component knows that when choosing one specific test program a certain test value can be expected. If the test value received by the accessory component with the response message does not correspond to the reference value expected for the selected test program, the main component can conclude that the accessory component is not an original.

Furthermore, according to a further preferred embodiment of the invention, it can be provided that the request message has modification data by which the test program to be executed is modified. In this way, numerous variations of the test program can be provided without having to store several test programs in the memory of the accessory component. For example, the test program can have n = 100 instructions, the 35th instruction being executed as a modifiable instruction. For example, this instruction can be a write instruction, the value to be written being designed to be modifiable. In this way, the modification data can contain, for example, the value to be written into a specific register. In this way, a slight variation of the test program can be made possible without storing a large amount of data on the accessory component and without having to transfer a large amount of data between the main component and the accessory component.

Furthermore, according to a further embodiment of the invention, it can be provided that when the response message received from the accessory component is evaluated by the main component, the received test value is compared with a plurality of reference values, the predefined function then being activated if the comparison of the test value is identical to one of the reference values. In this way it is possible to authenticate several types of an accessory component that belong, for example, to a product family. For example, several accessory components that are technically different and have different hardware modules can be recognized as authentic accessory components. This can be useful, for example, if the accessory components have changed over time and over the years different microcontrollers have been used. For each type of microcontroller to be classified as authentic, a reference value can be stored in the memory of the main component.

In addition, to solve the above-mentioned object, a system comprising an accessory component and a main component is proposed, the main component being designed to authenticate the accessory component by the method according to the invention and to activate a predetermined function of the system, provided that the authentication was previously performed Accessory component was successful.

In the system according to the invention, it can be provided that the main component is a drill and the accessory component is a battery device belonging to it. In this case, the drill can be activated as long as the battery device has been recognized as authentic (i.e. as an original). Alternatively, it can be provided that the main component is designed as a printer and the accessory component has a printer cartridge or a printer cartridge. In this case, for example, the print function can be activated if the printer cartridge was previously recognized as authentic. In contrast, individual or all functions of the printer can be deactivated if it was previously recognized that the accessory component is an imitation of the original cartridge.

Furthermore, to solve the present problem, a main component of an electrical or electronic device comprising a microcontroller is proposed, the microcontroller being designed to send a request message to an accessory component of the electrical or electronic device; receive a response message from the accessory component; evaluate the received response message, the response message having a test value and the test value being compared with a reference value when the response message is evaluated; in which the test value compared with the reference value has a dependency on a processing speed of the first test program by the accessory component; and to activate a predetermined function of the device, provided that the comparison of the test value with the reference value has shown that the values compared with one another are identical.

Finally, to solve the present object, an accessory component of an electrical or electronic device comprising a microcontroller is proposed, which is designed to receive an inquiry message from the main component; run a test program; and send a reply message to the main component; wherein the response message has a test value determined by the test program; and the test value is dependent on a processing speed of the first test program by the microcontroller.

The invention is illustrated below with reference to the figures. In detail, show:

Fig.l an embodiment of an electrical device according to the present invention,

2 shows an embodiment of the method according to the invention,

3 shows a flow chart of an embodiment of the method according to the invention,

4 shows a representation of the course of a counter reading as a function of the instructions executed, 5 shows a representation of the course of a program state as a function of the clock cycles,

6 shows a response message according to a first embodiment of the method according to the invention,

7 shows a response message according to a second embodiment of the method according to the invention,

8 shows a response message according to a third embodiment of the method according to the invention,

9 shows a response message according to a fourth embodiment of the method according to the invention,

Fig. 10 is a flow chart for a further embodiment of the fiction, contemporary method and

11 shows a further illustration of an embodiment of the method according to the invention.

In Fig. 1, an electrical device 10 is shown, which can be operated by the fiction, contemporary method. The device 10 has a main component 12 and an accessory component 14. The device 10 shown in Fig. 1 is designed as a drill. The main component 12 represents the drill as such, while the accessories component 14 is designed as a battery in the embodiment shown. As already explained above, the device according to the present invention can also be designed, for example, as a printer, coffee machine, e-cigarette or smartphone.

FIG. 2 shows a general illustration of the method according to the invention. The main component 12 sends a request message 16 the accessory component 14. A test program is then executed on the accessory component 14, by means of which a test value is determined. The accessory component 14 then transmits the determined test value within a response message 18 to the main component 12. The main component 12 compares the obtained test value with a reference value and activates a function of the device 10 if the two compared values are identical.

3 shows a detailed flow chart comprising the individual steps of the method 100 according to the invention. As can be seen in this figure, in a first step 102 the main component 10 sends a request message 16 to the accessory component 14. The request message 16 can optionally contain a test program. Alternatively, the test program can also be stored in a memory of the accessory component 14. In a next step 104, the test program is loaded into a main memory of the accessory component. The test program is then executed on the accessory component 14 in the next step 106. When the test program is executed, a test value is determined which is dependent on a processing speed of the first test program by the accessory component 14. For example, the test value can contain a counter reading or program status data, as explained in connection with the following figures. Subsequently, in the next step 108, a response message is transmitted from the accessory component 14 to the main component 12, the response message containing the previously determined test value. In the subsequent step 110, the main component 12 receives the response message 18 received from the accessory component 14. Subsequently, in step 112, the test value contained in the response message 18 is compared with a reference value. The reference value can be stored in a storage element of the main component or it can be stored in an external memory. It can also be provided that several reference values are stored in a database and that the test value is compared with several reference values. Then in step 114 a Device function activated if the test value is identical to the reference value (or one of the reference values).

FIG. 4 shows an exemplary course of a counter reading as a function of the instructions that have been executed. It can be seen that after execution of m instruction, the count is Zi, on type of equipment of r2 instructions of the counter reading Z2 is, is after execution of n ₃ Instruktonen the counter state Z3 and after execution of n ₄ Instrukti the count ones Z ₄ is as well as after execution of n instructions the counter reading Z is. For unambiguous identification of an accessory component, _{the respective counter reading (for example, the counter reading of a CPU clock) can be read out after, n2, P 3} , n ₄ and n instructions, so that the read counter readings are transmitted to the main component 12 and with the corresponding Referees n second to be compared. As a result, the main component 12 can recognize whether the processing speed of the checked accessory component 14 corresponds to or deviates from the processing speed of an original accessory component. If the processing speeds or the counter reading values are above the same, the main component 12 can conclude therefrom that the checked accessory component 14 is an original. As an alternative to the embodiment shown in FIG. 4, it can also be provided that only one counter reading is transmitted to the main component 12 and that this counter reading is compared with a reference value. It can also be provided that ten or 100 counter reading values are read out and these are transmitted to the main component. In general, it can be assumed that the reliability of the authentication of the accessory component 14 increases the more frequently the counter reading is read out and the more counter reading values are transmitted to the main component 12.

In FIG. 5, an exemplary course of program status data is shown as a function of the clock cycles. The program status data can be, for example, the percentage of the instructions executed act in proportion to the total number of instructions. For example, after ml clock cycles, 20% of the total instructions can be executed, while after m2 clock cycles 38% of the total instructions are executed, after m3 clock cycles 62.5% of the instructions are executed, after m4 clock cycles 79% of the instructions are executed and after m clock cycles 100% of the instructions have been carried out. In this way, after a fixed number of clock cycles, the program status data can be read out and then transmitted to the main component 12. The program status data (just like the counter values) represent an individual distinguishing feature of a specific microcontroller, which enables the accessory component 14 to be clearly identified.

6 shows a first exemplary embodiment of a response message 18 according to a first exemplary embodiment of the method according to the invention. According to this exemplary embodiment, the response message 18 has four counter values 20a, 20b, 20c, 20d which were read out _{according to n, n 3} and n _{4 instructions.} According to instructions, the counter reading Zi = 1,827 in the embodiment shown in FIG. 6, while after executing n ₂ instructions the counter reading Z ₂ = 3,416, after executing n ₃ instructions the counter reading Z ₃ = 6,138 and after executing n ₄ instructions the counter reading Z ₄ = 7,947. The four counter reading values 20a, 20b, 20c, 20d together form the counter reading data 22 and can be contained in the response message 18 as plain text. As an alternative to this, the counter reading data 22 can also be transmitted in the form of a single numerical value which is calculated from the counter reading values 20a, 20b, 20c, 20d. If the counter values 20a, 20b, 20c, 20d are transmitted as plain text to the main component 12, the main component 12 can compare the received four values with four reference values in order to identify whether the checked accessory component 14 is an original acts. As an alternative to this, it is also possible that the counter reading values 20a, 20b, 20c, 20d are not transmitted to the main component 12 as individual values, but rather that, for example, the sum total of all Counter reading values 20a, 20b, 20c, 20d or a hash value from the product of the individual values is determined.

7 shows a response message 18 according to a second embodiment of the method according to the invention, the response message 18 containing both meter reading data 22 and a device ID 24. As described above, the counter reading data 22 can contain a single counter reading value, a plurality of counter reading values or a value which is determined from a plurality of counter reading values. The device ID 24 can be, for example, a twenty-digit ID, of which z. B. the first five digits describe a group of microcontrollers and the last 15 digits the individual microcontroller. The device ID 24 can in particular be stored on a ROM of the accessory component 14 and read out when the test program is executed.

8 shows a response message 18 according to a third embodiment of the method according to the invention. In the embodiment shown, the response message 18 contains a hash value 26 which is calculated from the counter reading data 22 and the device ID 24. The use of a hash function has the advantage that slight deviations in the meter reading data 22 or the device ID 24 lead to a significant deviation in the hash value 26, so that the main component 12 can more easily recognize that the values determined when the test program was executed are different from the values that would be expected in the case of an original accessory component. Another advantage of using the hash function is that a check value with a constant length is always transmitted. This is particularly advantageous if numerous counter values are determined when the test program is executed and these values are to be used for the authentication of the accessory component 14. In this case, for example, the amount of data transmitted from the accessory component 14 to the main component 12 can be significantly reduced through the use of the hash function and the transmission of the hash value 26. 9 shows a response message 18 according to a fourth embodiment of the method according to the invention. In this embodiment, the response message 18 contains a hash value 26 which is determined from the counter reading data 22, the device ID 24 and a program code 28. The program code 28 can be, for example, the binary code of the test program. The hash value 26 can be calculated, for example, from a series of the counter reading data 22, the device ID 24 and the program code 28. Alternatively, it can also be provided, for example, that the counter reading data 22, the device ID 24 and the program code 28 are first added or multiplied with one another and then the hash value 26 is calculated from the sum or the product of the input variables mentioned. The hash function used can be, for example, an SHA algorithm (Secure Hash Algorithm). The embodiment shown in FIG. 9 can be viewed as particularly advantageous, since a manipulation of the counter reading data 22, the device ID 24 or the program code 28 leads to a significant change in the hash value 26, which can be recognized directly by the main component 12 whether the accessory component 14 is an original or an imitation.

In FIGS. 10 and 11 show further representations of the method according to the invention, which will be discussed below in connection with the alternative description of the invention.

REFERENCE CHARACTERISTICS device main component accessory component request message response message a first meter reading b second meter reading c third meter reading d fourth meter reading meter reading data device ID hash value program code 0 an exemplary embodiment of the method according to the invention for operating an electrical device 2 to 114

Steps of the method according to the invention

In order to further illustrate the present invention, it is presented in the following on the basis of an alternative description of further, optional aspects of the invention.

background

The invention relates to pairs of a host system, e.g., a drill, an electronic cigarette or printer, and an interchangeable device, e.g., a rechargeable battery, a cartridge or an ink cartridge. It is suitable for manufacturers who want to prevent non-authentic devices from being used with authentic host systems. It describes a method with which the device controller verifies authentication features to the host system via a suitable data interface and a suitable protocol.

State of the art

Prior art authentication methods use knowledge of a secret key as an authentication feature, for example. Knowledge of the secret key must be proven using a suitable cryptographic protocol. The serious disadvantage of cryptographic solutions for the aforementioned area of application is that the one-time compromise of a secret key is sufficient to produce any number of counterfeit devices. A demonstrably effective protection against high attack potential is only achieved with certified cryptographic hardware from "Evaluation Assurance Level" EAL4 +, which leads to considerable additional unit costs.

Fallback measures, such as the revocation of certificates for compromised, secret keys, do not exist for the area of application mentioned, since the host systems in the field do not establish a connection with the corresponding servers. Another disadvantage is the additional costs due to the need to protect the secret key outside of the host system and the logistics associated with key management. Compared to the pair of devices without authentication, the present invention requires very low additional unit costs.

expense

The disclosed authentication method requires approx. 1 kB additional flash memory on the host side and 2-3 kB on the device side. For each application, data transmission of 200 - 250 bits is required as a stimulus from the host system to the device and 64 - 128 bits as a response. The computation time required is comparable to the computation time of a cryptographic software hash for processing an input block and significantly less than the computation time for an asymmetrical, cryptographic signature process.

Task

The task is first to identify characteristic hardware features for the product version of the device controller, which are suitable for checking by the host system, and finally a test method for these hardware features in combination with the manufacturer ID to represent which is difficult to outsmart.

Hardware characteristics

A “test” or “stimulus response test (SRT)” is a specified sequence according to which the test environment applies stimuli to the interface between test environment and test object and measures responses. The test specification includes the stimulus data, in particular the dependency of stimulus data on measured responses, and the stimulus timing. If a test can be repeated, ie if a test object always delivers the same responses when the test is repeated, then the quadruple (test environment, test, stimuli, responses) can be regarded as a "feature" of the test object. The "check" of a feature consists of a test and a subsequent comparison of the responses with reference values. In the following, a distinction is made between "isolated", "internal" and "external" tests of certain hardware features of the device controller, depending on different test environments.

"Isolated" tests are used to check specified features of individual hardware blocks, such as ALU, memory modules, peripheral modules. They take place in a specialized laboratory of the chip manufacturer with specialized test systems and probing points as a test interface. Isolated hardware features can be found in the product-specific reference manual. Depending on the debug system of the device controller, some isolated tests are also possible on the part of the host system, provided that it is connected to the debug interface of the device controller.

Isolated tests of ALU, memory and peripheral modules can be translated into "internal" tests, in which the CPU takes over the function of the test system. In the internal test, the stimuli are sent via write access using STORE instructions, and the responses are received via read access using LOAD instructions. The instruction code executed by the CPU is part of the test specification for the internal test. With this translation it should be noted that the "internal responses" do not always match the responses known from isolated tests. This is mainly due to the overlap between the "internal test system" and the test object.

In the "external" test, devices connected to external interfaces of the device controller act as a test system. The initial programming of the device controller is part of the complete test specification. The test object for the external test is the hardware of the device controller including ROM content, possibly together with external wiring and peripherals.

An external test can contain many internal tests. Some internal features of the processor core, memory and peripherals are always implicitly tested by external tests because the test code is executed by the processor core instructions are fetched from memory by the pipeline, and the communication uses the peripherals.

The authentication according to the disclosed invention takes place through external testing, the host system being the testing system. Each host system checks at least one external characteristic, which includes the examination of many internal characteristics of special hardware modules as well as the verification of the manufacturer ID. The internal features mentioned are translations of isolated hardware features which, taken together, characterize the functional product design of the device controller used.

A host-specific, external feature of an authentic device controller is suitable for the disclosed authentication method if every controller of a different version and every controller of the same version but different manufacturer ID fails the external check. This assumes that the feature is difficult to simulate. The test code of the device controller must include the examination of internal features in a form that is difficult to simulate. To illustrate this, some hardware features are named below and a suitable stimulus-response test with simulation countermeasures is described in each case.

Instruction Set / Hardware Fault Exception: An external test begins when a test application is brought into the manufacturer. This step is always a prerequisite for checking a hardware feature in the field. The host system sends code and data to be processed as stimulus to the device controller, whose authentication application loads and executes code and data, see FIG. 11. The execution includes the sending of a response to the host system. Alternatively, the test environment includes a debug system on the device side, via which the device controller is controlled by the guest. The host system compares the response and, if necessary, the time delay between stimulus and response with reference values. Among other things, the hardware feature is checked to determine whether the instruction set of the device controller covers the code sent. The handling of execution errors depends on the hardware Characteristic whether the device controller supports hardware fault exceptions. Depending on the test code, additional, internal hardware features are checked.

CPU waiting cycles and hazards: In an extension of the first-mentioned test class, the code often includes the query of timer values. Conveniently, all timers of the device controller are configured differently in the test code, repeatedly reconfigured pseudo-randomly and queried multiple times. The timer values are part of the response, either directly or summarized via a hash function.

Memory: In an extension of the last-mentioned test class, the code also includes access to memory addresses. Read and write accesses are combined, for example to explore the limits of ROM and RAM. A suitably implemented hardware fault exception handler is used to detect when there is write access to ROM and write or read access to undefined addresses.

Periphery: In an extension of the last-mentioned test class, the code also includes access to peripheral registers. In one example, a pin 0 of a GPIO port A configured as an output is wired directly to a pin 1 of a GPIO port B configured as an input on the device board. The device controller has a DMA controller which, if configured appropriately, allows port B input to be redirected to a RAM memory area C without the CPU having to do anything. The test code is enriched with internal tests, which consist of write access to port A, read access to port B, and write and read access to port C. A simulation then not only has to take into account the peripheral functions, but also all CPU waiting cycles which are caused by BUS accesses by the DMA controller. Such an integration of peripherals makes the simulation even more difficult compared to the previously mentioned test class. Interrupts: In an extension of the last-mentioned test class, the code also contains a suitable interrupt configuration and interrupt service routines for the peripheral components involved, eg timer overflow interrupts and port B pinl toggle interrupt. In a favorable embodiment, the test code is changed by the interrupt service routines, for example by exchanging lines in the implementation of a hash function. In general, the interrupts control the timing of the execution of the test code hardware, which makes simulation even more difficult.

Characteristic hardware features: Every controller has functional properties that characterize the functional product design of the controller product as a whole. They can be identified by comparing them with similar products based on the following questions: Which processor architecture and which variant of the instruction set are used? Which memories are available in which size, and how are they addressed? Which peripheral modules are available and how are they addressed? What configuration options are there for this, and what are the dependencies between peripheral modules? The identified, characteristic properties can be translated into isolated features.

In an extension of the last-mentioned test class, the code also contains an internal test for each feature from a list of isolated hardware features which, taken together, characterize the functional product execution of the device controller. This gives an external test for the device controller execution, which is difficult to pass with simulated hardware.

Manufacturer ID: In an extension of the last-mentioned test class, the code also includes queries for the manufacturer ID. To make the simulation more difficult, the test code must firstly use indirect addressing so that access to the manufacturer ID cannot be recognized directly from the code or can be redirected through code manipulation, and secondly, the internal responses are entered into the hash code. Include calculation. This gives you a Class of external tests for the device controller execution and the manufacturer ID, which are difficult to pass with simulated hardware.

Hostsvstem-individual test

In the previous sections, a class of tests was described which is suitable for checking the authentic device controller hardware in combination with checking the manufacturer ID by the host system.

In order to generate host-specific tests, use is made of the fact that a test of the last-mentioned test class consists on the one hand of a sequence of many internal SRTs and, on the other hand, the internal SRTs deliver different responses when a known sequence is rearranged and the stimulus values are changed that cannot be fully derived from the known responses. Such a rearranged test of the test class described remains a test of characteristic hardware features and the manufacturer ID. The essential step in generating host-specific tests consists in permuting the internal SRT of a specified, external SRT host-specifically. Additional steps are named below by way of example in the exemplary embodiment.

Authentication procedure

Before the device pairs are rolled out, an individual test is generated for each host system, as disclosed, and an external reference response is generated with the help of an authentic reference device. Each host system is provided with the external stimulus and the reference value for its individual test in the manufacturer's environment. In the manufacturer environment, the devices all receive an identical authentication application that supports the selected tests. The authentication application can be omitted if the host system is connected to the device via a suitable debug interface. The device can then be stimulated via the debug interface.

In the field, the host system checks the authenticity of the counterpart at given times. The sequence is shown in FIG. The host system has it only the task of sending the stored external stimulus, receiving the external response and comparing it with the stored reference value and finally, depending on the success of the comparison, starting the normal device function.

Embodiment

Coding of isolated / internal tests

If you ignore the requirements for the time sequence, an isolated or internal test in the simplest version consists of writing the stimulus to a WriteAddress and then reading the response from a ReadAddress. To make the simulation more difficult, the stimulus for the internal tests to be carried out is not yet defined, but is generated pseudo-randomly during the execution. If the WriteAddress is a configuration register of a periphery, it can make sense to keep certain stimulus bits fixed at 0 or 1. For randomly selected stimuli, the restriction can be enforced by logically combining the stimulus with an AND mask before writing and then with an OR mask. Conversely, the reset value at the ReadAddress may not have to be defined for all bits, or some bits should be ignored in the test. This is done by linking the response value with an AND mask. A simple, isolated or internal test is with the exception of the definition of the stimulus and the timing by a 5-tuple

(WriteAddress, WriteAndMask, WriteOrMask, ReadAddress, ReadAndMask). An isolated or internal test is obtained by hanging simple tests one after the other.

Compressed representation of simple tests

In the exemplary embodiment, addresses are 32 bits wide. The device controller has a memory that can already be clearly assigned with 19 bits. The lower 16 bits correspond to normal addressing, the upper three bits choose between different physical memory modules. ReadAddress and WriteAddress are represented in a 5 byte block, whereby bytes 1-2 represent the lower 16 bits of the WriteAddress, bytes 3-4 the lower 16 bits of the ReadAddress and byte 0 contains the following information: Bit 0 indicates whether a 32 Bit WriteAndMask and a 32-bit WriteOrMask follow, bit 1 indicates whether a 32-bit ReadAndMask follows, bits 2-4 represent the memory module for write, bits 5-7 the memory module for read. If bit 0 or bit 1 is equal to zero, the trivial masks are to be selected as masks, ie b'l ... l as the AND mask and b'0 ... 0 as the OR mask. Non-trivial masks are appended to the 5-byte block. Depending on bits 0 and 1, this results in a length of 5, 9 or 17 bytes for the compressed representation of a simple test. In the exemplary embodiment, a fixed list of 140 simple tests is stored in the flash of the device controller. The compressed length is 20 times 17 bytes, 40 times 9 bytes and 80 times 5 bytes, ie a total of 1200 bytes have to be saved. During execution, the list is decompressed in sections and loaded into RAM.

Interweaving internal tests

In the exemplary embodiment, the device manufacturer lists a number of internal tests that together characterize the hardware version of the device controller and each consist of several simple SRTs. In the exemplary embodiment, the collection of these simple SRTs is arranged in a suitable manner in a sequence SRT_0, SRT_1,... So that four consecutive, simple SRTs belong to four different internal tests and the SRTs belonging to an internal test in the appear in the order determined by the internal test. In the exemplary embodiment, the length of the sequence is 140. The sequence is subdivided into a sequence of 35 blocks of 4 simple SRT each. A host-specific interweaving of the internal tests is done by permutating the tests within a block. A host-specific interweaving is thus to be defined as a sequence pO, ..., p34 of 4-way permutations. A suitable coding needs 5 bits per permutation. This means that a host-specific interweaving can be represented using 175 bits. Pseudo-random read access

The stimulus-response tests, which can be coded as sequences of 5-tuples, are suitable for testing behavioral characteristics of the device controller. The following alternative is available for checking runtimes and contents in contiguous RAM or ROM areas: A projection function can be implemented for each contiguous area to be checked, which maps every 32-bit word to an area address. In the exemplary embodiment, the following eight areas are checked in this way: ROM code area, Flash area, RAM code area, RAM stack area, RAM data area, chip ID area, area of the Manufacturer ID, timer register area. From a deterministic pseudo-random source described below, 3 bits are used for area selection per read access and 32 bits are mapped to an area address by area-specific projection function.

Hostsvstem-specific hash function

In order to go from a selection of internal tests to an external test again in a host-specific manner, a hash function with host-specific parameterization is recommended. No cryptographic hash function is required to make the simulation more difficult, only a hash function that can be easily adapted to the host system and runs efficiently on the device controller.

It makes sense to use the hash function's state buffer as a pseudo-random source for the stimulus of every simple, internal test. In addition, as a simulation countermeasure, it makes sense to include not only the response, but also the stimulus, as well as the ReadAddress and WriteAdress of a test in the hash calculation.

In the exemplary embodiment, CPU instructions op_0 - op_7, each with 3 CPU words as input and one CPU word as output, are defined as follows for host system-specific CPU instructions: F0 (x, y, z) = op_0 (x, op_l (y, z))

Fl (x, y, z) = op_2 (x, op_3 (y, z))

F0 (x, y, z) = op_4 (x, op_5 (y, z))

F0 (x, y, z) = op_6 (x, op_7 (y, z))

Logical operations, addition and multiplication are particularly suitable for the instructions opj. It is advantageous to reserve CPU registers in the main program for the hash buffer. In the exemplary embodiment, the registers R0-R3 are selected. The registers receive the last 128 bits of the stimulus as an initial value.

At least one hash round is carried out for each internal SRT. Stimulus generation, writing the stimulus, reading the response and reading a pseudo-random address are defined for an internal test such as shown in drawing 2, directly connected to the hash update: RI serves as a pseudo-random source for the stimulus, which is formed by linking RI with WriteAndMask and WriteOrMask. The stimulus is written to the WriteAddress address, then the response is read from the ReadAddress. The stimulus and the values R2, R3 in the buffer form the input of F0, the output of which is linked to R0 via XOR. R0 is then linked with the AND link of Response and ReadAndMask via XOR and overwritten with the result.

R0, R2 and R3 form the input of F2, whose output is linked with RI via XOR. Then the result is XORed with WriteAddress and R2 is overwritten with the result. R0, R1 and R3 form the input of F2, whose output is linked with R2 via XOR. Then the result is XORed with ReadAddress and R2 is overwritten with the result. R2 and the 3 lowest R1 bits are now used as a pseudo-random source for the pseudo-randomized read access described above. The read data are linked with R3 via XOR and R3 is overwritten with the result. R0, R1 and R2 form the input of F3, whose output is linked with R3 via XOR. In the exemplary embodiment, the hash function is generated by the authentication application of the device controller from a basic structure stored in flash, an opcode lookup table with 16 entries stored in flash, depending on the host-specific opcode selection, at runtime assembled and loaded into RAM. The host-specific opcode selection is done by transmitting 8 times 4 equal to 32 bits within the external stimulus.

Code dvnamisieruna through interrupt service routines

The sequence of instructions for the described hash update in connection with an SRT and a pseudo-random read access is not clearly defined. In the exemplary embodiment, the manufacturer selects a fixed instruction sequence which contains the opcode variables op0, ..., op7. It identifies pairs of instructions within this sequence that allow interchangeability without fundamentally changing the procedure. In the exemplary embodiment, code dynamization is implemented in that interrupt service routines are implemented in the test code in such a way that they each carry out one of the identified swaps. After the swap, stimuli, responses and read data will turn out differently, since read timer values in particular change.

External stimulus

In the exemplary embodiment, the external stimulus consists of 207 bits, of which 175 bits encode a sequence of 35 permutations of four consecutive SRTs stored in the flash of the device controller and 32 bits, which are 8 times 4 bits, the opcodes for op0, ... , select op7 from a lookup table stored in the flash of the device controller.

Main program of the device controller

In the exemplary embodiment, after receiving the stimulus, the main program of the device controller loads the basic structure for the hash update routine described above into the RAM and supplements the received opcodes opO, ..., op7. Then it decompresses part of the SRT and stores the decompressed ones 5-tuples in RAM. The main loop is then started, which includes the decompression of one or more tests and overwriting of the tests already carried out in RAM, as well as the combined execution of an SRT, a pseudo-random read access and a hash update in each round. After the last round, the content of half the hash buffer is transmitted to the host system. The response thus consists of 64 bits.

Several guest controller variants

The method described can also be used if the device manufacturer wants to use several different hardware versions for the guest controller. Then either the response of a stimulus response test can be compared with several authentic reference values, or the host system selects a suitable stimulus response test for the device controller, depending on the hardware design. The claims remain unaffected.

Combination with graphical methods

The method for authenticating a device according to the present invention can be combined with cryptographic methods.

Further preferred aspects of the present invention are mentioned below.

Aspect 1

Method for electronic authentication of a device by a host system, characterized in that all authentic devices are provided with a microcontroller of the same functional hardware version, a device as an authentication feature proves that it has a microcontroller of the authentic hardware version, the test of this authentication feature includes a stimulus-response test, in which the host system sends a host-system-specific stimulus to the device and compares the response of the device with an authentic response stored in the host system, the authentic response of this stimulus-response Tests depend on how many cycles an authentic device controller needs to execute one or more CPU instruction sequences determined by the device configuration and the stimulus.

Aspect 2

Method for electronic authentication of a device by a host system, characterized in that all authentic devices are provided with a microcontroller of the same functional hardware version, all authentic devices have the same manufacturer ID at fixed addresses in an unchangeable memory area , a device proves as an authentication feature that it has a microcontroller of the authentic hardware version, a device proves the correct manufacturer ID as an authentication feature, the testing of the two authentication features mentioned includes a stimulus-response test which the host system sends a host system-specific stimulus to the device and compares the response of the device with an authentic response stored in the host system, the authentic response of this stimulus-response test depends on how many cycles an authentic device controller is used for execution one or more CPU instruction sequences determined by the device configuration and the stimulus are required.

Aspect 3

A method for electronic authentication of a device by a host system, characterized in that all authentic devices are provided with a microcontroller of the same functional hardware version, a device as an authentication feature proves that it has a microcontroller of the authentic hardware version that Checking this authentication feature includes a stimulus-response test in which the host system sends a host-system-specific stimulus to the device and compares the response of the device with an authentic response stored in the host system, the authentic response of this stimulus-response test depends on the address limits of RAM, ROM and I / O register area of an authentic device controller. Aspect 4

Method for electronic authentication of a device by a host system, characterized in that all authentic devices are provided with a microcontroller of the same functional hardware version, a device as an authentication feature proves that it has a microcontroller of the authentic hardware version, the test of this authentication feature includes a stimulus-response test, in which the host system sends a host-system-specific stimulus to the device and compares the response of the device with an authentic response stored in the host system, the authentic response of this stimulus-response Tests on the specified reset values in the I / O and system registers of an authentic device controller.

Aspect 5

Method for electronic authentication of a device by a host system, characterized in that all authentic devices are provided with a microcontroller of the same functional hardware version, a device as an authentication feature proves that it has a microcontroller of the authentic hardware version that Checking this authentication feature includes a stimulus-response test in which the host system sends a host-system-specific stimulus to the device and compares the response of the device with an authentic response stored in the host system, the authentic response of this stimulus-response test depends on the dependencies between the values in various I / O registers, system registers and RAM areas of an authentic device controller.

Aspect 6

Method for electronic authentication of a device by a host system, characterized in that all authentic devices are provided with a microcontroller of the same functional hardware version, a device as an authentication feature proves that it has a microcontroller the authentic hardware version, the test of this authentication feature includes a stimulus-response test with host-specific stimulus, in which a debug interface of the device controller is used as a test interface.

Claims

EXPECTATIONS A method for operating an electrical or electronic device (10) comprising a main component (12) and an accessory component (14), the method comprising the following steps: Sending a request message (16) from the main component (12) to the accessory component (14); Executing a first test program on the accessory component (14); Sending a response message (18) from the accessory component (14) to the main component (12); Evaluation of the response message (18) received from the accessory component (14) by the main component (12), the response message (18) having a test value determined by the first test program and the test value in the evaluation of the response message (18) with a Reference value is compared; wherein the test value compared with the reference value is dependent on a processing speed of the first test program by the accessory component (14); and Activation of a predetermined and previously deactivated function of the device (10), provided that the comparison of the test value with the reference value has shown that the values compared with one another are identical. 2. The method according to claim 1, characterized in that the first test program has a number n of CPU instructions and that the first test program provides that after execution of nl instructions on the accessory component (14) a counter reading is read, nl being smaller or is equal to n, and wherein the counter reading read out is contained in the test value sent to the main component (12). 3. The method according to claim 2, characterized in that after execution of n2 instructions on the accessory component (14), the counter reading is read again, where n2 is greater than nl and less than or equal to n, and where the two counter readings or the difference the both counter readings are contained in the test value sent to the main component (12). 4. The method according to any one of claims 1 to 3, characterized in that the execution of the first test program on the accessory component (14) requires a number m of clock cycles and that the first test program provides that after ml clock cycles on a memory element of the accessory component (14) Stored program status data are read from, where ml is less than or equal to m, and where the program status data read out are contained in the check value sent to the main component (12). 5. The method according to claim 4, characterized in that, after m2 clock cycles on the accessory component (14), program status data are read out again, where m2 is greater than ml and less than or equal to m, and where the two program status data are sent to the main component ( 12) sent test value is included. 6. The method according to any one of the preceding claims, characterized in that the first test program provides for the implementation of an interrupt service routine and that after the triggering of an interrupt on the accessory component (14) program status data is read out and then in the main component ( 12) sent test value are included. 7. The method according to any one of the preceding claims, characterized in that the first test program contains at least one write instruction and / or one read instruction. 8. The method according to claim 7, characterized in that the write instruction comprises writing a value in a peripheral register and / or the read instruction comprises reading a value from a peripheral register. 9. The method according to any one of the preceding claims, characterized in that the Reply nach richt (18) has a device ID (24) of the Zubehörkompo component (14) and that during the evaluation of the reply message (18) by the main component (12) from the accessory component (14) received device ID (24) or a part of this device ID (24) is compared with a predetermined device ID reference value. 10. The method according to any one of the preceding claims, characterized in that the response message (18) is not transmitted as plain text to the main component (12), but as a hash value (26) calculated from the response message (18). 11. The method according to claim 10, characterized in that the response to be hashed (18) comprises processor authentication data, program authentication data and a device ID (24). 12. The method according to any one of the preceding claims, characterized in that the first test program is stored in a memory element of the Zubehörkom component (14). 13. The method according to claim 12, characterized in that at least one second test program is stored on the storage element of the accessory component (14) in addition to the first test program and that the request message (16) has program selection data indicated by the accessory component (14) which of the test programs is to be executed. 14. The method according to any one of the preceding claims, characterized in that the request message (16) has modification data by means of which the test program to be executed is modified. 15. The method according to any one of the preceding claims, characterized in that when evaluating the response message (18) received from the accessory component (14) by the main component (12), the received test value is compared with a plurality of reference values, with the specified value then Function is activated if the comparison of the test value with one of the reference values is identical. 16. System comprising an accessory component (14) and a Hauptkompo component (12), wherein the main component (12) is designed to authenticate the accessory component (14) by the method according to claims 1 to 15 and a predetermined function of the system to activate if the authentication of the accessory component (14) was previously successful. 17. System according to claim 16, characterized in that the Hauptkom component (12) is a drill and the accessory component (14) is an associated battery device. 18. Main component (12) of an electrical or electronic device (10) comprising a microcontroller, wherein the microcontroller is designed to send a request message (16) to an accessory component (14) of the electrical or electronic device (10); to receive a response message (18) from the accessory component (14); evaluate the received response message (18), the response message (18) having a test value and the test value being compared with a reference value when evaluating the response message (18); wherein the test value compared with the reference value is dependent on a processing speed of the first test program by the accessory component (14); and to activate a predetermined function of the device (10), provided that the comparison of the test value with the reference value has shown that the values compared with one another are identical. 19. Accessory component (14) of an electrical or electronic device (10), comprising a microcontroller which is designed to receive a request message (16) from the main component (12); run a test program; and send a response message (18) to the main component (12); wherein the response message (18) has a test value determined by the test program; and the test value has a dependency on a processing speed of the first test program by the microcontroller.