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EP0721656A1 - Procede de production de couches microcristallines, et utilisation desdites couches - Google Patents

Procede de production de couches microcristallines, et utilisation desdites couches

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Publication number
EP0721656A1
EP0721656A1 EP94928282A EP94928282A EP0721656A1 EP 0721656 A1 EP0721656 A1 EP 0721656A1 EP 94928282 A EP94928282 A EP 94928282A EP 94928282 A EP94928282 A EP 94928282A EP 0721656 A1 EP0721656 A1 EP 0721656A1
Authority
EP
European Patent Office
Prior art keywords
hydrogen
cvd
microcrystalline
reactor
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP94928282A
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German (de)
English (en)
Inventor
Reinhard Schwarz
Svetoslav Koynov
Thomas Fischer
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Schwarz Reinhard
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Individual
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Filing date
Publication date
Priority claimed from DE4333416A external-priority patent/DE4333416C2/de
Application filed by Individual filed Critical Individual
Publication of EP0721656A1 publication Critical patent/EP0721656A1/fr
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
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    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/822—Materials of the light-emitting regions
    • H10H20/826—Materials of the light-emitting regions comprising only Group IV materials
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24—Deposition of silicon only
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45557—Pulsed pressure or control pressure
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H10F71/1215—The active layers comprising only Group IV materials comprising at least two Group IV elements, e.g. SiGe
    • H10F71/1218—The active layers comprising only Group IV materials comprising at least two Group IV elements, e.g. SiGe in microcrystalline form
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H10F71/1224—The active layers comprising only Group IV materials comprising microcrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/014—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group IV materials
    • H10H20/0145—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group IV materials comprising polycrystalline, amorphous or porous Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/052—Light-emitting semiconductor devices having Schottky type light-emitting regions; Light emitting semiconductor devices having Metal-Insulator-Semiconductor type light-emitting regions
    • H—ELECTRICITY
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    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/817—Bodies characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous
    • H10H20/818—Bodies characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous within the light-emitting regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/545—Microcrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to a process for the production of microcrystalline layers from elements of the IV main group of the periodic table, such as silicon, germane or tin, and a process for the production of luminescent silicon structures, solar cells and transistors.
  • the invention further relates to the layers or products produced using these methods.
  • Microcrystalline layers in particular made of silicon, are becoming increasingly important because of their optical and electronic properties and because of the possibility of depositing the layers at low temperatures (200 to 300 ° C.). Preferred areas of application of such layers are solar cells, thin-film transistors as well as LEDs.
  • the most common method for the deposition of microcrystalline silicon ( ⁇ c-Si) is the CVD method.
  • the layers are produced using SiH 4 in hydrogen as the process gas. SiH 4 is in a highly diluted form
  • Hydrogen (less than 5 vol.%) Applied (T. Hamasaki, H. Kurata, M. Hirose, U. Osaka, Appl. Phys. Lett. 37 (1980) 1084).
  • the low-temperature formation of the crystalline phase can be understood as a balance between the silicon deposition and the removal of the areas with disordered Si-Si bonds by the atomic hydrogen. This process is referred to as hydrogen etching (C.C. Tsai, G.B. Anderson, R. Thompson, B. Wacker, J. Non-Cryst. Sol. 114 (1989) 151).
  • a problem with this conventional PE-CVD is that the growth of the ordered microcrystalline Si layer requires mild plasma conditions, whereas the production of the necessary atomic hydrogen for the hydrogen etching requires a high pressure and a high power of the hydrogen plasma .
  • Another problem is that the deposition rate is very low at 5 to 10 ⁇ / min.
  • microcrystalline produced in this way Layers are particularly characterized in that the microcrystalline layer has a crystallite content of 20 to 95%, so-called element dots, ie spatially limited crystallites, being formed.
  • the hydrogen treatment is carried out in such a way that after the amorphous layer has been deposited with process gases known per se and under customary conditions, the process gas stream and the hydrogen flow and the connection of the CVD reactor to the pump are at least temporarily interrupted.
  • the hydrogen treatment is carried out with the amount of hydrogen still in the reactor.
  • the procedure is preferably such that the hydrogen flow is switched off with a time delay, so that there is an increased proportion of hydrogen in the reactor. Because the hydrogen is present in the closed system, the conversion of the amorphous layer to the microcrystalline layer is favored.
  • the decomposition of SiH 4 in strong hydrogen dilution in plasma is a reversible process, which can be expressed by the following relationship:
  • the silicon atoms are etched away from the amorphous solid silicon phase by the hydrogen atoms, and SiH n radicals are formed. Since the attack of the hydrogen atoms takes place at preferred locations on the amorphous silicon layer, corresponding microcrystalline layers also form at preferred locations.
  • the process gas stream and the hydrogen stream and the connection to the vacuum pump are not interrupted at the same time, but rather that the hydrogen stream can flow into the reactor for a short time, at most until an increase in pressure in the reactor until about 1 atmosphere takes place.
  • the process offers the further advantage that the crystallite content can be controlled individually by the duration of the hydrogen treatment.
  • the crystallite content that can be achieved with the process according to the invention is a maximum of 95%.
  • the crystallite size can also be set by selecting the process parameters.
  • the process described above is called the CC-CVD process.
  • the cyclic CC-CVD process accordingly consists of a repeatable cycle, each cycle consisting of two steps, namely a) the deposition of a thin amorphous silicon layer and b) hydrogen treatment in a closed CVD process, such as described above.
  • the method presented can in principle be carried out using all common CVD methods. These include ECR-CVD, VHF-CVD and hot wire CVD processes. It is also possible to use different CVD processes for the individual steps of each cycle.
  • the method according to the invention is carried out with silicon as element and SiH 4 and hydrogen as process gases.
  • the method described above is particularly suitable for producing luminescent element structures, in particular for producing luminescent Si structures.
  • Luminescence is the emission of light in the visible range, in the UV and IR spectral range, among others. of solids after energy supply.
  • the luminescence is due to a transition from an electron from an energetically higher state to an unoccupied energetically lower state. Since unoccupied electron states are often treated as positively charged "holes", the luminescence can also be described as a recombination of a pair of electron holes in which the energy released is at least partially released in the form of a light quantum (photons).
  • the luminescence processes can be based on the type of energy supply in photoluminescence (optical excitation) and classify electroluminescence (application of a voltage by an electric field).
  • the phenomenon of luminescence is of particular interest in the semiconducting materials, since it enables various applications in microelectronics.
  • Typical materials with such a direct band transition are, for example, GaAs compound semiconductors.
  • silicon is a semiconductor material with an indirect band transition. It was therefore to be expected that silicon would not be available for electroluminescence applications.
  • various methods and processes have become known which make it possible to produce an electroluminescent Si structure.
  • Either the microcrystalline layers produced as described above are subjected to a wet-chemical etching process known per se, or the element dots are passivated under closed-char er conditions.
  • the variant of the method according to the invention for processing the microcrystalline layers described under closed-chamber conditions has proven to be favorable. It is advantageous here that several of these layers can be produced one above the other (multi-layers), so that electroluminescence can be achieved with a very high efficiency.
  • a further improvement can be achieved by using insulator layers, e.g. from a-SiC: H or a-SiN: H, as an initiating contact. The charge carriers get into the active layer (AL) through tunnels and reach them with very high energy. This results in a further increase in efficiency.
  • a further improvement in the yield is achieved by repeating the active layers (AL) and insulating layers (IL).
  • the method of microcrystalline layers described at the outset is also particularly suitable for producing solar cells and for producing high-performance thin-film transistors. Further features, details and advantages of the invention result from the following description of a method example of the invention and from the drawings. Show it:
  • FIG. 1 schematically shows the CVD reactor both in the first and in the second process step and the associated process parameters
  • FIG. 2 shows schematically the formation of the microcrystalline layer for two selected areas during the process
  • FIG. 3 shows a Raman Spectrum for two different samples
  • FIG. 4 the conductivity of the layer produced according to the invention
  • FIG. 5 the deposition rate
  • FIG. 1 schematically shows the state of the reaction chamber of a CVD reactor for the two process steps in the upper part of the double graphic.
  • the example concerns the deposition of silicon using SiH 4 as process gas and hydrogen.
  • the reactor 1 is provided with an inlet 2 for the process gas, here SiH 4 , and a separate inlet 3 for the hydrogen.
  • the reactor 1 is connected via the outlet 5 to a pump (not shown).
  • the first step ie the deposition of an amorphous SiH layer, is carried out under conditions known per se with the known process gases SiH 4 and hydrogen.
  • Output 5 to the pump is open, so that the deposition on the substrate 6 is carried out in gas flow (in s).
  • the pressure in mbar can be seen on the ordinate.
  • the conditions for depositing the a-Si: H layer were as follows:
  • the deposition rate was 2.5 ⁇ / s under these conditions.
  • a time period of 35 s was selected for the time period (T d ).
  • T d is approximately 5 s. This makes it possible to produce 12.4 ⁇ thick a-Si: H layers in every cycle.
  • the second step of the cycle for producing the microcrystalline layers is essential to the invention.
  • the output 5 of the pump and the feeds 2 and 3 for the process gas stream and the hydrogen are closed for a certain period of time T H.
  • the procedure was such that the interruption of the hydrogen flow (switching point B) was carried out after the interruption of the process gas flow and the closing of the outlet to the pump (switching point A). It is thereby achieved that the pressure in the reactor rises as a result of the inflowing hydrogen, so that the hydrogen treatment is carried out with an increased proportion of hydrogen, which enables acceleration of the second process step.
  • the curve C within the time interval T H gives the pressure curve again, as it is in CC hydrogen treatment.
  • D represents the course as it occurs when the plasma is switched off or when the process is open, ie in the process known from the prior art.
  • E shows the course for the CC process according to the invention
  • F shows the course for the "open process" known from the prior art.
  • the SiH 4 concentration at the beginning of the second step, ie during the hydrogen treatment is zero (curve F).
  • the hydrogen treatment accordingly takes place in a pure hydrogen atmosphere.
  • the hydrogen treatment in the CC-CVD process takes place in the presence of SiH 4 molecules. This fact obviously has a positive effect on the deposition rate.
  • T H means the duration of the hydrogen treatment
  • ⁇ d the layer thickness per cycle
  • R the deposition rate
  • d the total film thickness
  • ⁇ d the dark
  • ⁇ ph the photoconductivity
  • E act the activation energy.
  • FIG. 2 shows schematically the formation of the microcrystalline layer, starting from the amorphous layer (a) to the microcrystalline layer (b).
  • An amorphous SiH layer is formed by the first process step of the cycle.
  • This amorphous SiH layer contains partially ordered districts (see arrow).
  • the microcrystalline layer forms - starting from the partially ordered areas shown in (a) - this process can be explained in such a way that it takes place in two stages.
  • a first stage is called “nucleation” and a second stage is called “recrystallization”.
  • G and S symbolize the silicon atoms in the gas phase (G) and the SiH species (S).
  • FIG. 3 shows in comparison the Raman spectra of two samples which were produced by the method according to the invention.
  • the Raman spectrum shows a curve A of sample C 409 that lasts 15 seconds and a curve B (sample C 407) that has been treated with H 2 for 90 seconds and a curve c of sample 0408. It can be seen from this that the method according to the invention is very flexible with regard to the formation of crystallinity. The Raman intensity is canceled on the ordinate.
  • FIG. 4 shows the increase in conductivity (in s / cm) with the progress of the hydrogen treatment in s. This is particularly advantageous for microcrystalline TFTs.
  • FIG. 5 shows how the deposition rate (rpm) of the method according to the invention (symbolized by filled triangles) differs from the open process (filled quadrilaterals). For completeness, the hydrogen dilution is included in this graphic. The activation energy is plotted on the abscissa.
  • microcrystalline layers produced by the process according to the invention are clearly superior to the prior art. These layers open up possible applications for luminescence applications as well as for transistors or solar cells.
  • Fig. 6 (a) shows the structure of a pn diode.
  • a substrate preferably glass or other at least partially transparent substrates, is provided with a contact electrode layer.
  • Such a substrate is made using the method described above
  • the CC-CVD process provided with a microcrystalline layer.
  • the procedure according to the invention is such that at least one cycle, but preferably 2 to 2000 cycles, are carried out so that a sufficiently thick layer is achieved.
  • the microcrystalline layer is produced by means of the CC-CVD process, it is no longer necessary, as previously known from the prior art, to form the microcrystalline layer for luminescence applications from Si wafers in such a way that the Surface of a wa- is treated.
  • the microcrystalline layer thus produced is preferably passivated in a further process step using the CC-CVD process. The passivation can also take place in a "normal", ie open CVD process.
  • a cycle therefore consists of three steps, namely formation of the amorphous SiH layer, generation of the microcrystalline layer and passivation.
  • the procedure here is that the microcrystalline layers are treated with either an oxidizing or a nitriding gas. As a result, so-called active layers (AL) are formed.
  • an active layer produced in this way is again provided with a contact electrode layer on the surface.
  • the contact electrode layer is N-conductive with a metal contact.
  • the contact electrode layer applied to the substrate in the example according to FIG. 6 (a) consists of ITO (indium tin oxide). Electroluminescence was observed when DC voltage was applied to such a pn diode.
  • FIG. 6 (b) An improvement in the efficiency of the electroluminescence can be achieved (FIG. 6 (b)) by applying insulation layers.
  • Fig. 6 (b) shows an example of the setup of such an electroluminescent application.
  • an indium-tin oxide contact electrode is applied as shown in FIG. 6 (a).
  • the active layer AL is surrounded by two insulation layers IL.
  • the thickness of such a layer is in the range from 20 to 500 ⁇ .
  • Such an insulator layer can consist, for example, of amorphous SiC: H or amorphous SiN: H. If an alternating voltage is applied, the charge carriers enter the active layer through tunnels and reach them with high energy.
  • Important parameters for this ac operation are a voltage (determined by the thickness and composition of the insulator layer) and b frequency (determined by the transport properties and the density of states of the active material).
  • the electroluminescence with such a structure shows a significantly better efficiency than the pn-Diode according to FIG. 6 (a).

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  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electroluminescent Light Sources (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Photovoltaic Devices (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

L'invention concerne un procédé permettant de produire des couches microcristallines à partir d'éléments du groupe principal IV de la classification périodique, en particulier Si, Ge, Sn, ou bien leurs alliages tels que SiC ou SiGe, par dépôt chimique cyclique en phase vapeur, ou selon des méthodes apparentées. Selon l'invention, un cycle comprend deux étapes. Au cours de la première étape est produite une couche amorphe de l'élément choisi. A cet effet, un gaz approprié au procédé, tel que des composés élément-hydrogène et l'hydrogène, sont amenés dans des conditions habituelles de dépôt chimique en phase vapeur, au réacteur, en passant sur le substrat, par des systèmes d'alimentation séparés. Au cours de la deuxième étape, est effectué un traitement par hydrogène. Pendant cette deuxième étape, le dispositif d'alimentation en gaz utilisé pour le procédé, le dispositif d'alimentation en hydrogène, ainsi que la communication entre le réacteur dans lequel se fait le dépôt et la pompe sont, au moins temporairement, fermés, de sorte que le traitement par hydrogène se fait selon un procédé de dépôt chimique en phase vapeur, en chambre fermée, cela au moyen de la quantité d'hydrogène ou de composés élément-hydrogène se trouvant dans le réacteur.
EP94928282A 1993-09-30 1994-09-29 Procede de production de couches microcristallines, et utilisation desdites couches Withdrawn EP0721656A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE4333416 1993-09-30
DE4333416A DE4333416C2 (de) 1993-09-30 1993-09-30 Verfahren zur Herstellung von mikrokristallinen Schichten und deren Verwendung
PCT/DE1994/001158 WO1995009435A1 (fr) 1993-09-30 1994-09-29 Procede de production de couches microcristallines, et utilisation desdites couches

Publications (1)

Publication Number Publication Date
EP0721656A1 true EP0721656A1 (fr) 1996-07-17

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Application Number Title Priority Date Filing Date
EP94928282A Withdrawn EP0721656A1 (fr) 1993-09-30 1994-09-29 Procede de production de couches microcristallines, et utilisation desdites couches

Country Status (5)

Country Link
US (1) US5851904A (fr)
EP (1) EP0721656A1 (fr)
JP (1) JPH09508236A (fr)
DE (1) DE4345229C2 (fr)
WO (2) WO1995009435A1 (fr)

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JPH1081973A (ja) * 1996-03-18 1998-03-31 Hyundai Electron Ind Co Ltd 誘導結合形プラズマｃｖｄ装置
US6303945B1 (en) 1998-03-16 2001-10-16 Canon Kabushiki Kaisha Semiconductor element having microcrystalline semiconductor material
FR2812763B1 (fr) * 2000-08-04 2002-10-31 St Microelectronics Sa Formation de boites quantiques
US7122736B2 (en) * 2001-08-16 2006-10-17 Midwest Research Institute Method and apparatus for fabricating a thin-film solar cell utilizing a hot wire chemical vapor deposition technique
JP2003298077A (ja) * 2002-03-29 2003-10-17 Ebara Corp 太陽電池
US7273818B2 (en) * 2003-10-20 2007-09-25 Tokyo Electron Limited Film formation method and apparatus for semiconductor process
TW200905730A (en) * 2007-07-23 2009-02-01 Ind Tech Res Inst Method for forming a microcrystalline silicon film
WO2009145068A1 (fr) 2008-05-26 2009-12-03 三菱電機株式会社 Dispositif de formation de film mince et procédé de fabrication de film de semi-conducteur
GB2549951B (en) * 2016-05-03 2019-11-20 Metodiev Lavchiev Ventsislav Light emitting structures and systems on the basis of group-IV material(s) for the ultra violet and visible spectral range

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JPS5871589A (ja) * 1981-10-22 1983-04-28 シャープ株式会社 薄膜ｅｌ素子
JPS59181683A (ja) * 1983-03-31 1984-10-16 Hiroshi Kukimoto 発光素子
NL8501769A (nl) * 1984-10-02 1986-05-01 Imec Interuniversitair Micro E Bipolaire heterojunctie-transistor en werkwijze voor de vervaardiging daarvan.
US4920387A (en) * 1985-08-26 1990-04-24 Canon Kabushiki Kaisha Light emitting device
US5160543A (en) * 1985-12-20 1992-11-03 Canon Kabushiki Kaisha Device for forming a deposited film
DE4019988A1 (de) * 1989-06-23 1991-01-10 Sharp Kk Duennfilm-eld
JP2880322B2 (ja) * 1991-05-24 1999-04-05 キヤノン株式会社 堆積膜の形成方法
US5242530A (en) * 1991-08-05 1993-09-07 International Business Machines Corporation Pulsed gas plasma-enhanced chemical vapor deposition of silicon
DE4126955C2 (de) * 1991-08-14 1994-05-05 Fraunhofer Ges Forschung Verfahren zum Herstellen von elektrolumineszenten Siliziumstrukturen
US5206523A (en) * 1991-08-29 1993-04-27 Goesele Ulrich M Microporous crystalline silicon of increased band-gap for semiconductor applications
JPH06326024A (ja) * 1993-05-10 1994-11-25 Canon Inc 半導体基板の製造方法及び非晶質堆積膜の形成方法

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Also Published As

Publication number Publication date
JPH09508236A (ja) 1997-08-19
DE4345229A1 (de) 1995-04-06
US5851904A (en) 1998-12-22
DE4345229C2 (de) 1998-04-09
WO1995009443A1 (fr) 1995-04-06
WO1995009435A1 (fr) 1995-04-06

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