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DE60324117D1 - Multibit Speicheranordnung und Verfahren zur Programmierung und zum Auslesen derselben - Google Patents

Multibit Speicheranordnung und Verfahren zur Programmierung und zum Auslesen derselben

Info

Publication number
DE60324117D1
DE60324117D1 DE60324117T DE60324117T DE60324117D1 DE 60324117 D1 DE60324117 D1 DE 60324117D1 DE 60324117 T DE60324117 T DE 60324117T DE 60324117 T DE60324117 T DE 60324117T DE 60324117 D1 DE60324117 D1 DE 60324117D1
Authority
DE
Germany
Prior art keywords
programming
reading
same
memory device
multibit memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60324117T
Other languages
English (en)
Inventor
Yi-Chou Chen
Chih-Yuan Lu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Macronix International Co Ltd
Original Assignee
Macronix International Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Macronix International Co Ltd filed Critical Macronix International Co Ltd
Application granted granted Critical
Publication of DE60324117D1 publication Critical patent/DE60324117D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5678—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
DE60324117T 2003-06-18 2003-11-19 Multibit Speicheranordnung und Verfahren zur Programmierung und zum Auslesen derselben Expired - Lifetime DE60324117D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/465,012 US7180767B2 (en) 2003-06-18 2003-06-18 Multi-level memory device and methods for programming and reading the same

Publications (1)

Publication Number Publication Date
DE60324117D1 true DE60324117D1 (de) 2008-11-27

Family

ID=33418170

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60324117T Expired - Lifetime DE60324117D1 (de) 2003-06-18 2003-11-19 Multibit Speicheranordnung und Verfahren zur Programmierung und zum Auslesen derselben

Country Status (6)

Country Link
US (1) US7180767B2 (de)
EP (1) EP1489623B1 (de)
JP (1) JP5611499B2 (de)
CN (1) CN100578668C (de)
DE (1) DE60324117D1 (de)
TW (1) TWI223258B (de)

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US7308067B2 (en) 2003-08-04 2007-12-11 Intel Corporation Read bias scheme for phase change memories
US7138687B2 (en) * 2004-01-26 2006-11-21 Macronix International Co., Ltd. Thin film phase-change memory
DE602005024840D1 (de) 2004-09-30 2010-12-30 Nxp Bv Integrierte schaltung mit speicherzellen mit einem programmierbaren widerstand und verfahren zum adressieren von speicherzellen mit einem programmierbaren widerstand
US8116159B2 (en) 2005-03-30 2012-02-14 Ovonyx, Inc. Using a bit specific reference level to read a resistive memory
KR100684908B1 (ko) * 2006-01-09 2007-02-22 삼성전자주식회사 다수 저항 상태를 갖는 저항 메모리 요소, 저항 메모리 셀및 그 동작 방법 그리고 상기 저항 메모리 요소를 적용한데이터 처리 시스템
US20070267620A1 (en) * 2006-05-18 2007-11-22 Thomas Happ Memory cell including doped phase change material
US8084799B2 (en) * 2006-07-18 2011-12-27 Qimonda Ag Integrated circuit with memory having a step-like programming characteristic
US20080019257A1 (en) * 2006-07-18 2008-01-24 Jan Boris Philipp Integrated circuit with resistivity changing material having a step-like programming characteristitic
US7688618B2 (en) * 2006-07-18 2010-03-30 Qimonda North America Corp. Integrated circuit having memory having a step-like programming characteristic
KR100887069B1 (ko) * 2007-07-24 2009-03-04 주식회사 하이닉스반도체 상 변화 메모리 장치
US7881100B2 (en) * 2008-04-08 2011-02-01 Micron Technology, Inc. State machine sensing of memory cells
US20100090189A1 (en) * 2008-09-15 2010-04-15 Savransky Semyon D Nanoscale electrical device
US7885101B2 (en) * 2008-12-29 2011-02-08 Numonyx B.V. Method for low-stress multilevel reading of phase change memory cells and multilevel phase change memory
KR101057725B1 (ko) * 2008-12-31 2011-08-18 주식회사 하이닉스반도체 멀티 레벨 셀 데이터 센싱 장치 및 그 방법
US7929338B2 (en) * 2009-02-24 2011-04-19 International Business Machines Corporation Memory reading method for resistance drift mitigation
US8605495B2 (en) 2011-05-09 2013-12-10 Macronix International Co., Ltd. Isolation device free memory
US9281061B2 (en) 2012-09-19 2016-03-08 Micron Technology, Inc. Methods and apparatuses having a voltage generator with an adjustable voltage drop for representing a voltage drop of a memory cell and/or a current mirror circuit and replica circuit
KR102157357B1 (ko) * 2014-06-16 2020-09-17 삼성전자 주식회사 메모리 장치 및 상기 메모리 장치의 독출 방법
JP2016033843A (ja) * 2014-07-31 2016-03-10 株式会社東芝 不揮発性記憶装置およびその駆動方法
US9978810B2 (en) 2015-11-04 2018-05-22 Micron Technology, Inc. Three-dimensional memory apparatuses and methods of use
US10134470B2 (en) 2015-11-04 2018-11-20 Micron Technology, Inc. Apparatuses and methods including memory and operation of same
US10446226B2 (en) 2016-08-08 2019-10-15 Micron Technology, Inc. Apparatuses including multi-level memory cells and methods of operation of same
US10381075B2 (en) * 2017-12-14 2019-08-13 Micron Technology, Inc. Techniques to access a self-selecting memory device
US10546632B2 (en) * 2017-12-14 2020-01-28 Micron Technology, Inc. Multi-level self-selecting memory device
US11302390B2 (en) * 2020-07-10 2022-04-12 Micron Technology, Inc. Reading a multi-level memory cell
FR3148862B1 (fr) * 2023-05-19 2025-10-17 St Microelectronics Int Nv Lecture d’un dispositif de mémoire non volatile multi-niveaux, en particulier à changement de phase, et dispositif de mémoire non volatile multi-niveaux

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US3530441A (en) 1969-01-15 1970-09-22 Energy Conversion Devices Inc Method and apparatus for storing and retrieving information
US4199692A (en) * 1978-05-16 1980-04-22 Harris Corporation Amorphous non-volatile ram
JP3454821B2 (ja) * 1991-08-19 2003-10-06 エナージー・コンバーション・デバイセス・インコーポレーテッド 電気的に消去可能な、直接重ね書き可能なマルチビット単セルメモリ素子およびそれらから作製したアレイ
US5508958A (en) * 1994-09-29 1996-04-16 Intel Corporation Method and apparatus for sensing the state of floating gate memory cells by applying a variable gate voltage
US5714768A (en) * 1995-10-24 1998-02-03 Energy Conversion Devices, Inc. Second-layer phase change memory array on top of a logic device
US5687112A (en) * 1996-04-19 1997-11-11 Energy Conversion Devices, Inc. Multibit single cell memory element having tapered contact
JP3930074B2 (ja) * 1996-09-30 2007-06-13 株式会社ルネサステクノロジ 半導体集積回路及びデータ処理システム
US5812441A (en) * 1996-10-21 1998-09-22 Micron Technology, Inc. MOS diode for use in a non-volatile memory cell
US6141241A (en) * 1998-06-23 2000-10-31 Energy Conversion Devices, Inc. Universal memory element with systems employing same and apparatus and method for reading, writing and programming same
US5912839A (en) * 1998-06-23 1999-06-15 Energy Conversion Devices, Inc. Universal memory element and method of programming same
AU763809B2 (en) * 1999-02-11 2003-07-31 Arizona Board Of Regents On Behalf Of The University Of Arizona, The Programmable microelectronic devices and methods of forming and programming same
US6314014B1 (en) * 1999-12-16 2001-11-06 Ovonyx, Inc. Programmable resistance memory arrays with reference cells
US6563156B2 (en) * 2001-03-15 2003-05-13 Micron Technology, Inc. Memory elements and methods for making same
US6590807B2 (en) * 2001-08-02 2003-07-08 Intel Corporation Method for reading a structural phase-change memory
JP3749847B2 (ja) * 2001-09-27 2006-03-01 株式会社東芝 相変化型不揮発性記憶装置及びその駆動回路
JP2003100084A (ja) * 2001-09-27 2003-04-04 Toshiba Corp 相変化型不揮発性記憶装置
DE60137788D1 (de) * 2001-12-27 2009-04-09 St Microelectronics Srl Architektur einer nichtflüchtigen Phasenwechsel -Speichermatrix
EP1324345A1 (de) * 2001-12-27 2003-07-02 STMicroelectronics S.r.l. Nichtflüchtige Speicheranordnung mit einziger Speisespannung mit Kaskode-Spaltendekodiererung

Also Published As

Publication number Publication date
CN100578668C (zh) 2010-01-06
CN1574091A (zh) 2005-02-02
US7180767B2 (en) 2007-02-20
JP5611499B2 (ja) 2014-10-22
JP2005012186A (ja) 2005-01-13
EP1489623B1 (de) 2008-10-15
EP1489623A1 (de) 2004-12-22
US20040257854A1 (en) 2004-12-23
TWI223258B (en) 2004-11-01
TW200501160A (en) 2005-01-01

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