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DE60318714D1 - System und verfahren zur steuerung einer löschspannung während des löschens mehrerer sektoren eines flash-speichers - Google Patents

System und verfahren zur steuerung einer löschspannung während des löschens mehrerer sektoren eines flash-speichers

Info

Publication number
DE60318714D1
DE60318714D1 DE60318714T DE60318714T DE60318714D1 DE 60318714 D1 DE60318714 D1 DE 60318714D1 DE 60318714 T DE60318714 T DE 60318714T DE 60318714 T DE60318714 T DE 60318714T DE 60318714 D1 DE60318714 D1 DE 60318714D1
Authority
DE
Germany
Prior art keywords
controlling
flash memory
voltage during
several sectors
during deletion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60318714T
Other languages
English (en)
Other versions
DE60318714T2 (de
Inventor
Edward V Bautista
Ken Cheong Cheah
Weng Fook Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Spansion LLC
Original Assignee
Spansion LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Spansion LLC filed Critical Spansion LLC
Application granted granted Critical
Publication of DE60318714D1 publication Critical patent/DE60318714D1/de
Publication of DE60318714T2 publication Critical patent/DE60318714T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/20Initialising; Data preset; Chip identification
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/344Arrangements for verifying correct erasure or for detecting overerased cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/344Arrangements for verifying correct erasure or for detecting overerased cells
    • G11C16/3445Circuits or methods to verify correct erasure of nonvolatile memory cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3468Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3472Circuits or methods to verify correct erasure of nonvolatile memory cells whilst erasing is in progress, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate erasure

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
DE60318714T 2002-07-31 2003-03-11 System und verfahren zur steuerung einer löschspannung während des löschens mehrerer sektoren eines flash-speichers Expired - Lifetime DE60318714T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US210378 2002-07-31
US10/210,378 US6891752B1 (en) 2002-07-31 2002-07-31 System and method for erase voltage control during multiple sector erase of a flash memory device
PCT/US2003/007639 WO2004013864A1 (en) 2002-07-31 2003-03-11 A system and method for erase voltage control during multiple sector erase of a flash memory device

Publications (2)

Publication Number Publication Date
DE60318714D1 true DE60318714D1 (de) 2008-03-06
DE60318714T2 DE60318714T2 (de) 2009-01-08

Family

ID=31494277

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60318714T Expired - Lifetime DE60318714T2 (de) 2002-07-31 2003-03-11 System und verfahren zur steuerung einer löschspannung während des löschens mehrerer sektoren eines flash-speichers

Country Status (9)

Country Link
US (1) US6891752B1 (de)
EP (1) EP1527458B1 (de)
JP (1) JP4249131B2 (de)
KR (1) KR100953330B1 (de)
CN (1) CN100447901C (de)
AU (1) AU2003222282A1 (de)
DE (1) DE60318714T2 (de)
TW (1) TWI286758B (de)
WO (1) WO2004013864A1 (de)

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US7200708B1 (en) * 2003-12-31 2007-04-03 Intel Corporation Apparatus and methods for storing data which self-compensate for erase performance degradation
US7450433B2 (en) 2004-12-29 2008-11-11 Sandisk Corporation Word line compensation in non-volatile memory erase operations
US7457166B2 (en) 2005-03-31 2008-11-25 Sandisk Corporation Erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage
JP4796125B2 (ja) * 2005-03-31 2011-10-19 サンディスク コーポレイション メモリセルの部分集合を個別に検証して追加的に消去する不揮発性メモリの消去
US7522457B2 (en) 2005-03-31 2009-04-21 Sandisk Corporation Systems for erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage
US7486564B2 (en) 2005-03-31 2009-02-03 Sandisk Corporation Soft programming non-volatile memory utilizing individual verification and additional soft programming of subsets of memory cells
KR100715151B1 (ko) * 2006-05-23 2007-05-10 삼성전자주식회사 메모리 섹터별로 소거 패스 전압을 가지는 불휘발성 반도체메모리 장치 및 이에 대한 소거 방법
US7382676B2 (en) * 2006-06-26 2008-06-03 Semiconductor Components Industries, Llc Method of forming a programmable voltage regulator and structure therefor
KR100744014B1 (ko) 2006-07-31 2007-07-30 삼성전자주식회사 플래시 메모리 장치 및 그것의 멀티 블록 소거 방법
US7733706B2 (en) * 2006-09-29 2010-06-08 Hynix Semiconductor Inc. Flash memory device and erase method thereof
US7499338B2 (en) 2006-10-13 2009-03-03 Sandisk Corporation Partitioned soft programming in non-volatile memory
US7495954B2 (en) 2006-10-13 2009-02-24 Sandisk Corporation Method for partitioned erase and erase verification to compensate for capacitive coupling effects in non-volatile memory
US7535766B2 (en) 2006-10-13 2009-05-19 Sandisk Corporation Systems for partitioned soft programming in non-volatile memory
US7499317B2 (en) 2006-10-13 2009-03-03 Sandisk Corporation System for partitioned erase and erase verification in a non-volatile memory to compensate for capacitive coupling
KR100830589B1 (ko) * 2007-04-17 2008-05-22 삼성전자주식회사 워드 라인으로 음의 고전압을 전달할 수 있는 고전압스위치를 갖는 플래시 메모리 장치
US7995392B2 (en) 2007-12-13 2011-08-09 Kabushiki Kaisha Toshiba Semiconductor memory device capable of shortening erase time
JP2009163782A (ja) * 2007-12-13 2009-07-23 Toshiba Corp 半導体記憶装置
US7643352B2 (en) * 2008-06-03 2010-01-05 Elite Semiconductor Memory Technology Inc. Method for erasing flash memory
CN101800078B (zh) * 2009-02-11 2013-02-13 北京兆易创新科技有限公司 一种非易失存储器的擦除方法及装置
KR101710089B1 (ko) 2010-08-26 2017-02-24 삼성전자주식회사 불휘발성 메모리 장치, 그것의 동작 방법, 그리고 그것을 포함하는 메모리 시스템
WO2014019156A1 (en) * 2012-08-01 2014-02-06 Datacard Corporation Variable erase for thermally rewritable cards
CN109584933B (zh) * 2012-08-29 2023-07-25 瑞萨电子株式会社 半导体器件
US9449698B1 (en) 2015-10-20 2016-09-20 Sandisk Technologies Llc Block and zone erase algorithm for memory
KR102377469B1 (ko) 2015-11-02 2022-03-23 삼성전자주식회사 불휘발성 메모리 장치, 불휘발성 메모리 장치를 포함하는 스토리지 장치 및 불휘발성 메모리 장치의 동작 방법
KR102609177B1 (ko) * 2016-07-04 2023-12-06 삼성전자주식회사 불휘발성 메모리 시스템의 동작 방법 및 불휘발성 메모리 장치의 동작 방법
US10141065B1 (en) * 2017-08-29 2018-11-27 Cypress Semiconductor Corporation Row redundancy with distributed sectors
US10460816B2 (en) * 2017-12-08 2019-10-29 Sandisk Technologies Llc Systems and methods for high-performance write operations
CN110838326B (zh) * 2018-08-17 2022-03-11 北京兆易创新科技股份有限公司 一种存储器的擦除方法和系统
CN109256166A (zh) * 2018-08-22 2019-01-22 长江存储科技有限责任公司 闪存器的擦除方法及闪存器
JP7181984B1 (ja) 2021-12-09 2022-12-01 ウィンボンド エレクトロニクス コーポレーション 半導体装置および消去方法

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US5270979A (en) 1991-03-15 1993-12-14 Sundisk Corporation Method for optimum erasing of EEPROM
US5396468A (en) * 1991-03-15 1995-03-07 Sundisk Corporation Streamlined write operation for EEPROM system
US5537358A (en) 1994-12-06 1996-07-16 National Semiconductor Corporation Flash memory having adaptive sensing and method
EP0830684B1 (de) * 1995-06-07 2004-08-25 Macronix International Co., Ltd. Automatischer progammier-algorithmus für flash-speicher im seitenmodus mit variabler programmierimpulshöhe und -breite
JPH0954726A (ja) * 1995-08-18 1997-02-25 Mitsubishi Electric Corp 記憶装置
US5745410A (en) * 1995-11-17 1998-04-28 Macronix International Co., Ltd. Method and system for soft programming algorithm
US6055184A (en) 1998-09-02 2000-04-25 Texas Instruments Incorporated Semiconductor memory device having programmable parallel erase operation
US6208558B1 (en) 1999-04-16 2001-03-27 Advanced Micro Devices, Inc. Acceleration circuit for fast programming and fast chip erase of non-volatile memory
US6188609B1 (en) 1999-05-06 2001-02-13 Advanced Micro Devices, Inc. Ramped or stepped gate channel erase for flash memory application
US6172909B1 (en) * 1999-08-09 2001-01-09 Advanced Micro Devices, Inc. Ramped gate technique for soft programming to tighten the Vt distribution
US6490204B2 (en) 2000-05-04 2002-12-03 Saifun Semiconductors Ltd. Programming and erasing methods for a reference cell of an NROM array
DE10237584B4 (de) * 2002-08-16 2005-10-06 Siemens Ag Verfahren zur Verwaltung von Ressourcen beim Aufbau eines Ersatzpfades in einem transparent schaltbaren Netzwerk

Also Published As

Publication number Publication date
WO2004013864A1 (en) 2004-02-12
DE60318714T2 (de) 2009-01-08
AU2003222282A1 (en) 2004-02-23
JP2006500705A (ja) 2006-01-05
EP1527458A1 (de) 2005-05-04
CN1672218A (zh) 2005-09-21
TWI286758B (en) 2007-09-11
CN100447901C (zh) 2008-12-31
JP4249131B2 (ja) 2009-04-02
EP1527458B1 (de) 2008-01-16
KR100953330B1 (ko) 2010-04-20
US6891752B1 (en) 2005-05-10
KR20050032103A (ko) 2005-04-06
TW200404293A (en) 2004-03-16

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