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DE60307853D1 - CMOS-Busempfänger mit vollem Spannungsschub und mit niedrigem Leistungsverbrauch - Google Patents

CMOS-Busempfänger mit vollem Spannungsschub und mit niedrigem Leistungsverbrauch

Info

Publication number
DE60307853D1
DE60307853D1 DE60307853T DE60307853T DE60307853D1 DE 60307853 D1 DE60307853 D1 DE 60307853D1 DE 60307853 T DE60307853 T DE 60307853T DE 60307853 T DE60307853 T DE 60307853T DE 60307853 D1 DE60307853 D1 DE 60307853D1
Authority
DE
Germany
Prior art keywords
power consumption
low power
voltage boost
full voltage
bus receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60307853T
Other languages
English (en)
Other versions
DE60307853T2 (de
Inventor
Nathalie Messina
Yves Leduc
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments France SAS
Texas Instruments Inc
Original Assignee
Texas Instruments France SAS
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments France SAS, Texas Instruments Inc filed Critical Texas Instruments France SAS
Publication of DE60307853D1 publication Critical patent/DE60307853D1/de
Application granted granted Critical
Publication of DE60307853T2 publication Critical patent/DE60307853T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • H03K3/356113Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/356147Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • G06F13/4072Drivers or receivers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • H03K3/356113Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
DE60307853T 2003-10-09 2003-10-09 CMOS-Busempfänger mit vollem Spannungsschub und mit niedrigem Leistungsverbrauch Expired - Lifetime DE60307853T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP03292504A EP1524605B1 (de) 2003-10-09 2003-10-09 CMOS-Busempfänger mit vollem Spannungsschub und mit niedrigem Leistungsverbrauch

Publications (2)

Publication Number Publication Date
DE60307853D1 true DE60307853D1 (de) 2006-10-05
DE60307853T2 DE60307853T2 (de) 2007-09-20

Family

ID=34354602

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60307853T Expired - Lifetime DE60307853T2 (de) 2003-10-09 2003-10-09 CMOS-Busempfänger mit vollem Spannungsschub und mit niedrigem Leistungsverbrauch

Country Status (3)

Country Link
US (1) US6960946B2 (de)
EP (1) EP1524605B1 (de)
DE (1) DE60307853T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2908570B1 (fr) * 2006-11-10 2009-03-06 E2V Semiconductors Soc Par Act Etage de sortie logique de circuit integre protege contre une inversion de batterie
US7821290B2 (en) * 2008-09-26 2010-10-26 Vitesse Semiconductor Corporation Differential voltage mode driver and digital impedance caliberation of same
CN104935295B (zh) * 2015-07-01 2017-06-09 东南大学 氮化镓基低漏电流固支梁的rs触发器
CN106655726B (zh) * 2016-11-30 2019-04-19 上海集成电路研发中心有限公司 一种全mos管电荷泵电路结构

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5811990A (en) * 1993-10-15 1998-09-22 Micron Technology, Inc. Voltage pump and a level translator circuit
US6147511A (en) * 1996-05-28 2000-11-14 Altera Corporation Overvoltage-tolerant interface for integrated circuits
DE69731089D1 (de) * 1997-10-31 2004-11-11 St Microelectronics Srl Hochspannungspegelverschieber zum Steuern einer Ausgangsstufe
US6204696B1 (en) * 1998-09-22 2001-03-20 Intel Corporation Domino circuits with high performance and high noise immunity

Also Published As

Publication number Publication date
US6960946B2 (en) 2005-11-01
DE60307853T2 (de) 2007-09-20
EP1524605A1 (de) 2005-04-20
US20050077945A1 (en) 2005-04-14
EP1524605B1 (de) 2006-08-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition