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DE60300141D1 - Aufspüren eines Signalübergangs - Google Patents

Aufspüren eines Signalübergangs

Info

Publication number
DE60300141D1
DE60300141D1 DE60300141T DE60300141T DE60300141D1 DE 60300141 D1 DE60300141 D1 DE 60300141D1 DE 60300141 T DE60300141 T DE 60300141T DE 60300141 T DE60300141 T DE 60300141T DE 60300141 D1 DE60300141 D1 DE 60300141D1
Authority
DE
Germany
Prior art keywords
detection
signal transition
transition
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60300141T
Other languages
English (en)
Other versions
DE60300141T2 (de
Inventor
Jochen Rivoir
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Verigy Singapore Pte Ltd
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Application granted granted Critical
Publication of DE60300141D1 publication Critical patent/DE60300141D1/de
Publication of DE60300141T2 publication Critical patent/DE60300141T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31937—Timing aspects, e.g. measuring propagation delay
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Tests Of Electronic Circuits (AREA)
DE60300141T 2003-02-25 2003-02-25 Aufspüren eines Signalübergangs Expired - Lifetime DE60300141T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP03100454A EP1351067B1 (de) 2003-02-25 2003-02-25 Aufspüren eines Signalübergangs

Publications (2)

Publication Number Publication Date
DE60300141D1 true DE60300141D1 (de) 2004-12-16
DE60300141T2 DE60300141T2 (de) 2005-11-03

Family

ID=27838228

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60300141T Expired - Lifetime DE60300141T2 (de) 2003-02-25 2003-02-25 Aufspüren eines Signalübergangs

Country Status (4)

Country Link
US (1) US7248660B2 (de)
EP (1) EP1351067B1 (de)
JP (1) JP4493363B2 (de)
DE (1) DE60300141T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004016359A1 (de) * 2004-04-02 2005-10-27 Texas Instruments Deutschland Gmbh Abtastverfahren und -vorrichtung
EP1835296B1 (de) 2006-03-17 2011-02-09 Stmicroelectronics Sa Verfahren zur Charakterisierung eines Zeitpunkts der Biterkennung
CN101865974B (zh) * 2009-04-20 2013-06-12 普诚科技股份有限公司 逻辑测试机以及同时测量多个受测装置的延迟时间的方法
KR20110093606A (ko) * 2009-11-18 2011-08-18 가부시키가이샤 어드밴티스트 수신 장치, 시험 장치, 수신 방법, 및 시험 방법

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3247784C1 (de) * 1982-12-23 1984-06-14 Weh, Erwin, 7918 Illertissen Steckkupplung zur druckdichten Verbindung einer Druckleitung mit einer druckmittelbetaetigten Vorrichtung
JPH03259639A (ja) * 1990-03-09 1991-11-19 Hitachi Ltd フレーム同期方式
DE69100204T2 (de) 1991-11-11 1994-01-13 Hewlett Packard Gmbh Einrichtung zur Erzeugung von Testsignalen.
US5295155A (en) * 1992-10-30 1994-03-15 International Business Machines Corporation Multi-level digital data regeneration system
DE4305442C2 (de) * 1993-02-23 1999-08-05 Hewlett Packard Gmbh Verfahren und Vorrichtung zum Erzeugen eines Testvektors
US5400370A (en) * 1993-02-24 1995-03-21 Advanced Micro Devices Inc. All digital high speed algorithmic data recovery method and apparatus using locally generated compensated broad band time rulers and data edge position averaging
JP3497008B2 (ja) * 1995-03-30 2004-02-16 株式会社アドバンテスト Ｇｍｓｋ通信デバイスの試験装置
JP3406167B2 (ja) * 1996-12-25 2003-05-12 松下電器産業株式会社 同期装置
EP0882991B1 (de) 1997-05-22 1999-03-17 Hewlett-Packard Company Dekompressionsschaltkreis
DE69700660T2 (de) 1997-05-30 2000-02-10 Hewlett-Packard Co., Palo Alto Mehrkanalanordnung mit einem unabhängigen Taktsignal pro Kanal
DE69700328T2 (de) 1997-09-13 1999-11-04 Hewlett-Packard Co., Palo Alto Ausgleich von Latenzzeit in einem Speicher
DE69700327T2 (de) 1997-09-13 1999-11-04 Hewlett-Packard Co., Palo Alto Optimierte Speicherorganisation in einer Mehrkanalcomputerarchitektur
JPH11329000A (ja) * 1998-05-19 1999-11-30 Mitsubishi Electric Corp 内蔵メモリテスト方法、およびそれに用いるバスインタフェースユニット、コマンドデコーダ
EP1092983B1 (de) 2000-06-16 2003-01-22 Agilent Technologies, Inc. (a Delaware corporation) Testgerät für integrierte Schaltungen mit Multiportprüffunktionalität
JP3830020B2 (ja) * 2000-10-30 2006-10-04 株式会社日立製作所 半導体集積回路装置
US6993695B2 (en) * 2001-06-06 2006-01-31 Agilent Technologies, Inc. Method and apparatus for testing digital devices using transition timestamps

Also Published As

Publication number Publication date
US7248660B2 (en) 2007-07-24
EP1351067A1 (de) 2003-10-08
EP1351067B1 (de) 2004-11-10
DE60300141T2 (de) 2005-11-03
JP2004340925A (ja) 2004-12-02
JP4493363B2 (ja) 2010-06-30
US20050025274A1 (en) 2005-02-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: VERIGY (SINGAPORE) PTE. LTD., SINGAPORE, SG

R082 Change of representative

Ref document number: 1351067

Country of ref document: EP

Representative=s name: SCHOPPE, ZIMMERMANN, STOECKELER, ZINKLER & PARTNER