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DE60100182D1 - EEPROM Speicher mit Fehlerkorrekturvorrichtung - Google Patents

EEPROM Speicher mit Fehlerkorrekturvorrichtung

Info

Publication number
DE60100182D1
DE60100182D1 DE60100182T DE60100182T DE60100182D1 DE 60100182 D1 DE60100182 D1 DE 60100182D1 DE 60100182 T DE60100182 T DE 60100182T DE 60100182 T DE60100182 T DE 60100182T DE 60100182 D1 DE60100182 D1 DE 60100182D1
Authority
DE
Germany
Prior art keywords
error correction
correction device
eeprom memory
eeprom
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60100182T
Other languages
English (en)
Inventor
Rosa Francesco La
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Application granted granted Critical
Publication of DE60100182D1 publication Critical patent/DE60100182D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
DE60100182T 2000-05-17 2001-05-14 EEPROM Speicher mit Fehlerkorrekturvorrichtung Expired - Lifetime DE60100182D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0006254A FR2809222A1 (fr) 2000-05-17 2000-05-17 Memoire eeprom comprenant un systeme de correction d'erreur

Publications (1)

Publication Number Publication Date
DE60100182D1 true DE60100182D1 (de) 2003-05-22

Family

ID=8850295

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60100182T Expired - Lifetime DE60100182D1 (de) 2000-05-17 2001-05-14 EEPROM Speicher mit Fehlerkorrekturvorrichtung

Country Status (4)

Country Link
US (1) US6854083B2 (de)
EP (1) EP1158408B1 (de)
DE (1) DE60100182D1 (de)
FR (1) FR2809222A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10128903C2 (de) * 2001-06-15 2003-04-24 Infineon Technologies Ag Schaltungsanordnung zur Speicherung digitaler Daten
FR2901626A1 (fr) 2006-05-29 2007-11-30 St Microelectronics Sa Memoire eeprom ayant une resistance contre le claquage de transistors amelioree
US9680509B2 (en) * 2015-03-27 2017-06-13 Intel Corporation Errors and erasures decoding from multiple memory devices
FR3039922B1 (fr) * 2015-08-06 2018-02-02 Stmicroelectronics (Rousset) Sas Procede d'ecriture dans une memoire du type eeprom et dispositif de memoire correspondant
US11314596B2 (en) * 2018-07-20 2022-04-26 Winbond Electronics Corp. Electronic apparatus and operative method
US12218681B2 (en) * 2022-09-21 2025-02-04 Micron Technology, Inc. Bit mask for syndrome decoding operations

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114391A (ja) * 1981-12-25 1983-07-07 Nec Corp センスアンプ回路
JP2591010B2 (ja) * 1988-01-29 1997-03-19 日本電気株式会社 シリアルアクセスメモリ装置
KR950003013B1 (ko) * 1992-03-30 1995-03-29 삼성전자 주식회사 틀림정정회로를 가지는 이이피롬
US5606532A (en) * 1995-03-17 1997-02-25 Atmel Corporation EEPROM array with flash-like core
DE69822536T2 (de) * 1997-01-30 2005-01-27 Motorola, Inc., Schaumburg Schaltung und Verfahren zum Verriegeln einer Bitleitung in einem nichtlflüchtigem Speicher
JP3198998B2 (ja) * 1997-09-11 2001-08-13 日本電気株式会社 半導体不揮発性メモリ
JPH11328981A (ja) * 1998-05-12 1999-11-30 Matsushita Electric Ind Co Ltd 半導体記憶装置，およびレギュレータ

Also Published As

Publication number Publication date
EP1158408B1 (de) 2003-04-16
FR2809222A1 (fr) 2001-11-23
EP1158408A1 (de) 2001-11-28
US20020013876A1 (en) 2002-01-31
US6854083B2 (en) 2005-02-08

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Legal Events

Date Code Title Description
8332 No legal effect for de