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DE60100114D1 - Filter zur Einspeisung von datenabhängigem Jitter und Pegelgeräusch - Google Patents

Filter zur Einspeisung von datenabhängigem Jitter und Pegelgeräusch

Info

Publication number
DE60100114D1
DE60100114D1 DE60100114T DE60100114T DE60100114D1 DE 60100114 D1 DE60100114 D1 DE 60100114D1 DE 60100114 T DE60100114 T DE 60100114T DE 60100114 T DE60100114 T DE 60100114T DE 60100114 D1 DE60100114 D1 DE 60100114D1
Authority
DE
Germany
Prior art keywords
filters
level noise
feeding data
dependent jitter
jitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60100114T
Other languages
English (en)
Other versions
DE60100114T2 (de
Inventor
Bernd Laquai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Verigy Singapore Pte Ltd
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Publication of DE60100114D1 publication Critical patent/DE60100114D1/de
Application granted granted Critical
Publication of DE60100114T2 publication Critical patent/DE60100114T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/20Arrangements for detecting or preventing errors in the information received using signal quality detector
    • H04L1/205Arrangements for detecting or preventing errors in the information received using signal quality detector jitter monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
  • Filters And Equalizers (AREA)
  • Manipulation Of Pulses (AREA)
DE60100114T 2001-04-03 2001-04-03 Filter zur Einspeisung von datenabhängigem Jitter und Pegelgeräusch Expired - Lifetime DE60100114T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP01108337A EP1162739B1 (de) 2001-04-03 2001-04-03 Filter zur Einspeisung von datenabhängigem Jitter und Pegelgeräusch

Publications (2)

Publication Number Publication Date
DE60100114D1 true DE60100114D1 (de) 2003-04-10
DE60100114T2 DE60100114T2 (de) 2003-10-02

Family

ID=8177025

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60100114T Expired - Lifetime DE60100114T2 (de) 2001-04-03 2001-04-03 Filter zur Einspeisung von datenabhängigem Jitter und Pegelgeräusch

Country Status (4)

Country Link
US (1) US6961745B2 (de)
EP (1) EP1162739B1 (de)
JP (1) JP4208046B2 (de)
DE (1) DE60100114T2 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7184469B2 (en) 2003-02-06 2007-02-27 Verigy Pte. Ltd. Systems and methods for injection of test jitter in data bit-streams
EP1508813B1 (de) * 2003-08-20 2007-01-31 Agilent Technologies, Inc. Spektrale Jitter-Analyse mit Jitter-Modulation-Wellenform-Analyse
US7203460B2 (en) * 2003-10-10 2007-04-10 Texas Instruments Incorporated Automated test of receiver sensitivity and receiver jitter tolerance of an integrated circuit
US7136773B2 (en) * 2003-12-16 2006-11-14 Advantest Corporation Testing apparatus and testing method
JP2005233933A (ja) * 2004-01-19 2005-09-02 Nec Electronics Corp 組合せ試験方法及び試験装置
JP2006025114A (ja) * 2004-07-07 2006-01-26 Kawasaki Microelectronics Kk 通信装置
US7239969B2 (en) 2004-11-09 2007-07-03 Guide Technology, Inc. System and method of generating test signals with injected data-dependent jitter (DDJ)
WO2006063361A2 (en) 2004-12-08 2006-06-15 Guide Technology Periodic jitter (pj) measurement methodology
JP4811902B2 (ja) * 2004-12-24 2011-11-09 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置のテスト方法
US7313496B2 (en) * 2005-02-11 2007-12-25 Advantest Corporation Test apparatus and test method for testing a device under test
US8327204B2 (en) * 2005-10-27 2012-12-04 Dft Microsystems, Inc. High-speed transceiver tester incorporating jitter injection
US20070121711A1 (en) * 2005-11-30 2007-05-31 Offord Glen E PLL with programmable jitter for loopback serdes testing and the like
US7681091B2 (en) * 2006-07-14 2010-03-16 Dft Microsystems, Inc. Signal integrity measurement systems and methods using a predominantly digital time-base generator
US7813297B2 (en) * 2006-07-14 2010-10-12 Dft Microsystems, Inc. High-speed signal testing system having oscilloscope functionality
US7849374B1 (en) * 2006-10-11 2010-12-07 Ltx Corporation Testing a transceiver
EP2115940A2 (de) * 2007-02-09 2009-11-11 DFT Microsystems, Inc. System und verfahren zur testung der physischen schicht serieller hochgeschwindigkeitsverbindungen in deren einsatzumgebungen
US8255188B2 (en) * 2007-11-07 2012-08-28 Guidetech, Inc. Fast low frequency jitter rejection methodology
US20090158100A1 (en) * 2007-12-13 2009-06-18 Advantest Corporation Jitter applying circuit and test apparatus
US7843771B2 (en) * 2007-12-14 2010-11-30 Guide Technology, Inc. High resolution time interpolator
US7917319B2 (en) * 2008-02-06 2011-03-29 Dft Microsystems Inc. Systems and methods for testing and diagnosing delay faults and for parametric testing in digital circuits
JP5210840B2 (ja) * 2008-12-10 2013-06-12 株式会社アドバンテスト ジッタ印加装置および試験装置
JP5716604B2 (ja) 2011-08-08 2015-05-13 富士通株式会社 回路シミュレータプログラム,装置およびアイパターン生成方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2146205B (en) * 1983-09-03 1987-06-24 Marconi Instruments Ltd Jitter circuits assessing jitter performance
US5121342A (en) * 1989-08-28 1992-06-09 Network Communications Corporation Apparatus for analyzing communication networks
DE69031201T2 (de) * 1989-09-29 1998-02-19 Toshiba Kawasaki Kk Phasensynchrone Regeleinrichtung zur Herstellung eines Referenztaktsignals in einem Plattenantriebssystem
US5309428A (en) * 1993-01-11 1994-05-03 John Fluke Mfg. Co., Inc. Token ring local area network testing apparatus for phase jitter testing
US5751766A (en) * 1995-04-27 1998-05-12 Applied Signal Technology, Inc. Non-invasive digital communications test system
US6076175A (en) * 1997-03-31 2000-06-13 Sun Microsystems, Inc. Controlled phase noise generation method for enhanced testability of clock and data generator and recovery circuits

Also Published As

Publication number Publication date
EP1162739A1 (de) 2001-12-12
JP4208046B2 (ja) 2009-01-14
US6961745B2 (en) 2005-11-01
DE60100114T2 (de) 2003-10-02
JP2002368827A (ja) 2002-12-20
EP1162739B1 (de) 2003-03-05
US20020174159A1 (en) 2002-11-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: VERIGY (SINGAPORE) PTE. LTD., SINGAPORE, SG

R082 Change of representative

Ref document number: 1162739

Country of ref document: EP

Representative=s name: SCHOPPE, ZIMMERMANN, STOECKELER, ZINKLER & PARTNER