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DE60045666D1 - Halbleiteranordnung und informationsverarbeitungsanordnung - Google Patents

Halbleiteranordnung und informationsverarbeitungsanordnung

Info

Publication number
DE60045666D1
DE60045666D1 DE60045666T DE60045666T DE60045666D1 DE 60045666 D1 DE60045666 D1 DE 60045666D1 DE 60045666 T DE60045666 T DE 60045666T DE 60045666 T DE60045666 T DE 60045666T DE 60045666 D1 DE60045666 D1 DE 60045666D1
Authority
DE
Germany
Prior art keywords
arrangement
information processing
semiconductor
processing arrangement
semiconductor arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60045666T
Other languages
English (en)
Inventor
Hiroshi Iwata
Akihide Shibata
Seizo Kakimoto
Kouichiro Adachi
Masayuki Nakano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Application granted granted Critical
Publication of DE60045666D1 publication Critical patent/DE60045666D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/608Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having non-planar bodies, e.g. having recessed gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/017Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251Source or drain electrodes for field-effect devices
    • H10D64/258Source or drain electrodes for field-effect devices characterised by the relative positions of the source or drain electrodes with respect to the gate electrode
    • H10D64/259Source or drain electrodes being self-aligned with the gate electrode and having bottom surfaces higher than the interface between the channel and the gate dielectric
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0184Manufacturing their gate sidewall spacers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0188Manufacturing their isolation regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10P32/14
    • H10P32/171
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6758Thin-film transistors [TFT] characterised by the insulating substrates
    • H10D30/6759Silicon-on-sapphire [SOS] substrates
DE60045666T 2000-01-07 2000-12-28 Halbleiteranordnung und informationsverarbeitungsanordnung Expired - Lifetime DE60045666D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000001190 2000-01-07
PCT/JP2000/009447 WO2001050536A1 (en) 2000-01-07 2000-12-28 Semiconductor device, method of manufacture thereof, and information processing device

Publications (1)

Publication Number Publication Date
DE60045666D1 true DE60045666D1 (de) 2011-04-07

Family

ID=18530440

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60045666T Expired - Lifetime DE60045666D1 (de) 2000-01-07 2000-12-28 Halbleiteranordnung und informationsverarbeitungsanordnung

Country Status (6)

Country Link
US (2) US6825528B2 (de)
EP (1) EP1246258B1 (de)
KR (1) KR100679203B1 (de)
DE (1) DE60045666D1 (de)
TW (1) TW490854B (de)
WO (1) WO2001050536A1 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040207011A1 (en) * 2001-07-19 2004-10-21 Hiroshi Iwata Semiconductor device, semiconductor storage device and production methods therefor
JP4545360B2 (ja) * 2001-09-10 2010-09-15 シャープ株式会社 半導体装置
US6858483B2 (en) * 2002-12-20 2005-02-22 Intel Corporation Integrating n-type and p-type metal gate transistors
JP2005051140A (ja) * 2003-07-31 2005-02-24 Toshiba Corp 半導体装置およびその製造方法
CN100481395C (zh) * 2003-12-30 2009-04-22 中芯国际集成电路制造(上海)有限公司 Rom存储器及其制造方法
JP4274566B2 (ja) * 2005-04-25 2009-06-10 エルピーダメモリ株式会社 半導体装置の製造方法
JP2007081335A (ja) * 2005-09-16 2007-03-29 Renesas Technology Corp 半導体装置
US7790527B2 (en) * 2006-02-03 2010-09-07 International Business Machines Corporation High-voltage silicon-on-insulator transistors and methods of manufacturing the same
US7704840B2 (en) * 2006-12-15 2010-04-27 Advanced Micro Devices, Inc. Stress enhanced transistor and methods for its fabrication
US20100117188A1 (en) * 2007-03-05 2010-05-13 General Electric Company Method for producing trench isolation in silicon carbide and gallium nitride and articles made thereby
US7732877B2 (en) * 2007-04-02 2010-06-08 Taiwan Semiconductor Manufacturing Company, Ltd. Gated diode with non-planar source region
US7772054B2 (en) 2007-06-15 2010-08-10 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
WO2009031085A1 (en) * 2007-09-05 2009-03-12 Nxp B.V. A transistor and a method of manufacturing the same
EP2191497A2 (de) * 2007-09-05 2010-06-02 Nxp B.V. Transistor und verfahren zu seiner herstellung
KR20100073247A (ko) * 2008-12-23 2010-07-01 한국전자통신연구원 자기정렬 전계 효과 트랜지스터 구조체
US9190326B2 (en) * 2011-06-14 2015-11-17 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having a post feature and method of manufacturing the same
US9012999B2 (en) * 2012-08-21 2015-04-21 Stmicroelectronics, Inc. Semiconductor device with an inclined source/drain and associated methods
GB201313592D0 (en) * 2013-07-30 2013-09-11 Univ St Andrews Optical modulator with plasmon based coupling
US9466722B2 (en) 2014-12-29 2016-10-11 Stmicroelectronics, Inc. Large area contacts for small transistors
KR102317646B1 (ko) * 2015-04-14 2021-10-27 삼성전자주식회사 반도체 소자 및 이의 제조 방법
US10381267B2 (en) 2017-04-21 2019-08-13 International Business Machines Corporation Field effect device with reduced capacitance and resistance in source/drain contacts at reduced gate pitch
US11387233B2 (en) * 2020-06-29 2022-07-12 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device structure and methods of forming the same
KR102885179B1 (ko) * 2020-12-23 2025-11-14 삼성전자주식회사 반도체 소자 및 그의 제조 방법

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61196577A (ja) 1985-02-26 1986-08-30 Nec Corp 半導体装置
JPH065747B2 (ja) 1987-01-21 1994-01-19 株式会社東芝 Mos型半導体装置
JPH03145343A (ja) 1989-10-31 1991-06-20 Sanyo Electric Co Ltd 携帯用電子機器
KR100274555B1 (ko) * 1991-06-26 2000-12-15 윌리엄 비. 켐플러 절연 게이트 전계 효과 트랜지스터 구조물 및 이의 제조 방법
US5494837A (en) * 1994-09-27 1996-02-27 Purdue Research Foundation Method of forming semiconductor-on-insulator electronic devices by growing monocrystalline semiconducting regions from trench sidewalls
US5986649A (en) * 1995-01-11 1999-11-16 Seiko Epson Corporation Power circuit, liquid crystal display device, and electronic equipment
KR100218299B1 (ko) * 1996-02-05 1999-09-01 구본준 트랜지스터 제조방법
JP2786169B2 (ja) 1996-06-25 1998-08-13 静岡日本電気株式会社 表示付無線選択呼出受信機
JPH1022462A (ja) 1996-06-28 1998-01-23 Sharp Corp 半導体装置及びその製造方法
JPH10335660A (ja) 1997-06-05 1998-12-18 Nec Corp 半導体装置およびその製造方法
FR2765394B1 (fr) 1997-06-25 1999-09-24 France Telecom Procede d'obtention d'un transistor a grille en silicium-germanium
US5902125A (en) * 1997-12-29 1999-05-11 Texas Instruments--Acer Incorporated Method to form stacked-Si gate pMOSFETs with elevated and extended S/D junction
DE19812643C1 (de) * 1998-03-23 1999-07-08 Siemens Ag Schaltungsstruktur mit einem MOS-Transistor und Verfahren zu deren Herstellung
US6291861B1 (en) * 1998-06-30 2001-09-18 Sharp Kabushiki Kaisha Semiconductor device and method for producing the same
KR100349768B1 (ko) 1998-06-30 2002-08-24 샤프 가부시키가이샤 반도체 장치 및 그의 제조방법
US6319782B1 (en) * 1998-09-10 2001-11-20 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method of fabricating the same
KR100280809B1 (ko) * 1998-12-30 2001-03-02 김영환 반도체 소자의 접합부 형성 방법

Also Published As

Publication number Publication date
US20040262650A1 (en) 2004-12-30
WO2001050536A1 (en) 2001-07-12
EP1246258B1 (de) 2011-02-23
KR100679203B1 (ko) 2007-02-07
US6825528B2 (en) 2004-11-30
EP1246258A4 (de) 2007-07-18
KR20020064986A (ko) 2002-08-10
US20030089932A1 (en) 2003-05-15
EP1246258A1 (de) 2002-10-02
US7176526B2 (en) 2007-02-13
TW490854B (en) 2002-06-11

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