DE4395687T1 - Integrierter Schaltkreis mit Material mit einer geschichteten Überstruktur und Verfahren zur Herstellung desselben - Google Patents
Integrierter Schaltkreis mit Material mit einer geschichteten Überstruktur und Verfahren zur Herstellung desselbenInfo
- Publication number
- DE4395687T1 DE4395687T1 DE4395687T DE4395687T DE4395687T1 DE 4395687 T1 DE4395687 T1 DE 4395687T1 DE 4395687 T DE4395687 T DE 4395687T DE 4395687 T DE4395687 T DE 4395687T DE 4395687 T1 DE4395687 T1 DE 4395687T1
- Authority
- DE
- Germany
- Prior art keywords
- making
- integrated circuit
- same
- superstructure
- layered
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45561—Gas plumbing upstream of the reaction chamber
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/60—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape
- C30B29/68—Crystals with laminate structure, e.g. "superlattices"
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B7/00—Single-crystal growth from solutions using solvents which are liquid at normal temperature, e.g. aqueous solutions
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B7/00—Single-crystal growth from solutions using solvents which are liquid at normal temperature, e.g. aqueous solutions
- C30B7/005—Epitaxial layer growth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
- H01L21/02507—Alternating layers, e.g. superlattice
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
- H10D1/684—Capacitors having no potential barriers having dielectrics comprising perovskite structures the dielectrics comprising multiple layers, e.g. comprising buffer layers, seed layers or gradient layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/692—Electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Mechanical Engineering (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Inorganic Insulating Materials (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US96519092A | 1992-10-23 | 1992-10-23 | |
| US07/981,133 US5423285A (en) | 1991-02-25 | 1992-11-24 | Process for fabricating materials for ferroelectric, high dielectric constant, and integrated circuit applications |
| US08/065,656 US5434102A (en) | 1991-02-25 | 1993-05-21 | Process for fabricating layered superlattice materials and making electronic devices including same |
| US08/065,666 US5468684A (en) | 1991-12-13 | 1993-05-21 | Integrated circuit with layered superlattice material and method of fabricating same |
| PCT/US1993/010127 WO1994010704A1 (en) | 1992-10-23 | 1993-10-21 | Integrated circuit with layered superlattice material and method of fabricating same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE4395687T1 true DE4395687T1 (de) | 1995-11-23 |
Family
ID=27490504
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69331743T Expired - Fee Related DE69331743T2 (de) | 1992-10-23 | 1993-10-21 | Herstellungsverfahren von geschichteten uebergittermaterialien und von diesen enthaltenden elektronischen vorrichtungen |
| DE4395687T Withdrawn DE4395687T1 (de) | 1992-10-23 | 1993-10-21 | Integrierter Schaltkreis mit Material mit einer geschichteten Überstruktur und Verfahren zur Herstellung desselben |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69331743T Expired - Fee Related DE69331743T2 (de) | 1992-10-23 | 1993-10-21 | Herstellungsverfahren von geschichteten uebergittermaterialien und von diesen enthaltenden elektronischen vorrichtungen |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP0665981B1 (de) |
| JP (2) | JPH08502859A (de) |
| KR (2) | KR100442543B1 (de) |
| CA (1) | CA2145879A1 (de) |
| DE (2) | DE69331743T2 (de) |
| WO (2) | WO1994010702A1 (de) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6072207A (en) * | 1991-02-25 | 2000-06-06 | Symetrix Corporation | Process for fabricating layered superlattice materials and making electronic devices including same |
| US5508226A (en) * | 1991-12-13 | 1996-04-16 | Symetrix Corporation | Low temperature process for fabricating layered superlattice materialsand making electronic devices including same |
| US6133050A (en) * | 1992-10-23 | 2000-10-17 | Symetrix Corporation | UV radiation process for making electronic devices having low-leakage-current and low-polarization fatigue |
| US5426075A (en) * | 1994-06-15 | 1995-06-20 | Ramtron International Corporation | Method of manufacturing ferroelectric bismuth layered oxides |
| JP3363301B2 (ja) * | 1995-03-08 | 2003-01-08 | シャープ株式会社 | 強誘電体薄膜被覆基板及びその製造方法及び強誘電体薄膜被覆基板によって構成された不揮発性メモリ |
| JP3480624B2 (ja) | 1995-06-09 | 2003-12-22 | シャープ株式会社 | 強誘電体薄膜被覆基板、その製造方法、及びキャパシタ構造素子 |
| JP3133922B2 (ja) * | 1995-06-09 | 2001-02-13 | シャープ株式会社 | 強誘電体薄膜被覆基板、その製造方法、及びキャパシタ構造素子 |
| JP3188179B2 (ja) * | 1995-09-26 | 2001-07-16 | シャープ株式会社 | 強誘電体薄膜素子の製造方法及び強誘電体メモリ素子の製造方法 |
| US5804823A (en) * | 1995-10-10 | 1998-09-08 | Raytheon Company | Bismuth layered structure pyroelectric detectors |
| JP3327071B2 (ja) | 1995-10-16 | 2002-09-24 | ソニー株式会社 | 強誘電体記憶装置 |
| JP3891603B2 (ja) * | 1995-12-27 | 2007-03-14 | シャープ株式会社 | 強誘電体薄膜被覆基板、キャパシタ構造素子、及び強誘電体薄膜被覆基板の製造方法 |
| JP3258899B2 (ja) * | 1996-03-19 | 2002-02-18 | シャープ株式会社 | 強誘電体薄膜素子、それを用いた半導体装置、及び強誘電体薄膜素子の製造方法 |
| JP3438509B2 (ja) * | 1997-02-04 | 2003-08-18 | セイコーエプソン株式会社 | セラミックス薄膜及びその製造方法 |
| US6080499A (en) * | 1997-07-18 | 2000-06-27 | Ramtron International Corporation | Multi-layer approach for optimizing ferroelectric film performance |
| US6287637B1 (en) | 1997-07-18 | 2001-09-11 | Ramtron International Corporation | Multi-layer approach for optimizing ferroelectric film performance |
| US5853500A (en) * | 1997-07-18 | 1998-12-29 | Symetrix Corporation | Method for fabricating thin films of barium strontium titanate without exposure to oxygen at high temperatures |
| KR100284737B1 (ko) * | 1998-03-26 | 2001-03-15 | 윤종용 | 고유전율의유전막을갖는반도체장치의커패시터제조방법 |
| US6326315B1 (en) * | 2000-03-09 | 2001-12-04 | Symetrix Corporation | Low temperature rapid ramping anneal method for fabricating layered superlattice materials and making electronic devices including same |
| DE10041699A1 (de) | 2000-08-24 | 2002-03-21 | Infineon Technologies Ag | Niedertemperatur-Prozessierung ferroelektrischer Strontium-Wismuth-Tantalat-Schichten und Herstellung ferroelektrischer Bauelemente daraus |
| JP2002100740A (ja) | 2000-09-21 | 2002-04-05 | Oki Electric Ind Co Ltd | 半導体記憶素子及びその製造方法 |
| US6890768B2 (en) * | 2001-03-09 | 2005-05-10 | Symetrix Corporation | Method of making layered superlattice material with ultra-thin top layer |
| DE102004002204A1 (de) | 2004-01-15 | 2005-08-11 | Epcos Ag | Keramikmaterial |
| JP5019020B2 (ja) | 2005-03-31 | 2012-09-05 | セイコーエプソン株式会社 | 誘電体膜の製造方法及び圧電体素子の製造方法並びに液体噴射ヘッドの製造方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02232974A (ja) * | 1989-03-07 | 1990-09-14 | Seiko Epson Corp | 半導体装置 |
| US5146299A (en) * | 1990-03-02 | 1992-09-08 | Westinghouse Electric Corp. | Ferroelectric thin film material, method of deposition, and devices using same |
| KR100266045B1 (ko) * | 1990-08-07 | 2000-09-15 | 야스카와 히데아키 | 반도체장치 |
| JP3006053B2 (ja) * | 1990-08-07 | 2000-02-07 | セイコーエプソン株式会社 | 半導体装置 |
| JP3131982B2 (ja) * | 1990-08-21 | 2001-02-05 | セイコーエプソン株式会社 | 半導体装置、半導体メモリ及び半導体装置の製造方法 |
| EP0489519A3 (en) * | 1990-12-04 | 1993-05-12 | Raytheon Company | Sol-gel processing of piezoelectric and ferroelectric films |
-
1993
- 1993-10-21 EP EP94901174A patent/EP0665981B1/de not_active Expired - Lifetime
- 1993-10-21 WO PCT/US1993/010021 patent/WO1994010702A1/en not_active Ceased
- 1993-10-21 DE DE69331743T patent/DE69331743T2/de not_active Expired - Fee Related
- 1993-10-21 DE DE4395687T patent/DE4395687T1/de not_active Withdrawn
- 1993-10-21 JP JP6511186A patent/JPH08502859A/ja not_active Ceased
- 1993-10-21 KR KR1019950701540A patent/KR100442543B1/ko not_active Expired - Fee Related
- 1993-10-21 CA CA002145879A patent/CA2145879A1/en not_active Abandoned
- 1993-10-21 WO PCT/US1993/010127 patent/WO1994010704A1/en not_active Ceased
- 1993-10-21 JP JP6511140A patent/JPH08502628A/ja active Pending
- 1993-10-21 KR KR1019950701541A patent/KR100407232B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08502628A (ja) | 1996-03-19 |
| KR100442543B1 (ko) | 2004-11-20 |
| DE69331743T2 (de) | 2002-08-08 |
| KR100407232B1 (ko) | 2004-06-26 |
| JPH08502859A (ja) | 1996-03-26 |
| EP0665981B1 (de) | 2002-03-20 |
| DE69331743D1 (de) | 2002-04-25 |
| EP0665981A1 (de) | 1995-08-09 |
| WO1994010704A1 (en) | 1994-05-11 |
| KR950704814A (ko) | 1995-11-20 |
| CA2145879A1 (en) | 1994-05-11 |
| KR950704810A (ko) | 1995-11-20 |
| WO1994010702A1 (en) | 1994-05-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8139 | Disposal/non-payment of the annual fee |