Classifications

• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
  • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
  • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
  • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
  • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
  • G11C7/1018—Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
  • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
  • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
  • G11C7/1039—Read-write modes for single port memories, i.e. having either a random port or a serial port using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C8/00—Arrangements for selecting an address in a digital store
  • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

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• Engineering & Computer Science (AREA)
• Theoretical Computer Science (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Physics & Mathematics (AREA)
• General Engineering & Computer Science (AREA)
• General Physics & Mathematics (AREA)
• Dram (AREA)

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Publications (2)

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• 1987
  • 1987-03-10 DE DE87103433T patent/DE3786358T2/de not_active Expired - Fee Related
  • 1987-03-10 US US07/024,212 patent/US4811305A/en not_active Expired - Fee Related
  • 1987-03-10 EP EP87103433A patent/EP0237030B1/de not_active Expired - Lifetime

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