DE3771238D1 - Halbleiterspeicher. - Google Patents
Halbleiterspeicher.Info
- Publication number
- DE3771238D1 DE3771238D1 DE8787301766T DE3771238T DE3771238D1 DE 3771238 D1 DE3771238 D1 DE 3771238D1 DE 8787301766 T DE8787301766 T DE 8787301766T DE 3771238 T DE3771238 T DE 3771238T DE 3771238 D1 DE3771238 D1 DE 3771238D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61062052A JPH07111823B2 (ja) | 1986-03-18 | 1986-03-18 | 半導体記憶装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE3771238D1 true DE3771238D1 (de) | 1991-08-14 |
Family
ID=13188992
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE8787301766T Expired - Lifetime DE3771238D1 (de) | 1986-03-18 | 1987-02-27 | Halbleiterspeicher. |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4803663A (de) |
| EP (1) | EP0238228B1 (de) |
| JP (1) | JPH07111823B2 (de) |
| DE (1) | DE3771238D1 (de) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5214601A (en) * | 1986-12-11 | 1993-05-25 | Mitsubishi Denki Kabushiki Kaisha | Bit line structure for semiconductor memory device including cross-points and multiple interconnect layers |
| JPH01199393A (ja) * | 1988-02-03 | 1989-08-10 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US4954992A (en) * | 1987-12-24 | 1990-09-04 | Mitsubishi Denki Kabushiki Kaisha | Random access memory having separate read out and write in bus lines for reduced access time and operating method therefor |
| JPH01171195A (ja) * | 1987-12-25 | 1989-07-06 | Sony Corp | メモリ装置 |
| US5148399A (en) * | 1988-06-28 | 1992-09-15 | Oki Electric Industry Co., Ltd. | Sense amplifier circuitry selectively separable from bit lines for dynamic random access memory |
| US4991142A (en) * | 1989-07-20 | 1991-02-05 | Samsung Semiconductor Inc. | Dynamic random access memory with improved sensing and refreshing |
| JP3006014B2 (ja) * | 1990-02-13 | 2000-02-07 | 日本電気株式会社 | 半導体メモリ |
| US5142494A (en) * | 1990-02-26 | 1992-08-25 | Eastman Kodak Company | Memory based line-delay architecture |
| US5058065A (en) * | 1990-02-26 | 1991-10-15 | Eastman Kodak Company | Memory based line-delay architecture |
| USRE40552E1 (en) | 1990-04-06 | 2008-10-28 | Mosaid Technologies, Inc. | Dynamic random access memory using imperfect isolating transistors |
| GB9007789D0 (en) * | 1990-04-06 | 1990-06-06 | Foss Richard C | Method for dram sensing current control |
| US5245584A (en) * | 1990-12-20 | 1993-09-14 | Vlsi Technology, Inc. | Method and apparatus for compensating for bit line delays in semiconductor memories |
| JPH04315888A (ja) * | 1991-04-15 | 1992-11-06 | Nec Corp | 半導体記憶装置 |
| KR940007639B1 (ko) * | 1991-07-23 | 1994-08-22 | 삼성전자 주식회사 | 분할된 입출력 라인을 갖는 데이타 전송회로 |
| JPH0612877A (ja) * | 1992-06-18 | 1994-01-21 | Toshiba Corp | 半導体集積回路 |
| JPH0757464A (ja) * | 1993-08-10 | 1995-03-03 | Oki Electric Ind Co Ltd | 半導体記憶回路 |
| KR0121777B1 (ko) * | 1994-05-23 | 1997-12-05 | 김영환 | 고속 동작용 감지 증폭기 |
| US5907508A (en) * | 1997-10-28 | 1999-05-25 | International Business Machines Corporation | Method and apparatus for single clocked, non-overlapping access in a multi-port memory cell |
| US5877976A (en) * | 1997-10-28 | 1999-03-02 | International Business Machines Corporation | Memory system having a vertical bitline topology and method therefor |
| US5956286A (en) * | 1997-10-28 | 1999-09-21 | International Business Machines Corporation | Data processing system and method for implementing a multi-port memory cell |
| US5870349A (en) * | 1997-10-28 | 1999-02-09 | International Business Machines Corporation | Data processing system and method for generating memory control signals with clock skew tolerance |
| US6738300B2 (en) | 2002-08-26 | 2004-05-18 | International Business Machines Corporation | Direct read of DRAM cell using high transfer ratio |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2647394C2 (de) * | 1976-10-20 | 1978-11-16 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | MOS-Halbleiterspeicherbaustein |
| JPS5472641A (en) * | 1977-11-21 | 1979-06-11 | Toshiba Corp | Voltage detection circuit |
| JPS57159A (en) * | 1980-06-02 | 1982-01-05 | Mitsubishi Chem Ind Ltd | Polyester composition |
| JPS5755592A (en) * | 1980-09-18 | 1982-04-02 | Nec Corp | Memory device |
| JPS58102390A (ja) * | 1981-12-12 | 1983-06-17 | Nippon Telegr & Teleph Corp <Ntt> | センス回路 |
| JPS58125293A (ja) * | 1982-01-22 | 1983-07-26 | Hitachi Ltd | 半導体記憶装置 |
| JPS592365A (ja) * | 1982-06-28 | 1984-01-07 | Fujitsu Ltd | ダイナミツク型半導体記憶装置 |
| JPH0670878B2 (ja) * | 1982-11-30 | 1994-09-07 | 富士通株式会社 | 半導体記憶装置 |
| JPS59207485A (ja) * | 1983-05-11 | 1984-11-24 | Nec Ic Microcomput Syst Ltd | 増幅回路 |
| US4551641A (en) * | 1983-11-23 | 1985-11-05 | Motorola, Inc. | Sense amplifier |
| JPS60234295A (ja) * | 1984-05-04 | 1985-11-20 | Fujitsu Ltd | 半導体記憶装置 |
| JPH101093A (ja) * | 1996-06-13 | 1998-01-06 | Shikoku Dock Kk | 船舶等海洋構造物の進水装置 |
-
1986
- 1986-03-18 JP JP61062052A patent/JPH07111823B2/ja not_active Expired - Lifetime
-
1987
- 1987-02-27 EP EP87301766A patent/EP0238228B1/de not_active Expired - Lifetime
- 1987-02-27 DE DE8787301766T patent/DE3771238D1/de not_active Expired - Lifetime
- 1987-03-18 US US07/027,536 patent/US4803663A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US4803663A (en) | 1989-02-07 |
| JPS62217490A (ja) | 1987-09-24 |
| EP0238228A2 (de) | 1987-09-23 |
| JPH07111823B2 (ja) | 1995-11-29 |
| EP0238228B1 (de) | 1991-07-10 |
| EP0238228A3 (en) | 1989-07-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8363 | Opposition against the patent | ||
| 8320 | Willingness to grant licences declared (paragraph 23) | ||
| 8339 | Ceased/non-payment of the annual fee |