DE2521949A1 - MONOLITHICALLY INTEGRATED MIS-DRIVER STAGE - Google Patents

Description

German ITT Industries GmbH C. Obermeier 4

78 Freiburg, Hans-Bunte-Str. 19 Go / sp

May 13, 1975

DEUTSCHE ITT INDUSTRIES GESELLSCHAFT LIMITED LIABILITY

FREIBURG I. BR.

MIS driver stage that can be integrated monolithically

The invention relates to a monolithically integrable MIS driver stage with one having an input field effect transistor Inverter input stage and a push-pull stage on the output side, which two are connected in series via their source-drain paths Contains field effect transistors and a feedback capacitor that enables rapid switching of the output potential between the ground potential and the value U of the common voltage supply guaranteed. Such a monolithically integrable MIS driver stage was known in principle from DT-OS 2 243 6 71.

The invention is based on the object of developing the known monolithically integrable driver circuit for fast and low-loss switching processes between the supply voltage (U _DD ) and the ground potential.

609848/0814

Fl 853 C. Obermeier 4

In the known monolithically integrable MIS driver stage, this object is achieved according to the invention in that a connection of the feedback capacitor is at the common circuit point of the field effect transistors of the push-pull stage and the other Connection with the common connection of two field effect transistors a source-drain series circuit is connected, which series circuit in series with the source-drain path of the input field effect transistor form an inverter input stage, the gate of which receives the input signal and to the gate terminal of the one Field effect transistor of the push-pull stage is connected, the source terminal of which is at ground potential.

A first embodiment of a monolithically integrable MIS driver stage according to the invention is characterized in that the gate connection of that field effect transistor of the push-pull stage, whose drain connection is connected to the voltage supply, with the common circuit point of the series circuit with the drain connection of the input field effect transistor is galvanically connected.

In a second embodiment, the monolithically integrable MIS driver stage is the gate connection of a field effect transistor of an output inverter stage parallel to the push-pull stage, whose drain connection is connected to the voltage supply, with the common connection point of the series circuit and the drain connection of the input field effect transistor galvanically connected. This circuit is particularly suitable for higher driver powers. . . '

The invention is explained below with reference to the drawing, of which FIGS. 1 to 4 show the first embodiment and FIGS. 4 and 5 the second embodiment relate to the embodiment 4 combines both embodiments.

609848/081 h " ³ "

Fl 853 C. Obermeier 4

The MIS driver stage, which can be integrated monolithically, also works
a so-called "bootstrap" capacitor. From the magazine
"IEEE Journal of Solid-state Circuits", Vol. SC-7, No. 3 (June 1972), pages 217 to 224, such MIS circuits with bootstrapping are known, which with a capacitor between the output of an inverter and the gate of its load transistor is working. However, if, for example, low-resistance clock voltages are to be generated, such an R-ratio inverter is unsuitable because of its high power loss requirement; it is then better to use a push-pull stage, as described in DT-OS 2 243 671 mentioned at the beginning
was known. However, in order to bring thereby the gate of the drain side transistor to a correspondingly high potential to make this sufficiently low resistance to make-up to full U _ _n level of the supply voltage at the output of the driver stage, it is, for example,
It is necessary to control the transistors on the ground side of the driver stage and the push-pull stage with a delay in order to first charge the bootstrap capacitor to a sufficient voltage. this
requires circuit complexity and, above all, increased power loss
in the push-pull stage, since both transistors conduct part of the charging time there. In addition, it is difficult to optimize the required delay time because it depends on the
Load capacity of the push-pull stage depends. The invention circumvents these difficulties. The MIS driver stage according to the invention, which can be integrated monolithically, makes it possible to obtain low-resistance levels both at 0 V and at the supply voltage U at the push-pull stage. A high-resistance voltage, whose
The value above the highest supply voltage U _nn is used to control the push-pull stage, but can also be used for operation
other circuit parts can be used.

An essential feature of the invention is that in the inverter input stage in series with the source-drain path of the input field effect transistor 1, not an MIS field effect transistor, but a source-drain series connection of two field effect transistors * -
sistors 2 and 3 is located. These are designed in such a way that when the input field effect transistor.1 is conducting, the is on at the same time

609848/0814 _ ₄ _

Fl 853 C. Obermeier 4

Ground-lying field effect transistor 5 of push-pull stage II conductive - the voltage is mainly on the source side of the series circuit connected field effect transistor 2 and on the source-drain path of the field effect transistor, whose drain is connected to the voltage supply ü_, only about the threshold voltage drops. As a result, the field effect transistor 6 of the push-pull stage II, whose drain connection is also connected to the voltage supply U _nn, is blocked and the feedback capacitor C _{1 is} charged to the maximum voltage U _c1 C ^ U -U _ - Δ U _, where Δ U _{T3 means} the so-called substrate effect of the threshold voltage of transistor 3. If the input field effect transistor 1 and the ground-side field effect transistor 5 of the push-pull stage II are now blocked, the voltage at the node 9 or at the gate of the field effect transistor 6 of the push-pull stage II increases to the value U _DE) -D _T3 -j4 U _T3 -U _T2 -A ^U _T2 ^an

As a result, the field effect transistor 6 of the push-pull stage II, which is connected to the voltage supply U _D _, becomes conductive and the voltage at the output A begins to rise.

Since the field effect transistor 3 blocks now, the voltage rise at output A is transmitted through the feedback capacitor C. and the conductive field effect transistor 2 to the gate of the field effect transistor 6, which is brought to a sufficiently high potential when the operating voltage is high enough, so that at output A. _{the voltage U DD is} reached with a low internal resistance. The voltage swing transmitted by the feedback capacitor C ₁ corresponds practically to the full supply voltage U _nn

In the series connection of the field effect transistors 2 and 3 of the inverter input stage The gate connections can be galvanically connected to the drain connections, as FIGS. 1 and 4 illustrate. The control of the gate and drain of the field effect

- 5 609848/081 A

Fl 853 C. Obermeier 4

However, transistor 2 of the series connection of the inverter input stage I can also take place from different circuit points via separate capacitors. The gate of the field effect transistor 2 must then be separated from the drain of the field effect transistor 2 or from the voltage supply U _D by means of a further field effect transistor 4, as FIGS. 2 and 3 illustrate. In the embodiment of a monolithically integrable MIS driver stage according to FIGS. 4 and 5, an output inverter stage III is provided in parallel to the push-pull stage II in order to increase the switching capacity.

As FIG. 5 illustrates, the feedback can not only come from a push-pull stage II, but also from one connected in parallel therewith Output inverter stage II is done by adding the gate terminal of the field effect transistor 6 'connected to the supply voltage with the common circuit point 9 of the series circuit the field effect transistors 2 and 3 is connected.

The figures reveal further circuit variants, which however, they are not absolutely necessary to achieve the object on which the invention is based. For this reason should these variances are also not described in more detail.

With the monolithically integrable MIS driver stages according to 1 to 3 and 5, the rise time (switching speed) is still dependent on the load capacitance connected to output A. The monolithically integrable MIS driver stage according to the invention according to FIG. 4 with an output inverter stage which is separate from output A. FIG II, on the other hand, largely enables a decoupling between the load capacitance at output A and the push-pull stage II. It therefore has the advantage of simpler calculation and dimensioning.

- 6

609848/081 k

Fl 853 C. Obermeier 4

The monolithically integrable MIS driver stage according to the invention works in the manner described, provided that the supply voltage U _{D is} greater than or equal to the sum of three threshold voltages and substrate effects, which is the case with most circuits.

4 claims

1 sheet of drawing

with 5 figures

609848/081

Claims (4)

PATENT CLAIMS Monolithically integrable MIS driver stage with an input field effect transistor having an inverter input stage and a push-pull stage on the output side, which contains two field effect transistors connected in series via their source-drain paths and a feedback capacitor that enables the output potential to be quickly switched between the ground potential and the Value U of the common voltage supply guaranteed, characterized in that that one connection of the feedback capacitor (C ₁ ) is connected to the common connection point (7) of the field effect transistors (5 _r 6) of the push-pull stage (II) and the other connection to the common connection (8) of two .. field effect transistors (2,3) a source-drain series circuit is connected, which in series with the source-drain path of the input field effect transistor (1) form an inverter input stage (I) whose gate receives the input signal (E) and to the gate terminal of that field effect transistor Push-pull stage (II) is connected, the source terminal of which is at ground potential. 2. Monolithically integrable MIS driver stage according to claim 1, characterized in that the gate terminal of that field effect transistor (6) of the push-pull stage (II), the drain terminal of which is connected to the voltage supply (U _DD ), with the common circuit point ( 9) the series circuit (2, 3) is galvanically connected to the source connection of the input field effect transistor (1) (Fig. 1, 2, 3, 4). 3. Monolithically integrable MIS driver stage according to claim 1. or 2, characterized in that the gate connection of a field effect transistor (6 ¹ ) is a parallel to the push-pull stu- 609848/0814 Fl 853 C. Obermeier 4 fe (II) lying output inverters ttife (III), the drain connection of which is connected to the voltage supply £ U _DD ), with the common circuit point (9) of the series circuit (2, 3) and the source connection of the input field effect transistor (1 ) is galvanically connected (Fig. 4 and 5). 4. Monolithically integrable MIS driver stage according to one of claims 1 to 3 _f, characterized in that the gate connections of the series circuit of the field effect transistors (2, 3) of the inverter input stage (I) are individually galvanically connected to their drain connections (Fig. 1 and 4). 609848 / 08U