DE2300762B2 - Arrangement for the recovery of the information from an encoded message - Google Patents

Description

The invention relates to an arrangement for recovering the information from a coded message in Form of a sequence of impulses with a duration modulated

bo gene distance and their duration changes depending on the information content of the respective pulse. Such an arrangement is referred to below as a "decommutator" for short
From DE-OS 19 22 529 an arrangement for

i> ^r > Evaluation of pulse intervals of different lengths, which represent a binary coding, known. The principle of comparing a plurality of different time intervals between one another is used.

following pulses of a pulse train are used. In order to be able to carry out the comparison principle, takes place an integration over the pulse intervals.

From DE-AS 12 94 438 an arrangement for the recovery of shown in directional clock writing is Binary information known. The directional clock script is characterized by the fact that in each Trace element a polarity reversal takes place approximately in the middle of the trace element. The arrangement according to DE-AS 12 94 438 now carries the information input signals not only to two integrators, but also to an edge detector for deriving unilateral needle pulses. The two integrators will be with controlled by the needle pulses and in turn act on a toggle switch. As with the DE-OS 19 22 529 there is no pulse duration modulation here either.

Pulse duration modulations are not only used for the binary representation of the information, they are also used Synchronization signals are not always mixed with information signals because the information signals can are transmitted separately from information signals.

When receiving the information signals, one can start from the starting times of the pulse trains recover locally.

When realizing a decommutator intended for use on board a spacecraft, which is designed for the recovery of information after the launch of the spacecraft a great difficulty in the fact that the information elements built up by df.n different Useful information is embedded in thermal noise which can be assumed to be white or Gaussian noise. In addition, the useful power received can be within fairly large limits vary, in particular as a function of the distance between the transmitter on earth and the spacecraft and the location of the spacecraft. In the known Dekommutier arrangements that for the processing of a message TDCS or an analog type are designed to be disadvantageous note that they have a fairly high error rate when detecting information bits 0 and 1. This is in part because they are commonly used with diode clamping systems work, i.e. non-linear elements that change the distribution law of the noise, then not is more of a Gaussian noise. However, this becomes an obstacle to the correct operation of the decommutator built up, because for a given signal-to-noise ratio at the input you get an essential one Deterioration of the bit error probability. This comes an increase in the required Transmission power of the transmitter largely the same if a given result is to be achieved. It it is clear that in connection with spacecraft the question of the decommtator on board of It is of utmost importance when considering the size of the distances, the changes and the noise conditions taken into account under which work must be carried out.

It is the object of the present invention to provide an improved arrangement of the type indicated above create.

This object is achieved in that each pulse of the pulse train has a part of its duration which is not characteristic of its information content and a part of its duration which is characteristic of its information content and that the recovery of the information content of each pulse by comparing the pulse integrated over its characteristic part with a reference variable occurs locally by integrating the impulse over the part that is not characteristic of its information content.
With such an arrangement for recovery

ίο of the information enables the comparison carried out to be completely free of changes in the input signal dynamics, which are dependent on the factors mentioned above
The "0" and "1" values are recorded in this way, as is the reconstruction of the synchronization signals. This is possible despite the noise. In addition, in this context, in the case of a message containing a subcarrier, it is particularly advantageous to demodulate the oscillations of the subcarrier by means of a coherent rectification of the envelope curve and not by means of a diode rectification.

It must be made clear in this context that the decommutator according to the invention can be used for the desired goal even without a coherent rectifier, however, are the results are then less good. Instead of the coherent rectifier z. B. a diode or analog system can be used. Indeed it was

jo found that therefore an optimal work only through a well-designed combination consisting of a decommutator assembly in that described in above Way a comparison is made with a reference value, and from a rectifier for coherent Rectification of the envelope can be achieved.

Further subclaims relate to advantageous configurations of the arrangement according to the invention. Whatever the design of the signals, the invention is now intended for better understanding

■ 40 based on the figure in connection with a Message of the type TDCS can be described. From the figures shows

F i g. 1 a message in the TDCS standard,

F i g. 2 shows a basic arrangement of the decommutator,

3 shows a block diagram of the basic elements of the decommutator,

Fig. 4 diagrams explaining how the decommutator works,

F i g. 5 shows a general block diagram of the decommutator according to the invention and

FIG. 6 error probability curves which have been achieved with a decommutator according to the invention.
In FIG. 1, a message of the type called TDCS (= Tone Digital Command Standard) and used by NASA and European countries for remote control of theirs is considered for a better understanding of the ideas on which the invention is based and for the construction of a practical application example

ho scientific satellite is used. Even though this "standard" is well known to those skilled in the art is shown in FIG. 1 a "word" is shown to describe the characteristic To recall properties of the standard. The word is broadcast according to the following rule

in been selected for the present case has been:

- a space E

- a synchronization signal Sund

- a series of eight information bits 10011010

The starting times of the signals or bits and their spacing define the clock frequency f; the successive points in time of the considered starting points in time are shifted in time by a period T- = Mf. In those parts in which only information is sent, the signals are modulated by a subcarrier frequency F which is equal to an integral multiple of the clock frequency / ". In the case of the standard under consideration, F-72 · / | from FIG it can be seen that a bit 1 has a length of 36 oscillations, which corresponds to a duration of 772; in the same way, a bit 0 has a length of 18 oscillations, which corresponds to 774.The synchronization signal has a length of 54 oscillations, which is one length of 3 774. Because of the large number of oscillations, these are not all shown in Fig. 1. It can therefore be seen that in a message composed of signals or bits with modulated duration - if the blank signals are not taken into account - the first quarter of the period does not contribute anything to the information content; it is not characteristic of the corresponding information (type or size) the third quarter of the period T, the information in question can be determined.

Let us now consider the case of a spacecraft that receives remote control signals from Earth receives which signals are encoded in TDCS and modulated on appropriate carrier wave amplitudes. to For this purpose, the following facilities are on board the spacecraft:

- a receiving antenna,

- a receiver connected to this antenna that does the first demodulation (in amplitude) should effect; the receiver outputs a frequency signal that is incorporated into the noise of the link, i.e. H. in the thermal noise or background noise or electronic noise of the receiver is embedded, where the receiver noise is advantageously reduced to a minimum;

A decommutator that receives the frequency signal and decommutates it, d. H. Signals from Binary type generated, which after conversion in a logical unit directly the actuators such as z. B. Can operate relays; as has been said, the present invention relates essentially on the decommutator and not on the other devices mentioned here.

The decommutator has the task of bits 0 and 1, which are coded according to the TDCS standard and by a Subcarriers of given frequency are carried to convert into a signal sequence of the type NRZ, which from Noise are free and no longer have the subcarrier frequency and thus directly for the logical unit are suitable.

It should be reminded that with signals of the type NRZ (- No Return to Zero) the entire period of a bit represents the information carrier. For example a 1 is through a first level (high) and a 0 represented by a second level (low) and you get one every time Transition when the bit changes state (from 0 to 1 or from 1 to 0).

The additional noise in the message leads to a deterioration of the signal, which in the decommutator "bit error" (transformation of a 0 into a 1 and vice versa). It is of course clear that it is extremely useful and important that the decommutatot is designed in such a way that these errors aul a minimum must be kept and that the error probability curve corresponds as closely as possible to the mathematical-theoretical curve which characterizes the type of coding used. A TDCS sequence can be as follows as a function of time

ίο be written:

f (t)

m (t)

In the above equation, P is the power, ω _{0 is} the angular frequency of the auxiliary carrier and m (t) is a time radio tion, which represents a modulation signal of the subcarrier this modulation signal is partly periodic and partly random.

In order to decode bits 0 and 1 of a TDCS sequence, one can at least theoretically use an arrangement use, which is designed according to the scheme shown in Fig.2. The input signals f (t) are sent to a multiplier M \ , the other input of which is sinusoidal clock signals of the form ] / 7 sin ωο. It creates a coherent one Rectification of the envelope of the input signals and the bits resulting from this rectification; are fed to a "perfect" integrator I] , which integrates between 774 and 772, ie over the part of the period characteristic of the number 1. the Output signals are fed to a subtracter Q , to which the reference value P ■ T / S is also fed. From the subtracter Ci, the signals arrive at a bit detector D. The introduction of the expression P ■ TIt. serves the purpose in the case of the viewed

-S5 standards to define a "decision" threshold which builds up as the mean value of the voltages representing bits 0 and 1 at the end of the integration, namely depending on the received power; thus the introduction of this expression ultimately serves det

Determination of the bits.

This decommutation arrangement allows the theoretically maximum possible working behavior of the system to be achieved, but has the serious disadvantage on that they depend on the power P of the received signal depends. In other words, she works with one

Dynamics of the perfectly known input signal;

but this is the case with those envisaged here

Earth-spacecraft connections are not the case. A device according to the invention as shown in the

Fig. 3 shown and solely from the permissible Hypothesis assumes that the dynamics of the input signal does not have enough time to complete Change in a time of the order of 774 (in practice of the order of

5 ^r > around two milliseconds), enables the above-mentioned disadvantage to be overcome.

In short, the following can be said: While the arrangement according to Figure 2 with a fixed threshold works, the arrangement works according to FIG. 3 with

. ι- "a controlled and more or less noisy threshold In the arrangement according to Figure 3 feeds the multiplier Dernodulator M \, which receives the input signal, at the same time two parallel chains, the upper chain consists of an integrator k, of the

<>'■< 0 to 774 integrated, and a memory Az in series connection, which memory stores the integrated signals during a quarter of the period. The lower chain consists of one

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Integrator / ι who works from 774 to 772 and a doubler VD. The output signals of the memory Ai and of the Vcrdoppler VD are simultaneously fed to the subtracter Q (Vcrglcichcr), the output of which is connected to the bit detector / ^. ^r i

Ks ist should be pointed out again here that the in the F i g. 2 and 3 illustrated arrangements represent only theoretical principle schemes in which z. H. the connections for controlling the integrators have not been shown. i <>

In order to enable a comparison in the comparison, one works with difference formation, ie the comparison is an adder to which the voltages are fed with opposite polarity. The mode of operation is to be illustrated with reference to FIG. 4. To i ^r> the Tcilfigiir I is in solid lines, a bit a, /> c. d represented by the value 1; at the same time, a bit is a, b in dashed lines. c ', rf' represented by the value 0 (these bits have been detected by M \ ). The tensions that arise after integration are shown on the figure II. At the beginning of the first quarter of the period, a negative voltage of the value −V has established itself in the upper chain, which is stored in the memory Ai without great loss during the following quarter of the period. ? ■>

I ^{7 For} one bit 1, integration also takes place only during the second quarter of the period in the lower chain. Because of the Vcrdoppler VD , a voltage of +2 V is obtained; a voltage of 0 is obtained if a bit with the value 0 is present. In comparison with Ci, a voltage of 2V-V = V is obtained if it is a bit of the value 1, and a voltage of - V + 0 = - V if it is a bit of the value 0.

Thus obtained under the Kinfluß of) ^r> noise that only about works in practice in the ratio of 3 dB, voltages of equal value and opposite sign - whatever the value V may be, large or smaller - so voltages can easily be evaluated by the bit detector D ίο.

FIG. 5 shows an assembly diagram of the decommutator according to the invention. Ks essentially consists of the following assemblies: ⁴¹ >

A loop Bh coupled in phase to the frequency of the subcarrier , called the high loop, and an assembly for coherent rectification for the reconstruction of the envelope _{r> (|} m (t) bMei;

- a low loop Bb for rebuilding the bit clock and

- an assembly HE, which uses the Ausgangssignalc of the two loops and operating according to the principle shown in Fig.3 _Vl to the signals 0, 1 and rebuild the Synchronisationssignalc the pulse train TDCS.

If one now considers the high-frequency loop, it works like a classic arrangement in which ^{(111 a loop filter} /? And an oscillator Ch of the voltage-controlled type are arranged after a multiplier Mi , the latter controlling the second handling of the multiplier M ₂ (possibly with the interposition of a logic divider dividing the frequency of the oscillator ^). This loop ß /, enables the coherent rectification of the envelope of the received signal, ie the reconstruction of the pulse train. The loop is a multiplier M \ and a 71 / 2PlIaSCnSi ¹ IIiCl) Cr assigned to the assembly of the loop Hi, and the Analoglcil /: 7: of the Dekommiilators to feed.

The low loop lh has a structure comparable to the structure of the high Schlcifc lh (multiplier Af ι. Filter / ■ ") and oscillator Oi): The loop is controlled by the periodic part of the signal that is responsible for the bit sequence If one directs one's attention to the aim of the discovery, one finds discrete lines in the spectrum of the random sequence which characterize the clock frequency of the bits of the integrators l \, h and / j at suitable times.

The Dckommutatorbaugruppc designated in the foregoing with /: 7: "again has the two chains already described in connection with FIG. 3; The two Kct'en control a Triggcrkippschal- lung T \ , the one kin direction R \ for the logical reconstruction nachgcschaltct is, which outputs the signals 0 and 1.

To the synchronizing signals S having the form a b, e f, having on part of Figure I in Figure 4, to get to use the upper chain h-j together with a Krgänzungskette / ι- VD 'is the analog of the chain I ] - VD is established. The top chain and the complement chain control a comparator Cj. where the integrator / j integrates from 772 to 3 774. . On the part of Figure II in the I · "i g 4, the variation of the potential is shown in phantom in the latter chain; the Krzeugung the Synchronisationssignalc obtained without difficulty from the comparison with the Krzeugung of bits 0 and 1. The Synchronisationssignalc S are Interposition of a trigger flip-flop 7} and a kin direction Ri generated for the logical reconstruction.

Finally, in FIG. 6 shows the student probability curves that are relevant in such a device, which is the focus of interest here. In the figure, the ratio /: 7No (dB) of the mean coefficient I: radiated per bit and the spectral _{density of the noise N 0 is} shown on the abscissa, the noise being assumed to be white noise with Gaussian scaling. The probability ρ (E) for a bit error is plotted on the ordinate in the_k) Garithmic scale. It is assumed here that the bits are equally probable and independent of one another.

Curve 1 shows the probability of a bit error in a decommutator according to the present invention, but the control signals for the integrators are without noise (the loop lh has an infinitely narrow band); curve 2 is obtained under the same conditions, but with noisy control signals (signaux de commande bruitds). This curve has been drawn by calculating the arithmetic mean of the points lying on the same vertical of curves 3 and 4. Curves 3 and 4 correspond to the probability wedge for "1" and "0", but taken separately.

It is clear that the possibilities of implementation described above can only be assessed as examples and it is entirely possible to make changes especially to apply equivalent techniques without deviating from the basic idea of the invention.

Ks are many different possibilities of recalization

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ίο

leu in fact possible (lie stay in the invention range. For example, it is clear that practically reaches / to the same result if, instead of multiplying by a factor of 2 in, Line chain of Fig. i division by 2 in the upper Or the doubler VD can very well be omitted and this can be included in the integrator / ι if the elements of the integrator are selected in a suitable manner. It is also possible to omit the doubler and in the integrator h from 778 to 774 to integrate (for the »its 0 and I). (! an / in general one is not forced to integrate 0-7 / 4 and 774-7/2 over the entirety of the corresponding period parts, rather it is sufficient if one works part-time integrated; it should be noted here that this is disadvantageous in terms of efficiency.

Furthermore, one is not forced to limit oneself to a doubling in VD. In general, it is only necessary that the extraction of the signal corresponding to the entire value or the type of information - for the purpose indicated above - takes place by comparing the pulse or a series of rectified oscillations with a reference variable. The impulse is integrated over a part of its duration characterizing the value or type of information of the impulse or the series, and the reference quantity is obtained locally by integrating the impulse or the rectified series of oscillations over a part of its duration that is not characteristic of is the value or type of information. The comparison is made with the aid of means, the purpose of which, starting from the value 0, is to build a reference threshold which is necessary for a decision about the type of bit.

In the same way, one can simplify the implementation of a decommutator according to the invention without restricting oneself to the TDCS standard. In this case the message is not necessarily composed of a train of pulses modulated by a subcarrier. The message can randomly consist of at least two information elements

IU to be built; these pulses then all comprise a non-characteristic part of the duration T / n in a period Γ; one of the information values comprises a characteristic part of the duration T / r (without overlapping with the other part) and another

! ■> Information value includes a characteristic part of duration 0. Here /? And r are numbers that can be different. In this case, the decommutator according to the invention has two chains fed in parallel, one of which includes an integrator which integrates in each period T for a duration T / n corresponding to the non-characteristic part. This integrator forwards the integrated signal to a storage element which stores the integrated signal until the end of the duration T / r . The other chain has an integrator which integrates in each period 7 * during the duration T / r corresponding to the characteristic part. Furthermore, the chain has a device for the relative exaggeration of the signal fed in by the latter integrator in comparison to the

Ό Signal from the other integrator. These two chains are connected to a comparator in which the above-mentioned comparison is carried out.

For this purpose 3 sheets of drawings

Claims (10)

Patent claims: 1. An arrangement for recovering the information of a coded message in the form of a sequence of pulses modulated in their duration, the starting times of which are uniformly spaced and the duration of which changes as a function of the information content of the respective pulse, characterized in that each pulse (S; 0; 1) of the pulse sequence has a part (T / n) of its duration which is not characteristic of its information content and a part (0; Τ / ή of its duration) that is characteristic of its information content and that the recovery of the information content of each pulse by comparing that which is characteristic of its Part (Τ / ή integrated impulse ß) takes place with a reference value that takes place locally by integration (I ₂ ) of the impulse over the part (T / n) that is not characteristic of its information content. 2. Arrangement according to claim 1, characterized in that the part characteristic of its information content for one of the possible information values (0) has the duration zero, that two chains fed in parallel are provided, the first of which has a first integrator (I ₂ ) , which is integrated within each period (T) during the non-characteristic part (T / n) and is connected on the output side to a memory (A ₂ ) which stores the signal after the integration of the first integrator (I ₂ ) until the end of the characteristic part (Τ / ή stores, and of which the second chain has a second integrator (1 \) which integrates within each period (T) during the characteristic part (Τ / ή , and that a device (VD) for exaggerating the of the second integrator (I \) output signal is provided relative to the output signal of the first integrator (I ₂ ) and that the outputs of the two chains are connected to a comparator (Q) . 3. Arrangement according to claim 2, for the recovery of bits 0 and 1 from a message of the type TDCS with a period T, a non-characteristic part T / n and a characteristic part T / r, characterized in that the part T / n dem Time interval 0 - T / 4 within the period T and the part T / r corresponds to the time interval TA - T / 2 within the period ^ and that the device for the relative increase consists of a doubler (VD) connected in the second chain. 4. Arrangement according to claim 2 for the recovery of the synchronization signals from a message of the type TDCS with a period T, a non-characteristic part T / n and a characteristic part T / r, characterized in that the part T / n corresponds to the time interval 0-774 within the period T and the part T / r corresponds to the time interval T / 2–3 TIA within the period T , and that the device for the relative superelevation from a doubler connected in the second chain f orders in advance. 5. Arrangement according to claims 3 and 4 for the recovery of bits 0 and 1 and the synchronization signals of a message of the TDCS type, characterized in that three chains fed in parallel are provided, one of which has an integrator integrated in the time interval 0-774 ( I ₂ ) , which cooperates with each of the other two chains, one of which has an integrator (1 \) integrating in the time interval T / 4- T / 2 and a doubler (VD) and the other one in the time interval 772-3 774 integrating integrator (I ₃ ) and a doubler (VD ') , the cooperation of the first chain with the other two chains via comparators (Q and Ct) which generate the information bits and the synchronization signals. 6. Arrangement according to claim 2, characterized in that the integrators (I \, I ₂ ) of the two chains are controlled by timing signals which are derived from a phase loop (M ₃ , Fi, O ₃ ) restoring the bit clock. 7. Arrangement according to claim 2, characterized in that each pulse is made up of a series of oscillations and the pulses are demodulated by means of a synchronous rectifier (M \) before being fed to the integrators. 8. Arrangement according to claim 2, characterized in that each pulse from a series of Vibrations is built up and the impulses before the feed line to the integrators in one asynchronous rectifier can be demodulated. 9. Arrangement according to claim 2 for the recovery of bits 0 and 1 from a message of the type TDCS with a period T, a non-characteristic part T / n and a characteristic part T / r, characterized in that the part T / n corresponds to the time interval TIi-TIA within the period T and the part T / r corresponds to the time interval 774-772 within the period T and that Γι the integrators (I \, I ₂ ) are identical and that the device for the relative increase is realized in that the integration interval of the first integrator (I ₂ ) is limited to a duration T / 8. 10. An arrangement according to claim 2 for the recovery of the synchronization signals from a message of the TDCS type with a period T, a non-characteristic part T / n and a characteristic part T / r, characterized in that the part T / n corresponds to the time interval T / 8 -T / 4 within the period T and the part T / r corresponds to the time interval T / 2-3 T / 4 within the period T and that the integrators (Ti, / 2) are identical and the device for relative exaggeration is thereby implemented that the integration interval of the first integrator (I ₂ ) is limited to a duration 778.