DE2118213C3 - Monolithically integrated semiconductor circuit - Google Patents

Description

The invention relates to a monolithically integrated semiconductor circuit with the preamble of the claim 1 specified training.

Such a semiconductor circuit, which is also referred to as a "power bank" in the specialist world, was already known from DE-OS 19 11 934 Regarding the Reference is made to this prior publication for advantages and possible applications.

When using such as a constant current source The planar transistor structure used occurs in particular in the case of digitally operated monolithic integrated semiconductor circuits the problem of saturation. Because of the saturation comes the Collector-base-pn-junction in the flow direction, so that the input resistance is very small. This can the value of the reference voltage, which is set by the variable resistor, change, so that the Currents of the other planar transistor elements and thus the working points of the active ones to be supplied Change circuit elements. It is therefore desirable to use the planar transistor structure used as a constant current source, which in the operation of the active circuit element to be supplied into the saturation state can come to be modified in such a way that the value of the input resistance in the case of saturation to a such a value is increased that the currents in the other planar transistor elements used as a constant current source stay constant.

This problem of increasing the input resistance of a planar transistor structure used as a constant current source, which can become saturated during operation, is solved in the monolithically integrated semiconductor circuit according to the invention by the design specified in the characterizing part of claim 1
From DE-OS 20 16 760 it was known to derive the minority charge carrier injection occurring when a planar transistor element in a monolithically integrated semiconductor circuit saturates from the base zone into the collector zone before entering ii> the substrate by means of a Hüfskollektorzone.

ίο The pre-release doesn't cover that though Problem of saturation of a planar transistor structure used as a constant current source of a number of further PIanartranstor elements used as sources of constant currents, whose emitter and base zones are connected in parallel and one of which is a planar transistor element together with a variable resistor as a reference voltage source for the remaining planar transistor elements and the planar transistor structure is used and can come into saturation during operation.

The prior publication also gives no suggestion, the auxiliary collector zone with the emitter zone of the respective To connect planar transistor structure electrically.

The invention is explained below with reference to the drawing in which the

F i g. 1 shows the circuit with a series of transistor elements used as constant current sources shows from which the invention proceeds

Fig.2 excerpts in section perpendicular to Surface of a semiconductor plate is a well-known planar transistor element used as a constant current source of a monolithically integrated semiconductor circuit is shown in FIG

3 shows an equivalent circuit diagram of the planar transistor element with regard to the problem underlying the invention, the

F i g. 4 shows the planar transistor structure as a cutout in section perpendicular to a plate-shaped semiconductor body the monolithically integrated semiconductor circuit according to the invention, the

F i g. 5 shows the equivalent circuit diagram of the planar transistor structure according to FIG. 4 and the

F i g. 6 schematically shows the course of the input resistance as a function of the collector current in the saturation range in the case of a planar transistor structure according to FIG 2 in comparison to a planar transistor structure according to FIG. 5 concern.

The invention is therefore based on the circuit of a so-called "current bank" according to FIG. 1, as it does from DE-OS 19 11 934 already mentioned

so was. This "current bank" consists of a number of similar transistor elements Ti ... T _n , the emitter and base zones of which are connected in parallel and of which a planar transistor element 7} together with a variable resistor Ru as a reference voltage source for the remaining planar transistor elements Ti ... T _n serves Among these there should be a planar transistor structure which can become saturated during operation.

The invention naturally also takes place in the same way

ag their application when further or also all of the planar transistor elements T ₂ ... T _n can come into the saturation state. To simplify the essence of the invention, it is assumed that only one planar transistor structure of the series T ₂ ... T _n in operation

h ^r ) can come into the state of saturation.

The load resistances Rl2 ■■■ Rlh mean active circuit elements to be supplied, for example transistors of still further integrated circuit

processing units of the monolithic integrated circuit. Such circuit units can be bistable multivibrators, for example. In this connection it should be noted that the use of a planar transistor structure according to the invention is particularly advantageous in the case of digital circuit units, since the circuit elements of such circuit units can particularly frequently reach the saturation range. The variable resistor Rl \ of the first transistor element T \ in the series is used to adjust the voltage of the reference voltage source, which this variable resistor mk forms the transistor element Ti. In the circuit according to FIG. 1, the emitter resistances Tei ... Γ _{α are} drawn in, the value of which is essentially given by the product of the current gain value χ with kT / le , if no additional emitter resistance is provided, the value of which must still be taken into account . In the absence of such an additional emitter resistance, the emitter resistance r _{e is} given by the product of the current gain value α in the emitter circuit with kT / Ie, where k is the Boltzmann constant, T is the absolute temperature and Ic is the emitter current. This relationship is well known

In a monolithically integrated semiconductor circuit, the transistors Ti ... T _{n can be} in the form of planar transistor elements according to FIG. 2 are executed. In FIG. 2, which shows a section perpendicular to the surface of the semiconductor plate of such a monolithically integrated semiconductor circuit, 1 denotes the semiconductor base body of the one conduction type, on which the epitaxial layer 2 of the other conduction type is applied, soft from an insulating ring zone 3 of the conduction type The base body is penetrated This creates the collector zone 5, separated by a pn junction area from the semiconductor base body and the other semiconductor elements of the semiconductor circuit in terms of direct current, in which the base zone 8, the emitter tubes 6 and the collector contact zone 7 of the conductivity type of the collector zone are inserted. The entered conductivities are only intended to illustrate the relative references. The oxide layer present in planar elements has been omitted. The connections to the zones, which are normally arranged on the oxide layer as interconnects making contact with the electrodes of the zones, are indicated in the form of wire ends

Now comes a planar transistor structure of a monolithic integrated circuit according to the invention Planar transistor used. ^ element according to FIG. 2 in the saturation region, then minority charge carriers are injected from the base zone 8 into the collector zone 5 since the pn junction between the base zone 8 and the collector zone 5 comes in the direction of flow. This minority charge carrier are partially from the base body 1 and partially from the insulating ring zone 3 as Collector added, so flow over the base body 1 from. The current distribution of the minority charge carriers is initially based on the Distance between the injecting pn junction of the base zone 8 and the pn junction that acts as a collector between the collector zone 5 and the insulating ring zone 3 or the base body 1.

The largest minority charge carrier current flows over the narrowest point of the collector zone 5. This phenomenon can be seen in an equivalent circuit according to FIG. Are exemplified _p by a parasitic T 'jisistor T 3, in parallel with the input (base zone towards the base body), and at saturation the Planartransistorstruktur -.. In the present example with a pnp structure - in an active region comes into discrete Planartranistoren is the Input resistance in saturated condition approximately equal to the emitter resistance. In the case of monolithically integrated semiconductor circuits with a planar transistor structure according to FIG. 2, this does not apply since the parasitic transistor T _{p is} the base zone of the planar transistor structure

ίο to the base body and thus also the emitter resistance bridged

The planar transistor structure according to FIG. 4 of a monolithically integrated semiconductor circuit according to the Invention differs from that of FIGS. 2

is only through the auxiliary coUector zone 9, which the Base zone 8 on the free surface 11 of the epitaxial layer 2 surrounds and with the emitter zone 6 is electrically connected directly and preferably exclusively, as by the conductor 10 in FIG. 4th This conductor 10 wire "illustrated is of course like the other connections of the monolithic semiconductor circuit, as usual, in the form of an interconnect arranged in the partially perforated oxide layer for contacting

The arrangement of the auxiliary co-uector zone 9 takes place under the same aspects as in the above DE-OS 20 16 760 has been described. It is assumed that this auxiliary coUector zone 9 with the collector zone 5 and the base zone 8 of the planar transistor structure form a parasitic lateral transistor Its α-value is initially higher, the smaller the distance between the two The pn transition of the lateral transistor structure is also the λ value is influenced by the intermediate layer 4 of the conduction type of the collector zone 5 at the interface between the base body 1 and the epitaxial layer 2. This intermediate layer 4 doped higher than the collector zone results in a Drift field, which the minority charge carriers in the collector zone 5 in the direction of the free surface 11 the ef-tactical layer 2 accelerated

The mode of operation of an embodiment according to the invention results from the equivalent circuit diagram according to FIG. 5. In contrast to the equivalent circuit diagram according to FIG. 3, the collector of the parasitic transistor T _{p is} not connected to the base body, but directly to the emitter, so that the resistance at input E compared to FIG. 3 by a much larger value, namely by the

so the emitter resistance r _{c is} given. The collector current of the parasitic transistor T _p is thus over the

EmitterwkSerstand the planar transistor structure Tgelei-

tet

The higher the current gain «this

parasitic lateral transistor T _p , the higher the resistance via input E, since less current can flow into the base body. In the monolithically integrated semiconductor circuit according to the invention, the input resistance Re of the planar transistor structure falls into the saturation range according to the dashed curve in FIG. 6 from the value β · r _e to the value r _ft while using a normal planar transistor element according to FIG. 2 a drop to much smaller ones

o ·) Values according to the solid curve in FIG. 6th results. In a monolithically integrated semiconductor circuit according to the invention, the risk of Collapse of the reference voltage itself

several planar transistor structures used as a constant current source avoided if these are switched in the specified manner.

Such a risk would exist in particular in the case of switching stages of the integrated semiconductor circuit which are located instead of the load resistors Ri and are temporarily switched off. Due to the thus becoming too large Ri., There is a risk that the power source used is as Planartransiistorstrul saturation region and the Stabilisierui be realized by applying the invention könnei circuits in monolithic integrated or Fo are possible.

For this purpose 2 sheets of drawings

Claims (2)

Patent claims: 1. Monolithically integrated semiconductor circuit with one used as a constant current source Planar transistor structure, a number of other planar transistor elements used as constant current sources, whose emitter and base zones are connected in parallel and one of which is a planar transistor element together with a variable resistor as a reference voltage source for the remaining planar transistor elements and the planar transistor structure serves, the planar transistor structure in an epitaxial semiconductor layer of the one conduction type arranged on a semiconductor base body of the other conduction type and of an insulating zone of the conductivity type of the base body which penetrates the epitaxial semiconductor layer is surrounded and can reach the state of saturation during operation, characterized in that that the base zone (8) of the planar transistor structure on the free surface (11) of the epitaxial semiconductor layer (2) from an auxiliary collector zone (9) of the conductivity type of the base zone (8) is surrounded and that the auxiliary collector zone (9) is electrically connected directly to the emitter zone (6) of the Planar transistor structure is connected 2. Monolithic integrated circuit according to claim 1, characterized in that the auxiliary collector zone (9) electrically connected exclusively to the emitter zone (6) of the planar transistor structure is