DE19540570A1 - High packing density circuit board - Google Patents

Abstract

A circuit board has, on at least one side, devices applied by thin film technology employing chemical metal deposition. Pref. the devices have a layer thickness of less than 3 (pref. less than 1) micron and the board has a multilayer structure of two or more circuit board layers (2,3,4). Also claimed is a process for prodn. of the above circuit board by: (a) placing a substrate (pref. a Cu-clad substrate board) in an activating soln. to activate the regions where devices are to be produced; and (b) placing the substrate in a chemical metal plating bath to deposit a metal (pref. Pd) layer for forming the devices.

Description

The invention relates to a circuit board with on a Layer-provided conductor tracks and substrate provided Components.

Printed circuit boards with components are almost in use today all electrical and electronic devices. It printed circuit boards are known, for example with an epoxy glass fabric as base material and a printed circuit at least one side, the conductor tracks by etching the copper-clad base material are formed. Components with small dimensions are from their own connecting wires worn soldered to the conductor tracks. Because of their size  can only a few components on such PCB can be accommodated.

To increase the component packing density, double-sided assembled circuit boards used. Both are at the Top and bottom of the circuit board Conductor tracks and components provided. The double sided Printed circuit board is also suitable for mixed assembly with conventionally wired and wireless smaller SMD Components. However, these circuit boards are on the request even higher component packing densities, for example with radio telephones or unsuitable for devices in the car and hi-fi industry. It can also not be more complex electronic Connection structures realized between the components will.

For the construction of more complex circuits or connections of the Components are known in multilayer printed circuit boards. The individual circuit board layers of such multilayer circuit boards generally have conductor structures on both sides, but their layout can be different. Between PCB layers an insulating layer is arranged, and they are interconnected in such a way that their inward facing pages are no longer accessible. A multilayer Printed circuit board has bores at predetermined locations the bottom and top of the multilayer circuit board located connecting wires or contacts of the  Components with the conductor track structures of a certain inner side of one of the individual PCB layers connect. The limits of this multilayer circuit board regarding a high component packing density consists of that only two sides of the multilayer circuit board, the top and the bottom, can be equipped with components.

From US Pat. No. 5,227,012 it is known Resistor devices in the form of thin layers with a Layer thickness of less than 1 µm with sequential build To provide printed circuit boards. However, this U.S. patent teaches when building the multilayer structure in the one above the other arranged layers to form recesses, on the basis of which mentioned thin film resistances by sputtering and etching be generated. Again, there are a maximum of two pages for Arrangement of these components available.

The present invention has for its object a To develop circuit board that allows a higher Component packing density and circuits with more complex Connection structure than in known circuit boards realize. The manufacture of assemblies with simple Components, e.g. B. resistors and / or capacitors become technically simpler and more economical.

This object is achieved by a circuit board layered conductor tracks and components solved that  is characterized by in thin film technology in the way chemical metal deposition on at least one side of the Printed circuit board components.

The one to be coated with component material PCB surface can be created after a Conductor structure in any way by known Mask or cover the surface, for example by Imaging in a photoresist, define and prepare, and by immersing in a chemical bath Metal deposition becomes the component coating upset. This allows very thin Component layers, preferably less than 3 µm, to reach.

The components can have sheet resistances, Film capacitors with interlocking, mutually insulated capacitor fingers and plate capacitors one conductor track contacting one another Layers between which a dielectric and / or a Insulating layer is arranged.

The resistance material is preferably an as Layer resistance trained component palladium.

The invention is also suitable for use with Printed circuit boards that have a multilayer structure.  

To achieve a high component packing density, are on two mutually facing surfaces adjacent Printed circuit board layers components according to the invention arranged.

The circuit board layers of an inventive Multilayer structure are preferably with one in between arranged insulating layer pressed.

In a development of the invention, a printed circuit board is used proposed a variety of light emitting diodes preferably closely adjacent on one side of the Printed circuit board are provided and together one Form lighting element of high illuminance. This Lighting element can, for example, in Use motor vehicle area advantageously, since here for Available space is always very limited. Of the Use of a lighting element according to the invention, for example as the rear light of a motor vehicle would also have the advantage that a failure of the only light bulb with that associated dangers and the need for repair would occur more. The making of one Lighting element is also cheaper.

Then a highest diode density on the circuit board possible if the series resistors for the LEDs from components applied according to the invention are formed.  

The further task is accomplished by a manufacturing process solved the circuit board according to the invention, which thereby is characterized in that the substrate by introduction into a Activation solution is activated in the areas where Components are to be produced, and that these Components by subsequent introduction of the substrate in a bath for chemical metal deposition by deposition a metal layer are formed.

Through the activation process will be concerned on Crystallization nuclei deposited, which the chemical metal deposition in the following Enable procedural step. For the invention Methods can be known for chemical metal deposition and commercially available activation solutions and baths will.

A is preferably used to carry out the method copper-clad substrate plate as starting material used on their surface in photo printing / etching technology Copper conductor tracks are formed. The area by area Activate the substrate surface or the Conductor sections, which are the contact for the Forming components is done by covering the rest Areas, preferably using one in photo printing generated photoresist layer.  

It has also proven advantageous that Photoresist cover before inserting the activated substrate into the bathroom to activate the conductor connection areas remove, especially to strip.

The activation of those areas on which Component material is to be deposited, d. H. of the Substrate areas on the one hand and interconnect connection areas on the other hand, can be in a single or multi-stage Activation process to be carried out. It turned out to be proven advantageous, the two areas in one to activate two-step process.

Further features, details and advantages of the invention result from the appended claims and the attached drawing and subsequent description of a preferred embodiment of the circuit board according to the invention and the method according to the invention.

In the drawing shows

FIG. 1 is an exploded view of a three individual circuit board layers multilayer circuit board;

FIG. 2 shows a schematic view of a region of the middle circuit board from FIG. 1 with a sheet resistor;

Fig. 3 is a schematic view of a portion of the center conductor plate of FIG 1 with a finger condenser.

FIG. 4 shows a schematic view of a region of the middle printed circuit board from FIG. 1 with a layered plate capacitor;

Fig. 5, 5a is a plan view of a mounting components having a plurality of light emitting diode printed circuit board according to the invention; and

FIGS. 6 to 15, the steps of a manufacturing method of the invention a printed circuit board according to the invention.

In all figures there are printed circuit boards, conductor tracks and layered components because of the better Clarity shown on an enlarged scale.

Fig. 1 is a multilayer printed circuit board shows 1 with an upper printed circuit board layer 2, an intermediate printed circuit board layer 3 and a lower printed circuit board layer 4. The individual printed circuit boards 2 , 3 , 4 are, for example, so-called FR4 printed circuit boards, which are copper-clad on both sides, so that a printed circuit layout can be created on each side. Insulating layers 6 and 7 are arranged between the printed circuit boards 2 , 3 , 4 . The top of the circuit board 2 is 2 a, the bottom with 2 b, the top of the circuit board 3 with 3 a, its bottom with 3 b and the top of the circuit board 4 with 4 a and the bottom with 4 b. The circuit boards 2 , 3 , 4 are pressed with the insulating layers 6 , 7 after completion. In conventional wiring technology, components 8 and 9 and in wireless SMD technology, components 11 and 12 are arranged on the outer sides of the multilayer printed circuit board, that is to say the upper side 2 a of the printed circuit boards 2 and the lower side 4 b of the printed circuit board 4 .

Between the circuit boards 2 and 3 , a conductor track 17 is provided on the top 3 a of the circuit board 3 . A conductor track 16 is located on the top 4 a of the circuit board 4th The conductor tracks 16 and 17 are connected to one another in an electrically conductive manner by contacted metallized bores 101 .

Fig. 2 shows a detail of the upper side 3 a of the circuit board 3 with a between the strip conductor 17 and a further conductor track 22 which is arranged meander-shaped resistor 21 layer. At its ends 23 and 24 , the sheet resistor 21 has transition regions in which the conductor tracks and the material of the sheet resistor overlap and form a good electrical connection because of the large-area contact as a result. A component 25 created in this way is arranged on the underside 3 b of the printed circuit board 3 .

The component shown in FIG. 3 is a layered finger capacitor 31 . The conductor track 32 has three layered capacitor fingers 33 , which extend into the spaces between four layered capacitor fingers 34 of a second conductor track 36 . This arrangement results in a parallel connection of six individual capacitors (number of all capacitor fingers minus 1), which are formed by capacitances between the individual fingers and add up.

Fig. 4 shows the top 4 a of the circuit board 4 with a layered plate capacitor 41st In this case, an insulating layer 42 is applied over the conductor track 16 , which insulates the conductor track 16 from the end 43 of the conductor track 44 , which overlaps the conductor track 16 over a certain area. The insulating layer 42 forms the dielectric. The parallel layer-like overlapping conductor tracks 16 and 44 , between which a dielectric is arranged, form the layer capacitor.

Fig. 5 shows a circuit board 46 having a plurality of ports 47, not shown in the figure, light-emitting diodes. The connections 47 are designed in the form of tinned through openings in the printed circuit board 46 , into which connection wires of the light-emitting diodes can be inserted and soldered. The connecting lines 48 in FIG. 5a, which shows a view of the rear side of the printed circuit board 46 , designate the interconnects connecting the through openings 47 .

The through openings 47 are - as can be seen from FIG. 5 - arranged in groups of four openings. There are the two upper connection openings 49 in one group or the two lower connection openings 50 in another group connected to one end of a meandering thin-film resistance track 51 , the other end to a supply voltage (12 volts, 9 volts, 6 volts, 3 volts) ) leading conductor 53 is connected. The thin film resistor track 51 forms the series resistor for the light emitting diodes. Because it is arranged spatially between the connections of two light-emitting diodes, that is to say forms the series resistor for two light-emitting diodes, a larger number of light-emitting diodes can be accommodated per unit area.

Referring to Figs. 6 to 15, an exemplary method for the production of printed circuit boards with applied in thin-film technology devices will now be described, the multilayer printed circuit boards is also suitable for the production of.

In order to produce copper conductor tracks on the substrate, the known photo printing is carried out. Liquid or solid photoresist 64 is applied to the copper layer 62 on a copper-clad substrate 60 . Using an exposure mask (not shown) or a correspondingly cut film, a conductor track structure is exposed in the photoresist, that is to say, for example, those areas 66 of the surface which are to form the conductor tracks are exposed while the other surface areas 68 remain dark ( FIG. 6). After development, the photoresist is used where conductor tracks are to run. The copper layer 62 is now etched out at the areas 68 surrounding these locations; after removal of the photoresist 64 , the connection diagram shown in FIG. 7 of the conductor tracks 70 formed by the copper layer 62 then remains.

However, not only those areas between the conductor tracks that separate the conductor tracks from one another remain free, but also areas on which a component is applied in layers in the method steps to be explained below. When the connection diagram according to FIG. 7 is viewed from above, copper surface areas and substrate surface areas of an FR4 plate or any other desired substrate material are shown according to the preceding description. In order to be able to chemically deposit component material from a solution on these surfaces using thin-film technology, the corresponding surface areas must be activated in a suitable manner.

For this purpose, a photoresist layer 72 shown in FIGS . 8 and 8a is applied again, the photoresist layer after exposure and development covering the entire surface except for those areas 73 on which component material is to be deposited. In FIGS. 8, 8a, this area of the substrate 60 extends from the surface 74 of a conductor 76 via its edge 78 to the surface 80 and from there to a further edge 82 a in FIG. Conductor track 84 shown to the right 8, whose cross upwards and over a connection area on the surface 86 of this conductor track 84 . The region 73 shown in FIG. 8a runs straight only by way of example; a meandering mask structure 88 as shown in FIG. 8b could also be produced.

The substrate preparation required for the deposition of component material is then carried out. To clean the surface, 5% H₂SO₄ (10 seconds at room temperature) can be used as a release agent; after a rinsing process, preferably in a cascade rinse, the free substrate surface 80 is conditioned. For example, a conditioning agent (conditioner Neopact) available from ATOTECH can be used for sensitization. After a subsequent rinsing process, the substrate surface 80 is activated by an activator agent, for example activator Neopact, so that the activated substrate surface area 90 indicated in FIG. 9 is formed.

After a subsequent rinsing process, the photoresist layer 72 serving as a cover can be removed, for example by stripping, so that a layer structure according to FIG. 10 with activated surface areas 90 is obtained.

Subsequently, the activation of the copper surfaces 92 indicated in FIG. 11 is carried out. For this purpose, the circuit board is pre-immersed in a one percent H₂SO₄ solution for 30 seconds at room temperature. Pallatect activator, for example, can be used as activator agent for copper surfaces.

After a rinsing process, the activated regions 90 , 92 are metallized by chemical palladium deposition (without current). For this purpose, the element shown in FIG. 11 is immersed in a bath for chemical palladium deposition, such as Pallatect PC. During this method step, a more or less thick component layer 94 is deposited depending on the immersion time, as shown in FIG. 12, the thickness ratios not being to scale for the sake of clarity. A rinsing process is then carried out. Commercial baths are used under the reaction conditions and times specified by the manufacturer or supplier (ATOTECH company).

After a drying treatment (15 minutes at 70 ° C. in the oven), the printed circuit board shown in FIG. 12 is prepared for soldering connections or other components. The entire surface is covered with solder mask 96 . Thereafter, transition points 98 from palladium to copper are exposed by appropriate partial exposure of the surface ( FIG. 13). The circuit board is then introduced into a chemical copper bath without further pretreatment for about 20 minutes, as a result of which copper 100 is deposited on the exposed palladium / copper transition points ( FIG. 14). The structure shown in FIG. 15 is obtained by covering the entire surface again with solder resist 102 and then releasing the solder pads 104 , which are then tinned. Electrical connections or components can then be soldered in this tinned pad area 104 .

Claims (24)

1. Printed circuit board with layered conductor tracks ( 16 , 17 , 19 , 22 , 32 , 36 , 44 ) provided on a substrate and with components ( 21 , 31 , 41 ), characterized by thin-film technology, by means of chemical metal deposition, on at least one side components ( 21 , 31 , 41 ) applied to the circuit board. 2. Printed circuit board according to claim 1, characterized in that a component ( 21 ) is a between resistor tracks ( 17 , 22 ) provided, in particular meandering sheet resistance. 3. Printed circuit board according to claim 1 or 2, characterized in that a component ( 31 ) is a layer capacitor arranged between conductor tracks ( 32 , 36 ) with interlocking, mutually insulated capacitor fingers ( 33 , 34 ). 4. Printed circuit board according to claim 3, characterized in that a dielectric is provided between the capacitor fingers ( 33 , 34 ). 5. Printed circuit board according to one or more of the preceding claims, characterized in that a component ( 41 ) is a plate capacitor of superimposed layers, each having a conductor track ( 16 , 44 ) contacting layers, between which a dielectric and / or an insulating layer ( 42 ) is arranged is. 6. Printed circuit board according to one or more of the preceding claims, characterized in that the resistance material of a component designed as a sheet resistor ( 21 ) is palladium. 7. Printed circuit board according to one or more of the preceding claims, characterized in that the component layer ( 21 , 31 , 41 , 51 ) has a layer thickness of less than 3 µm, preferably of the order of less than 1 µm. 8. Printed circuit board according to one or more of the above Claims, characterized by a protective lacquer layer. 9. Printed circuit board according to one or more of the preceding claims, characterized by a multilayer structure comprising at least two printed circuit board layers ( 2 , 3 , 4 ). 10. Printed circuit board according to claim 9, characterized in that arranged on two mutually facing surfaces ( 2 b, 3 a; 3 b, 4 a) adjacent circuit board layers ( 2 , 3 , 4 ) in thin-film technology components ( 21 , 31 , 41 ) are. 11. Printed circuit board according to claim 10, characterized in that its printed circuit board layers ( 2 , 3 , 4 ) with the conductor tracks provided thereon ( 16 , 17 , 19 , 22 , 32 , 36 , 44 ) and components ( 21 , 31 , 41 ) with an insulating layer arranged between them are pressed. 12. Printed circuit board according to one or more of the above Claims with a variety of light emitting diodes. 13. Printed circuit board according to claim 12, characterized in that the components comprise resistors ( 51 ) which form series resistors for the light-emitting diodes. 14. Printed circuit board according to claim 13, characterized in that the resistance components ( 51 ) are provided in a meandering shape. 15. Printed circuit board according to claim 14, characterized in that the meandering resistance components ( 51 ) are each arranged between the connections of a light emitting diode on the printed circuit board. 16. Printed circuit board according to claim 15, characterized in that each meandering resistance device to two  Diodes connected in series and in the area between them Connections is arranged on the circuit board. 17. A method for producing a printed circuit board according to one or more of the preceding claims, characterized in that the substrate ( 60 ) is activated by introduction into an activation solution in the areas ( 90 , 92 ) where components are to be produced, and that these components by subsequently introducing the substrate into a bath for chemical metal deposition by depositing a metal layer ( 94 ). 18. The method according to claim 17, characterized in that the metal layer with a thickness of less than 3 is preferably formed of less than 1 micron. 19. The method according to claim 17 or 18, characterized characterized in that the metal is palladium acts. 20. The method according to any one of claims 17 to 19, characterized characterized in that a copper-clad substrate plate is used as the starting material on its surface Copper printed conductors formed in photo printing / etching technology will.   21. The method according to any one of claims 17 to 20, characterized in that the activation in regions is carried out by covering the remaining regions with a photoresist layer ( 72 ) produced in photo printing. 22. The method according to claim 21, characterized in that the photoresist cover ( 72 ) is removed, in particular stripped, before the substrate is introduced into the bath in order to activate the interconnect connection regions. 23. The method according to any one of claims 17 to 22, characterized characterized that a two-step activation process is applied. 24. The method according to claim 23, characterized in that first the substrate areas ( 90 ) and then the interconnect connection areas ( 92 ), where component material is to be deposited, are activated.