DE1817461B1 - Circuit arrangement for an electronic ring counter - Google Patents

Description

1 2

The invention relates to a circuit arrangement made which comprises three bistable multivibrators,

for an electronic ring counter, in particular an example of such a known ring counter

those with three counting levels, each counting level being off in FIG. 1 illustrates.

consists of a transistor and a diode and per stage As from F i g. 1, transistors Tr _{1 form}

contains at least one voltage divider between 5 and Tr ₂ , Tr _s and Tr ₁ and Tr ₅ and Tr ₆ each three

the collector of the respective transistor of the counting bistable multivibrators, which are connected in cascade

level and earth, and with the common counting are connected to each other. By creating a

pulse line as well as with the base of the next return input to a return input terminal R.

Transistor is connected. the transistors Tr ₂ , Tr ₁ and Tr _{5 are} conductive and

Such a circuit is, for example, from the IO, the transistors Tr ₁ , Tr ₃ and Tr ₆ non-conductive. if

German Auslegeschrift 1 274189 known. In such a state, a positive release

Multistable electronic pulse counter shown there, pulse fed to a triggering input terminal T.

ie ring counter with η counting steps, if it is, it is switched on via diodes D ₄ , D ₅ and D ₆

part, as in its three-stage training, each of the transistors Ir ₂ , Tr ₁ and Tr ₆ placed, so that the

two of three transistors are conductive and only the transistor Tr ₆ that is switched on is reversed or switched on,

remaining last transistor is non-conductive. Because he was in a non-conductive state while

the known counter has an increased energy consumption - the transistors Tr ₂ and 7V _{4 are} not reversed,

need. since they are already in a conductive state.

Similar circuits in which two of the In this way the bistable multivibrator, the three transistors are conductive, are also made of the German 20 is formed by the transistors Tr ₅ and Tr ₆ , look around Auslegeschrift 1 218 517 and from the time controlled, so that a reversal of the transistor Tr ₅ Λ document "Funk-Technik", 1963, pp 877 to 880, known. takes place and at its collector a positive output ™. Finally, it appears from the German Auslegeschrift, which in turn knows the transistor Tr ₃ via the 1 290 188 a circuit which is fed to the energy diode D _{2 in} order to supply this in this way by turning on a negative and a positive 25 transistor. Since the transistor Tr _{3 is} dependent on the voltage source. "Off" has been switched to "on" appears

Based on this state of the art, a negative output is now at its collector,

the invention has the task of reducing the energy consumption, which is prevented by the diode D ₁

a three-stage counting chain. This to get to transistor 7V _1. In this way

The object is achieved according to the invention in that the circuit is 30 by supplying a trigger

the diodes each pulse between the base of the transistor from a first stable state in a

the first stage and the collector of the transistor switched to the second stable state and then

of the second stage, prepared between the base of the transistor, when the next trigger pulse arrives

the third stage and the collector of the transistor ses to assume a third stable state. To

the first stage and between the base of the transistor 35 the arrival of a further trigger pulse arrives

the second stage and the collector of the transistor circuit return to the first stable state,

the third stage are arranged and at the voltage. Thus, a tristable mode of operation is achieved,

divider provided partial voltage taps each via the circuit arrangement described above

connect a conductive transistor to ground. is disadvantageous in that it - due to the

Due to the diodes 40 used according to the invention, the fact that six transistors and a considerable and their connection between each the base of a borrowed number of other switching elements for the tristable Transistor and the output electrode of the two counting operation are required - realized. ^ stages preceding transistor it is achieved that there are further other circuit arrangements be f via the output electrode of the respective conductive transistors, in which three transistors are used to achieve the sistor, the base of the transistor next but one can be used for almost 45 three stable states. With these arrives at ground potential and the transistor becomes. Arrangements, however, are always two of the three transblocks remain. As a result, the transistor according to the invention is conductive, while only the remaining one Circuit two of the three transistors blocked, transistor blocked. This creates an increased and the energy requirement is correspondingly reduced. Energy requirements.

In the drawing, the invention is shown, for example, 50. The aim of the invention is to illustrate a namely shows simple tristable circuit arrangement too sharp.

F i g. 1 is a circuit diagram of a conventional three- In FIG. 2 is a tristable circuit arrangement stepped Counting chain, measured a first embodiment of the invention

F i g. 2 shows a circuit diagram of an illustrative according to the invention, in which NPN silicon transistors have three stages Counting chain, find 55 turns. First, let the circuit arrangement

F i g. 3 and 4 circuit diagrams of a second and third embodiment according to FIG. 2 described in detail. In this

Embodiment of the three-stage counting chain according to the figure denote the reference numerals 1, 2 and 3 NPN-

of the invention, silicon transistors that are cascaded with one another

F i g. 5 is a circuit diagram illustrating circuitry connected, and the reference numerals 7,

a three-stage counting chain according to a fourth output 60 8 and 9 each with relatively less diodes

embodiment of the invention, forward voltage (e.g. germanium diodes).

F i g. 6a to 6f waveforms for explaining the reference numerals 4, 5 and 6 each denote KoI-

Circuit arrangement according to FIG. 5 and lector resistors for transistors 1, 2 and 3 and

F i g. 7 shows a circuit diagram to illustrate the reference numerals 10, 11, 12, 13, 14 and 15 voltages of a three-stage counting chain according to a fifth divider resistance for the division of the collector chip guide form according to the invention. voltages of transistors 1, 2 and 3 and the supply

Conventionally, in order to achieve a tri-

stable function of a ring counter use disrupt the next stage. Here are the

connecting parts between the resistors 10 and 13, between the resistors 11 and 14 and between the resistors 12 and 15 are connected to the bases of the transistors 2, 3 and 1, respectively. The diodes 7, 8 and 9 are between the collector of transistor 3 and the base of transistor 2, between the collector of transistor 1 and the base of transistor 3 and between the collector of transistor 2 and the base of transistor 1 switched on, the cathodes with the collectors and the anodes with the bases are connected.

The mode of operation of the circuit arrangement described above is explained below. It is assumed that transistor 2 is in the "on" state. The collector voltage of transistor 2 is then equal to its collector saturation voltage (represented by VcE (SAT)) .This collector voltage is divided by resistors 11 and 14 and then applied to the base of transistor 3. If the divided voltage is lower than the base-emitter limit voltage (represented by Vbe (cüt)) of the transistor 3, then the latter remains non-conductive. In this case, the collector voltage of transistor 3 is equal to + E, reduced by the voltage drop across the collector resistor as a result of the current flowing through the voltage divider (resistors 16 'and 19), and at the junction between resistors 12 and 15 and consequently at the base of the Transistor 1 appears a positive potential. If this positive potential is higher than Vbe (CUT) , the transistor 1 tends to become conductive. In the circuit arrangement according to the invention, however, the junction between the resistors 12 and 15 is connected to the collector of the conductive transistor 2 via the diode 9, so that the latter becomes conductive and consequently the voltage at the junction between the resistors 12 and 15 is lowered. In this case, the voltage at this junction becomes equal to the sum of the collector saturation voltage VcE (SAT) and the forward voltage (represented by Vf) of diode 9. If the voltage is made lower than Vbe (cut) , transistor 1 becomes non-conductive. Thus, the collector voltage of the transistor 1 is equal to + E, and as a result, a positive potential appears at the junction between the resistors 10 and 13, so that the transistor remains conductive. At this point, the diode 7 remains non-conductive, since it has no influence on the mode of operation, due to the fact that its cathode is connected to the collector of the transistor 3, which is now in the non-conductive state. This also applies to diode 8.

In the manner described above, the first stable state is maintained. According to the invention, the resistors 4, 5 and 6 are chosen so that they have the same resistance value (R ₁ ) . This also applies to resistors 10, 11, 12 (R ₂ ) and resistors 13, 14, 15 (R ₃ ). By applying a positive pulse to the base of the transistor 3 or to the base inputs of all transistors by a suitable method, the transistor 3 is switched to the conductive state, so that the transistor 2 is switched off by a similar process. As a result, the circuit is caused to enter a second stable state. If a subsequent positive pulse is applied to the base of transistor 1, the latter becomes conductive, so that transistors 2 and 3 are switched to a non-conductive state by the similar operation. As a result, the circuit arrangement is caused to change into a third stable state. In this way it is possible to achieve the three stable states.

Using the symbols given above, the conditions for the aforesaid result tristable operation as follows:

R ₃ -E

R ₁ + R ₂ +

VbE (CUT) >

R ₃ VCE (SAT)

R ₂ + R ₃

+ Vf < Vbe (cüt) ■

In practice, the collector voltage Vce (sat) of the silicon transistor is around 0.2 V, the base-emitter limit voltage VcE (C UT) around 0.7 V and the forward voltage Vp of the germanium diode around 0.2 V. Thus By properly selecting the resistance values R ₁ , R ₂ and R _3, the above conditions can be satisfactorily achieved.

On the other hand, it is impossible to meet the above-mentioned conditions if germanium transistors whose collector saturation voltage VcE (SAT) is about 0.1 V and whose base-emitter cut-off voltage Vbe (cut) is about 0.2 V are used. Therefore, the tristable operation cannot be achieved. According to the invention, however, it is possible to achieve the tristable operation even using germanium transistors; Examples of the circuit arrangement are shown in FIGS. 3 and 4 illustrated.

F i g. 3 shows the case of using NPN germanium transistors and F i g. 4 the case of using NPN germanium transistors. The circuit arrangement is first shown below F i g. 3 described.

The components of FIG. 3 correspond to those of FIG. 1. Consequently, a description thereof is omitted. Reference numerals 16, 17 and 18 illustrate high forward voltage diodes (represented by Vfh) (e.g. silicon diodes) whose anodes are connected to the junction between voltage dividing resistors 12 and 15, that between resistors 10 and 13, and that between resistors 11 and 14 and the cathodes of which are each connected in series with the bases of the transistors 1, 2 and 3.

The conditions for the tristable operation of this circle are given by the following conditions:

Vbe (cut)

R ₃ VCE (SAT)

R ₁ + R ₂ + R ₃ R ₂ + R ₃

VcE (SAT) + Vf < Vbe (cut) + Vfh

These conditions can be met by using silicon diodes as diodes 16, 17 and 18 with a forward voltage of around 0.6V. If these conditions are not sufficient (for example in the case of germanium diodes, the forward voltage of which is around 0.2V then a plurality of diodes with

5 6

be connected in series. In this way the voltage of transistor 1 is switched off, The above conditions can be met. Consequently, the collector voltage of the transistor 1 Take into account. positive, and the transistor 2 thus remains conductive. In

The circuit arrangement according to FIG. 4, in practice the collector saturation voltage is the PNP germanium transistors are used, 5 transistors at about 0.2V, which is similar to the base-emitter boundary of those of FIG. 3, except that voltage is around 0.7V and the forward voltage the direction of the current flow in the former opposite to the germanium diode at about 0.2 V, as above set to the one in the latter is so that the described. In this way, the above Directions of connections between the diodes 7, operation set forth can be achieved. 8, 9 and 16, 17, 18 are reversed. In this way, if a trigger pulse is sent to terminal 31, as in it is possible to apply a tristable circuit arrangement shown in Fig. 6a, occurs at the passage Use of three germanium transistors connecting parts between the capacitor 29 and produce which, compared to a ring counter, the resistor 28 a through the resistors 28 is substantially simplified so that the manufacturing and 29 differentiated waveform as shown in FIG. 6 b costs as well as the number of production stages reduced 15 illustrated, on, and only positive impulses can be. (F i g. 6 c) get to the bases of the transistors 1,

A circuit arrangement is shown below using diodes 25, 26 and 27 and the concretions which is suitable, the frequency of one capacitor 22, 23 and 24. At this point, however output trigger pulse by a factor of 3 under transistor 1 in the »switched off« state of the circle according to FIG. 2 to share. 20 hold so that the junction between the F i g. Figure 5 shows an example of such a circle. Resistors 16 'and 19 share a positive potential the F i g. 5, which correspond to those of FIG. 1, and transistor 3 will also be out provided with analogous reference numerals, and a switched «state is held so that the connection description this part is omitted. An extension piece between the resistors 18 'and 21 input terminal 32 leads via a capacitor 30 25 has positive potential. The diodes 25 and 27 to the collector of transistor 1. With the base of the are accordingly non-conductive. Therefore will Transistor 2 is the cathode of a diode 25 across the pulse prevented from going to the bases of the Traneins Capacitor 22 connected. The connection transistors 1 and 2 must be crossed. On the other hand is located put the transistor 2 between the diode 25 and the capacitor 22 in the "switched on" state, is connected to the collector of transistor 1 via a 30 so that the potential at the junction between Resistor 16 'and also with a ground terminal across resistors 12 and 15 as well as 17' and 20 practically none Resistor 19 connected. Corresponding network table is zero and the momentum is the base of the door components are also with respect to the bases of the transistor 3 via the diode 26 and the capacitor 23 transistors 3 and 1 using the diodes 26 is supplied. In this way, the transistor 3 27, the capacitors 23, 24 and the resistors 35 conductive by applying a pulse to his 17 ', 20, 18', 21 are provided. The anodes of the pre-base, while the transistors 1 and 2, to which no mentioned diodes 25, 26 and 27 are put together impulse, their previous conductivity state connected and maintained at the trigger input terminal. Since the transistor 3 is now conducting, it drops connected via a differential circuit, which is reduced to earth potential by its collector potential, and that a resistor 28 and a capacitor 29 are 40 base potential of the transistor 2 because of the forms is. Diode 7 also equal to the earth potential, whereby

The operation of this circuit, the transistor 2 will be blocked. Now only transistor is 3 described. conductive, while transistors 1 and 2 are blocked

It is assumed that the transistor 2 is in. If another pulse is applied on (during a 45 (period T ₂ in Fig. 6), it becomes on a crossing period T _{1 of} Fig. 6). The collector voltage to the transistors 2 and 3 prevented, since the diodes of the transistor 2 will then be equal to the collector 25 and 26 are non-conductive; however, it becomes the same as its saturation voltage. This voltage is fed to transistor 1 via diodes 27 in order to be divided by resistors 11 and 14 and then to become conductive at transistor 1, so that the base of transistor 3 is placed. If the divided 50 stable state is maintained (period T ₃ voltage applied to the transistor 3, but in Fig. 6). This relationship is illustrated in Figures 6d, which is lower than the base-emitter limit voltage 6e and 6f.

of the same, then the transistor remains non-conductive, as can be seen from the above explanation

so that its collector voltage is equal to that of the transistor to be made conductive with each clamping E reduced by the voltage drop at the point where a triggering pulse occurs. Collector resistance as a result of the current flowing across the voltage. Thus, the increase in the collector voltage of the transistor 1 with the junction between the resistors 12 and 15 takes on a frequency which is a third of that of the high potential, so that the transistor 1 tends to be switched on corresponding to the input trigger pulse. Since the connection 60 F i g. 5 shows the case of using NPN point between resistors 12 and 15 with the silicon transistors. The present circuit collector of the conductive transistor 2 via the diode 9 arrangement can also be connected by using PNP, the latter, however, in this case silicon transistors are realized, if only conductive, so that the voltage at the junction is the sum of the The collector saturation voltage of the transistor between resistors 12 and 15 is equal to the sum 65 and the forward voltage of the diode, the collector saturation voltage and the forward voltage is lower than the base-emitter limit voltage of the voltage of the diode 9. If this is a sum transistor. In this case, of course, the voltage is lower than the base-emitter critical voltage directions of the applied DC voltage and the

Connections of diodes 7, 8, 9, 25, 26 and 27 reversed.

In the case of the use of germanium transistors there is no possibility that the sum the collector saturation voltage of the transistor and the forward voltage of the diode lower than that Base-emitter limit voltage of the transistor is, as it is common, that the collector saturation voltage of the germanium transistor at about 0.1 V and the base-emitter limit voltage of the same at about 0.2 lies. Thus, it is generally impossible to achieve a circuit capable of frequency to be divided by a factor of 3. By connecting a number of diodes, such as B. silicon diodes 33, However, it is 34 and 25 with high forward voltage with the bases of transistors 1, 2 and 3, respectively possible to achieve the process of frequency division by a factor of 3.

According to the invention, therefore, either silicon transistors or germanium transistors for a circle that allows a frequency division by a factor of 3 can be used. The invention is advantageous in that it allows the use of germanium transistors. Furthermore, the Circuit arrangement according to the invention is associated with a substantial simplification as it is composed of only three transistors and nine diodes; and although there is still no time constant circle is provided, the frequency dividing operation can be stabilized.

Claims (7)

Patent claims: 1. Circuit arrangement for an electronic ring counter, especially one with three Counting stages, each counting stage consisting of a transistor and a diode and at least per stage contains a voltage divider between the collector of the respective transistor of the counting stage and earth and to the common counting pulse line as well as to the base of the next Transistor is connected, characterized in that the diodes (7, 8, 9) each between the base of the transistor (1) of the first stage and the collector of the transistor (2) the second stage, between the base of the transistor (3) of the third stage and the collector of the transistor (1) of the first stage and between the base of the transistor (2) of the second stage and the collector of the transistor (3) of the third stage and the partial voltage taps are arranged Connect the voltage divider to ground via a conductive transistor. 2. Circuit arrangement according to claim 1, characterized in that the base-emitter limit voltage by connecting a diode (16, 17, 18) in series with the base of each transistor (1, 2, 3) is noticeably increased (Fig. 3). 3. Circuit arrangement according to claim 1, characterized by the use of silicon transistors and connecting the output electrode of each preceding transistor (1, 2, 3) to the base of each subsequent transistor Via resistance elements (10, 11, 12) and grounding the base of each subsequent transistor via resistance elements (13, 14, 15 in FIG. 2). 4. Circuit arrangement according to claim 1, characterized by the use of germanium transistors as well as connection of the output electrode of each preceding transistor (1,2, 3) with the base of each subsequent transistor via a series connection of a resistor (10, 11, 12) and a diode (17, 18, 19) as well as earthing the connection point between this resistor and this diode via a resistor (13, 14, 15 in Fig. 4). 5. Circuit arrangement according to claim 1, characterized in that in addition three voltage dividers (16 ', 19, 17', 20, 18 ', 21) between the output electrodes of the respective transistors (1, 2, 3) and the subsequent transistors are provided that the partial voltage tap each this additional voltage divider is connected to the base of each subsequent transistor, that a terminal of diodes (25, 26, 27) is connected to each of the three partial voltage taps is whose other terminals are interconnected, and that the connection is a through Differentiating a readout pulse obtained signal is supplied (Fig. 5). 6. Circuit arrangement according to claim 5, characterized by the use of silicon transistors and connecting the output electrode of each transistor (1, 2, 3) to the base each subsequent transistor via a series connection of a resistor (16 ', 17', 18 ') and a capacitor (22, 23, 24), the junction between the resistor and the Capacitor grounded via a resistor (19, 20, 21) and also to one terminal of the respective diode (25, 26,27) is connected (Fig. 5, Fig. 7). 7. Circuit arrangement according to claim 5, characterized in that the partial voltage tap each of the additional three voltage dividers (16 ', 19; 17', 20; 18 ', 21) with the base of each subsequent transistor via a capacitor (22, 23, 24) is connected (Fig. 5, 7). For this purpose 2 sheets of drawings 009540/327