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DE1665852A1 - Process for the production of curved electrical circuit boards - Google Patents

Process for the production of curved electrical circuit boards

Info

Publication number
DE1665852A1
DE1665852A1 DE19671665852 DE1665852A DE1665852A1 DE 1665852 A1 DE1665852 A1 DE 1665852A1 DE 19671665852 DE19671665852 DE 19671665852 DE 1665852 A DE1665852 A DE 1665852A DE 1665852 A1 DE1665852 A1 DE 1665852A1
Authority
DE
Germany
Prior art keywords
base material
circuit boards
production
foils
radiation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19671665852
Other languages
German (de)
Inventor
Von Have Dipl-Ing Dipl-Ch Rolf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of DE1665852A1 publication Critical patent/DE1665852A1/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0014—Shaping of the substrate, e.g. by moulding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09018—Rigid curved substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/09—Treatments involving charged particles
    • H05K2203/095—Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1105—Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
    • H05K2203/302—Bending a rigid substrate; Breaking rigid substrates by bending
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Laminated Bodies (AREA)

Description

Verfahren zur Herstellung gekrümmter elektrischer Leiterplatten - - - - - - - - - - - --- - - - - - - - - - - - - - - - Die Erfindung betrifft ein Verfahren zur Herstellung elektrisch hochwertiger gekrümmter Leiterplatten. Bei der Kon-2truktion elektrischer Geräte, insbesondere auf dem Gebiet des feitverkehro, der Datontechnik, der Raumfahrt u.dgl. besteht häufig die Iiotwendigkeit, geätzte oder gedruckte r Schaltungen nicht in der Form von planen Platten oder biegsamen Po ien, sondern in einer irgendwie gearteten: dreideminsional geformten Gestalt zu verwenden. Dabei sollen die ,Leiterplatten nach der Verfornung die gewünschte Gestalt beibehalten. Es ist bereits ein kupferkaschiertes Halbzeug bekannt, das aus einem elektrisch hochwertigen Basismaterial, im allgemeinen aus strahlungsvernetztem rolyäthylen, besteht. Auf dieses Basismaterial ist ein- oder zweiseitig Kupferfolie oder Aluminiumfolie aufkaschiert. Die Herstellung einer-gekrUrmten Leiterplatte erfolgt dadurch, daß zunächst an der ebenen Platte die Leiterbahnen erzeugt und danach die Verformung vorgenornen wird. Die Verformung erfolgt durch Druck, da das strahlungsvernetzte I'aterial vorwiegend duroplastische Eigenschaften besitzt. Hierbei ist, wie sich gezeigt hat, die Haftfestigkeit der Metallfolien auf dem Basismaterial nicht ausreichend. Dies führt zu einer hohen Au.-schußquote und stellt einen erheblichen Nachteil dieses Verfahrens dar.-Das durch die Erfindung vorgeschlagene Verfahren vermeidet diesen Nachteil dadurch, daß ein durch Strahlung vernetzbares, thermoplastisches Basi--material benutzt wird, und däß erfindungsgemäß die ebenen, mit I.:etallfolien kaschierten Platten oder Folien zur rrzeugung der Leiterbahnen geätzt, mit oder ohne Erwärmung in den Erweichungsbereich der Etalyolefine in eine Form gepreßt und durch Strahlungsvernetzung fixiert werden. Es hat sich gezeigt, daß sich die Verformung der Leiterfolien aus einem thermoplastischen I'aterial wesentlich einfacher ohne Beschädigung der leiterbahnen vornehmen ldßt. Vor allem sind keine so hohen Drücke notiyendig, wie bei einer Verformung im duroplastischen Zustand. Das thermoplastische Basismaterial wird durch eine die Einwirkung energiereichen Strahlung zum duroplastischen Zustand vernetzt. Dadurch wird die Porm, die e; beim Vernetzen hatte, fixiert. Durch die Strahlungsvernetzung des Basismaterials vor darr Kaschieren wird eine OberflC-:chenbeschaffenheit erreicht, die das Haften der Metallfolie begünstigt. Da bei der. Verfahren nach der Erfindung die Vernetzung erst erfolgt, wenn die Leiterfolie -in eine gekrümimte Form gebracht ist, entfällt dieser Effekt beim Verfahren nach der Erfindung. Diesem Ilachteil@wird dadurch Abhilfe geschaffen, daß eine zumindest gleich gute Haftfühigkeit an der Oberfläche des Basismaterial dadurch erzeugt wird, daß das Basisnaterial vor dem Kaschieren einem :,;iederdruckbegligrmungsprozeß oder einer Elektronenbestrahlung niedriger Eosis unterzogen wird. Der Niederdruckbeglimmungsprozeß besteht darin, daß das Basismaterial bei erniedrigtem Luftdruck, beispielsweise bei etvia 0,5 Torr, zwischen Plattenelektroden eingebracht wird, an denen eine Spannung von etwa 200 bis 400 Volt liegt. Das Plasma der Glimmentladung zwischen den Elektrodenplatten schmiegt sich an die Form des zwischen die Plätten gebrachten Gegenstandes vollständig an.Process for the production of curved electrical circuit boards - - - - - - - - - - --- - - - - - - - - - - - - - - - The invention relates to a process for the production of electrically high quality curved circuit boards. In the construction of electrical devices, in particular in the field of retail, data technology, space travel and the like, there is often the need for etched or printed circuits not in the form of flat plates or flexible polygons, but in some way kind: to use three-dimensional shape. The circuit boards should retain the desired shape after deformation. A copper-clad semi-finished product is already known which consists of an electrically high-quality base material, generally made of radiation-crosslinked rolyethylene. Copper foil or aluminum foil is laminated onto this base material on one or both sides. A curved printed circuit board is produced by first creating the conductor tracks on the flat plate and then preforming the deformation. The deformation takes place through pressure, since the radiation-crosslinked material has predominantly thermosetting properties. Here, as has been shown, the adhesive strength of the metal foils on the base material is insufficient. This leads to a high shot rate and represents a considerable disadvantage of this method. The method proposed by the invention avoids this disadvantage in that a thermoplastic base material that can be crosslinked by radiation is used, and that according to the invention the planar, Plates or foils laminated with metal foils are etched to produce the conductor tracks, pressed into a mold with or without heating in the softening area of the etalyolefins and fixed by radiation crosslinking. It has been shown that the deformation of the conductor foils made of a thermoplastic material can be carried out much more easily without damaging the conductor tracks. Above all, such high pressures are not necessary as in the case of deformation in the thermoset state. The thermoplastic base material is cross-linked to the thermoset state by exposure to high-energy radiation. This will make the porm that e; had fixed when networking. The radiation cross-linking of the base material before lamination achieves a surface quality that promotes the adhesion of the metal foil. Since the. Method according to the invention, the crosslinking only takes place when the conductor foil has been brought into a curved shape, this effect is eliminated in the method according to the invention. This disadvantage is remedied in that an at least equally good adhesion to the surface of the base material is produced by subjecting the base material to a low-pressure gluing process or a low-dose electron irradiation before lamination. The low-pressure glow process consists in that the base material is introduced between plate electrodes at a reduced air pressure, for example at about 0.5 Torr, to which a voltage of about 200 to 400 volts is applied. The plasma of the glow discharge between the electrode plates hugs the shape of the object placed between the plates.

Claims (1)

P a t e n t a n s p r ü c h e 1. Verfahren zur Herstellung elektrisch hochwertiger gekrümmter-Beiterplatten oder Leiterfolien aus einem Basismaterial, ausstrahlungsvernetzten Polyolefinen, d' a d u r o h g e. k e n n z e .i c h n e t, daß die ebenen mit Metallfolien kaschierten Plätten oder Folien zur Erzeugung der Leiterbahnen geätzt, mit oder ohne Erwärmung in den Erweichungsbereich der Polyolefine in eine Form gepreßt und durch Strahlungsvernetzung fixiert tverden. ?. Verfahren nach Anspruch-1, d a d u- r c h g e k e nnz e i c h n e t, daß das Basismaterial einer, Niederdruckbeglimmungsprozeß oder einer Elektronenbestrahlung niedriger Dosis unterzogen und mit durch leichtes Anoxydieren vorbehandelten Netallfolien unter Erwärmung kaschiert wird. -P a t e n t a n s p r ü c h e 1. Method of manufacturing electrical high-quality curved printed circuit boards or conductor foils made from a base material, radiation-crosslinked polyolefins, d 'a d u r o h g e. k e n n n z e. i c h n e t that the flat plates or foils laminated with metal foils for the production of the conductor tracks etched, with or without heating in the softening area of the polyolefins pressed into a mold and fixed by radiation crosslinking. ?. procedure according to claim 1, that the base material a low pressure glow process or a low dose electron irradiation subjected and underneath with metal foils pretreated by light anoxidation Warming is concealed. -
DE19671665852 1967-01-20 1967-01-20 Process for the production of curved electrical circuit boards Pending DE1665852A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DES0107925 1967-01-20

Publications (1)

Publication Number Publication Date
DE1665852A1 true DE1665852A1 (en) 1971-01-28

Family

ID=7528458

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19671665852 Pending DE1665852A1 (en) 1967-01-20 1967-01-20 Process for the production of curved electrical circuit boards

Country Status (1)

Country Link
DE (1) DE1665852A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2543780A1 (en) * 1983-03-31 1984-10-05 Rogers Corp FLEXIBLE ELECTRIC CIRCUIT PRESERVING ITS SHAPE AND METHOD OF MANUFACTURING THE CIRCUIT
FR2665324A1 (en) * 1990-07-27 1992-01-31 Thomson Csf Method of manufacturing a printed circuit and circuit obtained by this method
DE10207589A1 (en) * 2002-02-22 2003-10-16 Leoni Ag Method for producing a conductor track on a carrier component and carrier component
DE102007006162B3 (en) * 2007-02-07 2008-06-19 Siemens Ag Method for producing a three-dimensional circuit carrier

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2543780A1 (en) * 1983-03-31 1984-10-05 Rogers Corp FLEXIBLE ELECTRIC CIRCUIT PRESERVING ITS SHAPE AND METHOD OF MANUFACTURING THE CIRCUIT
DE3411973A1 (en) * 1983-03-31 1984-10-11 Rogers Corp., Rogers, Conn. PLATE MATERIAL FOR PRODUCING FLEXIBLE PRINTED CIRCUIT BOARDS, METHOD FOR PRODUCING FLEXIBLE PRINTED CIRCUIT BOARDS AND FLEXIBLE PRINTED CIRCUIT BOARD PRODUCED BY THIS PROCESS
FR2665324A1 (en) * 1990-07-27 1992-01-31 Thomson Csf Method of manufacturing a printed circuit and circuit obtained by this method
DE10207589A1 (en) * 2002-02-22 2003-10-16 Leoni Ag Method for producing a conductor track on a carrier component and carrier component
DE102007006162B3 (en) * 2007-02-07 2008-06-19 Siemens Ag Method for producing a three-dimensional circuit carrier

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