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DE10393102D2 - Einrichtung und Verfahren zur Analyse von eingebetteten Systemen - Google Patents

Einrichtung und Verfahren zur Analyse von eingebetteten Systemen

Info

Publication number
DE10393102D2
DE10393102D2 DE10393102T DE10393102T DE10393102D2 DE 10393102 D2 DE10393102 D2 DE 10393102D2 DE 10393102 T DE10393102 T DE 10393102T DE 10393102 T DE10393102 T DE 10393102T DE 10393102 D2 DE10393102 D2 DE 10393102D2
Authority
DE
Germany
Prior art keywords
embedded systems
analyzing embedded
analyzing
systems
embedded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE10393102T
Other languages
English (en)
Inventor
Adrian Traskov
Andreas Kirschbaum
Thorsten Ehrenberg
Tasso Kirsch
Burkart Voss
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Continental Teves AG and Co OHG
Original Assignee
Continental Teves AG and Co OHG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Continental Teves AG and Co OHG filed Critical Continental Teves AG and Co OHG
Application granted granted Critical
Publication of DE10393102D2 publication Critical patent/DE10393102D2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/348—Circuit details, i.e. tracer hardware
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
DE10393102T 2002-11-22 2003-11-12 Einrichtung und Verfahren zur Analyse von eingebetteten Systemen Expired - Lifetime DE10393102D2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10254788 2002-11-22
PCT/EP2003/012630 WO2004049159A2 (de) 2002-11-22 2003-11-12 Einrichtung und verfahren zur analyse von eingebetteten systemen

Publications (1)

Publication Number Publication Date
DE10393102D2 true DE10393102D2 (de) 2005-07-21

Family

ID=32335768

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10393102T Expired - Lifetime DE10393102D2 (de) 2002-11-22 2003-11-12 Einrichtung und Verfahren zur Analyse von eingebetteten Systemen

Country Status (5)

Country Link
US (1) US20060150021A1 (de)
EP (1) EP1565825A2 (de)
JP (1) JP2006507586A (de)
DE (1) DE10393102D2 (de)
WO (1) WO2004049159A2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005055229A1 (de) * 2004-11-26 2006-06-08 Continental Teves Ag & Co. Ohg Festverdrahteter elektronischer Digitalschaltkreis
DE102005020899A1 (de) * 2005-05-04 2006-11-16 Siemens Ag Verfahren und Vorrichtung zur Messung der Testabdeckung bei Multithreading-Programmen
US7725922B2 (en) * 2006-03-21 2010-05-25 Novell, Inc. System and method for using sandboxes in a managed shell
EP2027514A2 (de) 2006-05-22 2009-02-25 Ideal Aerosmith Inc. Simulationssystem mit bewegungsteuerung
US7702400B2 (en) 2006-05-22 2010-04-20 Ideal Aerosmith, Inc. Motion controllers and simulation systems including motion controllers
US7743414B2 (en) * 2006-05-26 2010-06-22 Novell, Inc. System and method for executing a permissions recorder analyzer
US7805707B2 (en) * 2006-07-21 2010-09-28 Novell, Inc. System and method for preparing runtime checks
US7739735B2 (en) * 2006-07-26 2010-06-15 Novell, Inc. System and method for dynamic optimizations using security assertions
US7856654B2 (en) * 2006-08-11 2010-12-21 Novell, Inc. System and method for network permissions evaluation
US7823186B2 (en) * 2006-08-24 2010-10-26 Novell, Inc. System and method for applying security policies on multiple assembly caches
US20080056139A1 (en) * 2006-09-06 2008-03-06 Mentor Graphics Corporation Network traffic monitoring using embedded target-side analyzer during embedded software development
JP4856023B2 (ja) * 2007-08-08 2012-01-18 パナソニック株式会社 リアルタイムウォッチ装置及びその方法
JP2010538338A (ja) * 2007-08-31 2010-12-09 エアバス オペラシオン シミュレーション・システムからの命令と診断モジュールからの命令を実行できる電子機器ボードと、それに関連するシミュレーション方法
TWI388979B (zh) * 2009-09-18 2013-03-11 Asustek Comp Inc 電腦系統及監控裝置
DE102011007437A1 (de) 2010-11-15 2012-05-16 Continental Teves Ag & Co. Ohg Verfahren und Schaltungsanrodnung zur Datenübertragung zwischen Prozessorbausteinen
CN104090833B (zh) * 2014-06-20 2016-10-05 英业达科技有限公司 服务器及其讯号解析装置
US10379512B2 (en) 2014-12-05 2019-08-13 Honeywell International Inc. Monitoring and control system using cloud services
CN107102921B (zh) * 2017-03-23 2020-05-12 北京航天自动控制研究所 一种面向带I/O型数字量异步端口SoC的数字量监测方法
CN119621521B (zh) * 2025-02-17 2025-07-18 北谷电子股份有限公司 用于嵌入式系统的数据存储分析装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5771240A (en) * 1996-11-14 1998-06-23 Hewlett-Packard Company Test systems for obtaining a sample-on-the-fly event trace for an integrated circuit with an integrated debug trigger apparatus and an external pulse pin
US6142683A (en) * 1997-04-08 2000-11-07 Advanced Micro Devices, Inc. Debug interface including data steering between a processor, an input/output port, and a trace logic
US6769076B1 (en) * 2000-02-07 2004-07-27 Freescale Semiconductor, Inc. Real-time processor debug system
US6732311B1 (en) * 2000-05-04 2004-05-04 Agere Systems Inc. On-chip debugger
US6748558B1 (en) * 2000-05-10 2004-06-08 Motorola, Inc. Performance monitor system and method suitable for use in an integrated circuit
JP2002163127A (ja) * 2000-11-27 2002-06-07 Mitsubishi Electric Corp トレース制御回路
DE10119265A1 (de) * 2001-04-20 2002-10-31 Infineon Technologies Ag Programmgesteuerte Einheit
US6834360B2 (en) * 2001-11-16 2004-12-21 International Business Machines Corporation On-chip logic analyzer

Also Published As

Publication number Publication date
JP2006507586A (ja) 2006-03-02
WO2004049159A3 (de) 2005-05-19
US20060150021A1 (en) 2006-07-06
WO2004049159A2 (de) 2004-06-10
EP1565825A2 (de) 2005-08-24

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