DE1079359B - Arrangement consisting of electronic switching means for forming the inversion of the exclusive or condition - Google Patents

Description

GERMAN

The invention relates to an arrangement for formation consisting of electronic switching means the inversion of the exclusive or condition, also called the identity condition.

In calculating machines, the problem often arises of comparing two binary coded characters with one another and to initiate some process if both signs are identical. An example is the address selection at called a magnetic drum.

Each binary coded character consists of- «elements, each of which can only have the value» 1 «or» 0 «. So there is the character A z. B. from the elements a _v a ₂ ... to a _n . You have two signs

A = (a _v a ₂ B = (b _v b _%

K),

which are compared with one another, they are only identical if

for all k = 1.2. .. n; so only if all elements of the two characters with the same index are identical.

The two characters are not identical if as

for at least one k; if even two elements with the same index are not identical.

In the notation of Boolean algebra, the function g _k for the identity of two elements is represented as follows:

Sk = [(act> k) v (äkh)]

The function f _k for the inequality of two elements is represented as follows:

Furthermore is

fk = [(β * »& *) (β * w 6 *)]

fk = Sk-

40

In order to compare two elements a _k and b _k , a network made up of AND circuits, OR circuits and inverter circuits is therefore required, as the above equations show. A known network of this type is shown in FIG.

There is an input for each element a _k and b _k. On the one hand, the inputs are led directly to a first AND circuit, at whose output the function a _k · b _k is obtained, and on the other hand, via an inverter circuit each, to a second AND circuit, at whose output the function & _k -F _k receives. The outputs of the two AND circuits lead to an OR circuit, on whose

existing arrangement for education

the inversion of the exclusive

Or condition

Applicant:

Standard electrical system Lorenz

Corporation,

Stuttgart-Zuffenhaus en,

Hellmuth-Hirth-Str. 42

Dipl.-Phys. Jürgen Lösch, Stuttgart,
has been named as the inventor

Output one the function

Sk = (flk-bk) ν (flk-bk)
receives.

The invention is now based on the object of reducing the quite considerable effort in this network. For this purpose, the circuit, the output of which is marked only if both inputs ^ and b _k are marked simultaneously or if both inputs are not marked at the same time, i.e. if a _{k is} identical to b _k , is replaced by one consisting of electronic switching means Arrangement for forming the identity condition, which is characterized according to the invention in that each of the two inputs is connected to the emitter of an associated transistor and is connected to a first fixed potential via an input resistor and to a second fixed potential via a voltage divider, that the taps of the voltage divider are each connected to the base of the transistor of the other input, and that the collectors of the transistors are connected to a third fixed potential via a common output resistor at which the output signal is picked up.

It is advisable to select the marking potential at the input as large as the third fixed potential.

The invention is explained in more detail with reference to FIGS. 2 to 4, for example. It shows

2 shows a circuit arrangement according to the invention,

3 shows a symbolic representation of the circuit for forming the identity condition,

90 * 769/272

4 shows the use of the identity circuit in a comparison circuit.

In the circuit arrangement according to the invention, the input a _{k is} connected to the emitter of a transistor T ₁ , and the input b _{k is} connected to the emitter of a transistor T ₂ . Further, the input is a _k via the resistor _R1 to earth potential, via the voltage divider R _1, R ₆ to a fixed potential U _B2. Likewise, the input b _{k is} connected to ground potential via a resistor R ₂ and to the potential U _B2 via the voltage divider R ₃ , R ₅ . The tap of the voltage divider R ₃ , R ₅ is connected to the base of the transistor T ₁ , the tap of the voltage divider .R ₄ , R _{6 is} connected to the base of the transistor T ₂ . The collectors of the two transistors T ₁ and T ₂ are connected to the fixed potential U _Bl via the common resistor R ₁ . The output signal is picked up at this common resistor R _1. With pnp transistors U _{Bl is} negative, U _B2 positive, with npn transistors U _{Bl is} positive, U _B2 negative.

A distinction must be made between three cases in the functional description of the circuit arrangement:

1. a _k and b _k are not marked.

2. a _k and b _k are marked.

3. a _k is marked, b _k is not marked or b _k is marked, a _{k is} not marked.

The input potential for marking = U _{B v} for non-marking = earth potential.
1. a _k = b _k = OVoIt.

The transistors T ₁ and T ₂ have a high resistance, since they are connected to the base electrodes via R ₃ , R ₅ and i? ₄ , R ₆ reverse voltage is applied. Only the small residual current of the transistors flows through R _1. Almost the voltage U _Bl is therefore available at the output c _k; the output c _k is thus marked.

if R ^ R ₆ -U _Bi '-U _{B2 is} chosen. A current therefore flows from the input b _k via T ₂ and R ₁ to U _Bl ; this results in a voltage close to zero at the output c _k. The output c _k is therefore ■ not marked.

The situation is analogous if b _k = U _Bl and a _k = 0. For this case in the above description only a _k with b _k , R ₃ with i? ₄ , R ₅ with R ₆ and T ₁ with T ₂ to be exchanged.

The resistors R ₁ and R ₂ can from case to case also be formed by the circuits provided at the inputs a _k and b _k , just as the resistor R ₁ can be formed by the input resistance of the subsequent circuit.

Fig. 3 shows a symbolic representation of the identity circuit described. At the exit of this Identity switching is therefore immediately given the function.

In this case, too, there is reverse voltage at the base electrodes. But not even a residual current flows because there is practically no voltage gradient between the emitter and the collector. The ^{voltage 1} U _{B t} is again available at the output c _k , so it is also marked in this case. 3. a _k = U _Bl , b _k = 0.

The transistor T ₁ is blocked, since its emitter is at collector potential, but is applied to the base via R ₃ , R ₅ blocking voltage. The emitter of the transistor T ₂ is at ground potential. The transistor T ₂ has a low resistance, since its base is connected via i? ₄ forward voltage is applied. The reverse voltage U _B2 applied across R ₆ cannot change

d. H. the output is only marked if the elements with the same index are identical.

In Fig. 4 a circuit arrangement is shown which forms an identity circuit for a complete character. The outputs of the identity circuits assigned to the individual indices k are combined in the w-fold AND circuit - so the function is obtained at the output of this AND circuit

= [0, bj) ν (ä, F ₁ )] [O ₂ b ₂ ) ν O ₂ F ₂ )] [O ₃ ..-)] ...

Claims (1)

Claim: Arrangement consisting of electronic switching means for forming the identity condition characterized in that each of the two inputs (a _k ; b _k ) is connected to the emitter of an associated transistor (T ₁ ; T ₂₎ and via an input resistor (R ₁ ; R ₂ ) to a first fixed potential, via a voltage divider ( R ₃ , R ₅ ; R ₁ , R ₆ ) is at a second fixed potential, that the taps of the voltage divider are each connected to the base of the transistor of the other input, and that the collectors are connected via a common output resistor (R ₁ ) from which the output signal is taken, lie at a third fixed potential. 1 sheet of drawings © 909 769/272 3.60