CN201212905Y - test circuit board - Google Patents
test circuit board Download PDFInfo
- Publication number
- CN201212905Y CN201212905Y CNU2008201108899U CN200820110889U CN201212905Y CN 201212905 Y CN201212905 Y CN 201212905Y CN U2008201108899 U CNU2008201108899 U CN U2008201108899U CN 200820110889 U CN200820110889 U CN 200820110889U CN 201212905 Y CN201212905 Y CN 201212905Y
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- circuit board
- tested
- test
- testing circuit
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- 238000012360 testing method Methods 0.000 title claims abstract description 107
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 230000005540 biological transmission Effects 0.000 claims abstract description 23
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 238000013142 basic testing Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000004353 relayed correlation spectroscopy Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
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Abstract
本实用新型揭露一种测试电路板，用来置放至少一待测试元件，并用以传递一测试机所产生的多个测试信号以对待测试元件进行测试。测试电路板包括一电路基板、多个转接槽、多个连接槽以及多条传输线。该多个转接槽、多个连接槽以及多条传输线设置于电路基板上。其中，该些传输线采用一预定方式设置于该电路基板上。本实用新型所述的测试电路板，能够避免人工连接错误的状况发生，可以有效的节省测试所需的时间，进一步提升测试效率。
The utility model discloses a test circuit board, which is used to place at least one component to be tested, and is used to transmit multiple test signals generated by a test machine to test the component to be tested. The test circuit board includes a circuit substrate, multiple adapter slots, multiple connection slots and multiple transmission lines. The multiple adapter slots, multiple connection slots and multiple transmission lines are arranged on the circuit substrate. Among them, the transmission lines are arranged on the circuit substrate in a predetermined manner. The test circuit board described in the utility model can avoid the occurrence of manual connection errors, can effectively save the time required for testing, and further improve the test efficiency.
Description
Technical field
The utility model is relevant to testing circuit board, refers to a kind of testing circuit board that integrated circuit is tested of being used for especially.
Background technology
In order to ensure integrated circuit (integrated circuit, IC) quality during shipment, after finishing manufacture process, generally all can carry out test to each IC, manufacturer can be according to the result who IC is carried out test, decide this IC whether qualified, and judge whether this IC to be supplied to the manufacturer in downstream according to this.
See also Fig. 1, Figure 1 shows that known technology is used for carrying out the test structure synoptic diagram of IC volume production test.In this test structure, utilize test machine (tester) 10 to be used as testing element to be tested (Device Under Test, DUT) 22 instrument.Wherein, element 22 to be tested can be an integrated circuit (IC) to be measured, and for convenient test, element 22 to be tested is arranged on the element circuitry plate to be tested (DUTboard) 20 usually.
See also Fig. 2, Figure 2 shows that the synoptic diagram of the testing circuit board of known technology.As Fig. 1 and shown in Figure 2, usually, test machine 10 is when testing, usually the exclusive element circuitry plate 20 to be tested of all arranging in pairs or groups is tested, and according to different elements to be tested 22, circuit on its corresponding element circuitry plate 20 to be tested is also different, generally include some basic test connection end points 24 on the element circuitry plate 20 to be tested and test, for example: power end (DPS), relay control end (RELAY CONTROL), tunnel ends (CHANNEL), CBIT end, general-purpose hole or the like in order to treat testing element 22.Yet, above-mentioned test connection end point 24 all be in disorder intersperse among element circuitry plate 20 to be tested around, therefore making element circuitry plate 20 to be tested is quite to bother, and in the process of making, might be because the tester carries out artificial wiring with connecting line 28 incorrect links of complexity, can cause the tester must waste the extra time in such cases and carry out debug, not only expend time in and labor intensive.
Therefore, be necessary to propose a kind of testing circuit board that does not need complicated wiring really, can save the inconvenience that artificial wiring brings, more can avoid the situation of connecting line incorrect link is taken place, to solve the problem that known technology was faced.
The utility model content
Therefore, one of the purpose of this utility model is to provide a kind of convenience of chip testing and testing circuit board of accuracy of promoting, to solve the problem that known technology was faced.
Embodiment of the present utility model discloses a kind of testing circuit board, is used for putting the element at least one to be tested that comprises a plurality of pin position, and transmits a plurality of test signals that a test machine produced so that this at least one element to be tested is tested.This testing circuit board comprises a circuit substrate, a plurality of switching groove, a plurality of link slot and plurality of transmission lines.A plurality of switching grooves are arranged on this circuit substrate, and described a plurality of switching grooves are respectively coupled to this test machine.A plurality of link slots are arranged on this circuit substrate, described a plurality of link slot is respectively coupled between the included a plurality of pin position of this at least one element to be tested and this a plurality of switching grooves, in order to providing these a plurality of test signals to this at least one element to be tested, and receive these at least one these a plurality of test signals of element basis to be tested a plurality of output signals of corresponding generation.Plurality of transmission lines is coupled between these a plurality of switching grooves and this a plurality of link slots, and in order to these a plurality of test signals of transmission and this a plurality of output signals, wherein this plurality of transmission lines utilizes a predetermined way to be arranged on this circuit substrate.
Testing circuit board described in the utility model, this predetermined way refer to the mode of this plurality of transmission lines with P.e.c. is arranged on this circuit substrate.
Testing circuit board described in the utility model, the material of this plurality of transmission lines are copper.
Testing circuit board described in the utility model, this circuit substrate are a printed circuit board (PCB).
Testing circuit board described in the utility model, this at least one element to be tested be integrated circuit (Integrated Circuit, IC).
Testing circuit board described in the utility model, these a plurality of link slots comprise a power supply slot, in order to provide this at least one element to be tested required power supply.
Testing circuit board described in the utility model, these a plurality of switching grooves are coupled to this test machine by many switching interfaces, and these many switching interfaces are in order to transmit these a plurality of test signals and this a plurality of output signals.
Testing circuit board described in the utility model, each bar switching interface is respectively a bus in these many switching interfaces.
Testing circuit board described in the utility model, this test machine be VTT V7100 series test machine one of them.
Testing circuit board described in the utility model, this testing circuit board are applicable to the test machine of this VTT V7100 series.
Testing circuit board described in the utility model can avoid the situation of artificial connection error to take place, and can effectively save the required time of test, further promotes testing efficiency.
Description of drawings
Fig. 1 is used for carrying out the test structure synoptic diagram of IC volume production test for known technology.
Figure 2 shows that the synoptic diagram of the testing circuit board of known technology.
Figure 3 shows that the synoptic diagram of the testing circuit board that the utility model proposes.
Embodiment
See also Fig. 3, Figure 3 shows that the synoptic diagram of the testing circuit board that the utility model proposes.As shown in Figure 3, the utility model discloses a kind of testing circuit board 30, be used for putting the element at least one to be tested that comprises a plurality of pin position (figure does not show), and in order to transmit a plurality of test signals that a test machine (figure does not show) produced so that this at least one element to be tested (figure does not show) is tested.In an embodiment, element to be tested be an integrated circuit (Integrated Circuit, IC).
In an embodiment, circuit substrate 32 is a printed circuit board (PCB).And the material of this plurality of transmission lines 38 is a copper, adopts the mode that is printed in circuit substrate 32 in advance with the plurality of transmission lines 38 that copper was constituted, and directly is arranged between the switching groove 34 and a plurality of link slot 36 on the circuit substrate 32.
Comprise at least one power supply slot 40 in a plurality of link slots 36 in addition, be coupled to a power supply device (figure does not show), power supply slot 40 further offers this at least one element to be tested (figure does not show), to test in order to after obtaining power supply from power supply device (figure does not show).In addition, these a plurality of switching grooves 34 are coupled to test machine (figure does not show) by many switching interfaces (figure does not show), and these many switching interfaces (figure does not show) are in order to transmit these a plurality of test signals and this a plurality of output signals.In an embodiment, each bar switching interface is respectively a bus in these many switching interfaces (figure does not show).
In each embodiment of the present utility model, testing circuit board of the present utility model utilizes the mode of P.e.c. that all connecting lines are arranged on the testing circuit board in advance, save to need to use manually in the past connecting line is coupled between each pin position and corresponding link slot of element to be tested, could test the inconvenience that is brought smoothly, in addition, use the mode of P.e.c. that the situation generation that connecting line more can be avoided artificial connection error is set in advance, can effectively save the required time of test, further promote testing efficiency, these all are the characteristics that the utility model is better than known technology.
The above only is the utility model preferred embodiment; so it is not in order to limit scope of the present utility model; any personnel that are familiar with this technology; in not breaking away from spirit and scope of the present utility model; can do further improvement and variation on this basis, so the scope that claims were defined that protection domain of the present utility model is worked as with the application is as the criterion.
Being simply described as follows of symbol in the accompanying drawing:
10: test machine
20: element circuitry plate to be tested
22: element to be tested
24: the test connection end point
28: connecting line
38: transmission line
30: testing circuit board
32: circuit substrate
34: the switching groove
36: link slot
40: power supply slot.
Claims (10)
1. a testing circuit board is characterized in that, is used for putting the element at least one to be tested that comprises a plurality of pin position, and transmits a plurality of test signals that a test machine produced so that this at least one element to be tested is tested, and this testing circuit board comprises:
One circuit substrate;
A plurality of switching grooves are arranged on this circuit substrate, and described a plurality of switching grooves are respectively coupled to this test machine;
A plurality of link slots, be arranged on this circuit substrate, described a plurality of link slot is respectively coupled between the included a plurality of pin position of this at least one element to be tested and this a plurality of switching grooves, in order to providing these a plurality of test signals to this at least one element to be tested, and receive these at least one these a plurality of test signals of element basis to be tested a plurality of output signals of corresponding generation; And
Plurality of transmission lines is respectively coupled between these a plurality of switching grooves and this a plurality of link slots, and in order to these a plurality of test signals of transmission and this a plurality of output signals, wherein this plurality of transmission lines utilizes a predetermined way to be arranged on this circuit substrate.
2. testing circuit board according to claim 1 is characterized in that, this predetermined way refers to the mode of this plurality of transmission lines with P.e.c. is arranged on this circuit substrate.
3. testing circuit board according to claim 2 is characterized in that, the material of this plurality of transmission lines is a copper.
4. testing circuit board according to claim 2 is characterized in that, this circuit substrate is a printed circuit board (PCB).
5. testing circuit board according to claim 2 is characterized in that, this at least one element to be tested is an integrated circuit.
6. testing circuit board according to claim 2 is characterized in that, these a plurality of link slots comprise a power supply slot, in order to provide this at least one element to be tested required power supply.
7. testing circuit board according to claim 2 is characterized in that, these a plurality of switching grooves are coupled to this test machine by many switching interfaces, and these many switching interfaces are in order to transmit these a plurality of test signals and this a plurality of output signals.
8. testing circuit board according to claim 7 is characterized in that, each bar switching interface is respectively a bus in these many switching interfaces.
9. testing circuit board according to claim 1 is characterized in that, this test machine be VTT V7100 series test machine one of them.
10. testing circuit board according to claim 9 is characterized in that, this testing circuit board is applicable to the test machine of this VTT V7100 series.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201108899U CN201212905Y (en) | 2008-05-07 | 2008-05-07 | test circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201108899U CN201212905Y (en) | 2008-05-07 | 2008-05-07 | test circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201212905Y true CN201212905Y (en) | 2009-03-25 |
Family
ID=40497081
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2008201108899U Expired - Fee Related CN201212905Y (en) | 2008-05-07 | 2008-05-07 | test circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201212905Y (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103207366A (en) * | 2012-01-13 | 2013-07-17 | 纬创资通股份有限公司 | Test system and test method of printed circuit board assembly |
| CN106443086A (en) * | 2016-11-01 | 2017-02-22 | 郑州云海信息技术有限公司 | Test base plate |
-
2008
- 2008-05-07 CN CNU2008201108899U patent/CN201212905Y/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103207366A (en) * | 2012-01-13 | 2013-07-17 | 纬创资通股份有限公司 | Test system and test method of printed circuit board assembly |
| CN106443086A (en) * | 2016-11-01 | 2017-02-22 | 郑州云海信息技术有限公司 | Test base plate |
| CN106443086B (en) * | 2016-11-01 | 2021-01-12 | 苏州浪潮智能科技有限公司 | Test substrate |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090325 Termination date: 20140507 |