[go: up one dir, main page]

CN201004240Y - Memory card packaging structure - Google Patents

Memory card packaging structure Download PDF

Info

Publication number
CN201004240Y
CN201004240Y CN200620147863.2U CN200620147863U CN201004240Y CN 201004240 Y CN201004240 Y CN 201004240Y CN 200620147863 U CN200620147863 U CN 200620147863U CN 201004240 Y CN201004240 Y CN 201004240Y
Authority
CN
China
Prior art keywords
memory card
chip
substrate
chip package
packaging structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN200620147863.2U
Other languages
Chinese (zh)
Inventor
卓恩民
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN200620147863.2U priority Critical patent/CN201004240Y/en
Application granted granted Critical
Publication of CN201004240Y publication Critical patent/CN201004240Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H10W70/655
    • H10W90/756

Landscapes

  • Credit Cards Or The Like (AREA)
  • Packaging Frangible Articles (AREA)

Abstract

A memory card package structure includes a printed circuit board and at least one chip package, wherein the upper surface of the printed circuit board is provided with a plurality of bonding pads, the lower surface of the printed circuit board is provided with an exposed golden finger, each chip package includes at least one chip and a substrate, at least one layer of wiring is arranged in the substrate, the wiring is provided with a plurality of conductive terminals exposed on the lower surface of the substrate, and the conductive terminals are adhered to the bonding pads and electrically conducted. The utility model discloses can set up multilayer wiring in the base plate in order to increase the degree of freedom and the elasticity of encapsulation design to can adopt the function and the storage capacity of stacked multichip encapsulation in order to increase the memory card.

Description

记忆卡封装结构Memory card package structure

技术领域technical field

本实用新型涉及一种记忆卡封装结构,特别是关于一种采用芯片封装体,且以基板作为芯片承座的记忆卡封装结构。The utility model relates to a memory card packaging structure, in particular to a memory card packaging structure using a chip package body and using a substrate as a chip seat.

背景技术Background technique

记忆卡(memory card)是一种很轻巧的可携式数据储存装置,随着科技的进步,记忆卡已广泛应用于各式各样的电子装置,例如个人计算机(Personal Computer,PC)、手机(cell phone)、数字相机(DigitalCamera,DC)、数字摄影机(Digital Video,DV)及个人数字助理(PersonalDigital Assistant,PDA)...等,依据各种应用的不同需求,记忆卡有许多不同的尺寸、外型与规格,例如:数字安全卡(Secure Digital card,SDcard)、迷你数字安全卡(mini SD card)、微型数字安全卡(micro SD card,μSD card)、多媒体卡(Multi Media Card,MMC)及快闪记忆卡(CompactFlash card,CF card)...等。Memory card is a very light and portable data storage device. With the advancement of technology, memory card has been widely used in various electronic devices, such as personal computer (Personal Computer, PC), mobile phone (cell phone), digital camera (Digital Camera, DC), digital video camera (Digital Video, DV) and personal digital assistant (Personal Digital Assistant, PDA)... etc., according to the different needs of various applications, there are many different types of memory cards Size, appearance and specifications, such as: digital security card (Secure Digital card, SDcard), mini digital security card (mini SD card), micro SD card (micro SD card, μSD card), multimedia card (Multi Media Card, MMC) and flash memory card (CompactFlash card, CF card)...etc.

一般而言,一记忆卡包括至少一芯片(chip),例如一闪存(flashmemory)芯片,芯片可以直接粘着在一印刷电路板(Printed Circuit Board,PCB)上与其电性连接;也可以先封装成一芯片封装体,例如一动态随机存取存储器(Dynamic Random Access Memory,DRAM),再与印刷电路板粘着与电性连接。Generally speaking, a memory card includes at least one chip (chip), such as a flash memory (flash memory) chip, and the chip can be directly bonded on a printed circuit board (Printed Circuit Board, PCB) to be electrically connected with it; The chip package, such as a DRAM (Dynamic Random Access Memory, DRAM), is adhered and electrically connected to the printed circuit board.

已知的用于记忆卡的芯片封装体,例如一薄型小尺寸封装(ThinSmall Out-Line Package,TSOP)体,采用导线架(lead frame)来承载芯片并与印刷电路板电性连接,图1是一已知的薄型小尺寸封装体1的剖面示意图,图2是其俯视示意图,一芯片12设置于导线架14的芯片承座(chip carrier)142上,导线架14具有多个外引脚(outer lead)144,且芯片12以多个焊线(bonding wire)16与导线架14电性连接,一封装胶体(molding compound)18包覆芯片12与芯片承座142,并暴露出外引脚144。A known chip package for a memory card, such as a ThinSmall Out-Line Package (TSOP), uses a lead frame to carry the chip and is electrically connected to the printed circuit board, as shown in Figure 1 It is a schematic cross-sectional view of a known thin and small-sized package body 1, and FIG. 2 is a schematic top view thereof. A chip 12 is arranged on a chip carrier (chip carrier) 142 of a lead frame 14. The lead frame 14 has a plurality of external leads. (outer lead) 144, and the chip 12 is electrically connected to the lead frame 14 by a plurality of bonding wires (bonding wire) 16, and a packaging colloid (molding compound) 18 covers the chip 12 and the chip socket 142, and exposes the outer pin 144.

图3是一已知印刷电路板2的俯视示意图,印刷电路板2的上表面设有多个焊垫(solder pad)22。FIG. 3 is a schematic top view of a known printed circuit board 2, the upper surface of the printed circuit board 2 is provided with a plurality of solder pads (solder pad) 22.

图4是一已知记忆卡封装结构3的俯视示意图,薄型小尺寸封装体1的多个外引脚144与印刷电路板2的多个焊垫22粘着并电性导通,且电阻(resistor)、电容(capacitor)或电感(inductor)等被动元件32设置于印刷电路板2上与其电性导通。FIG. 4 is a schematic top view of a known memory card package structure 3. A plurality of external pins 144 of the thin small-size package 1 are adhered to and electrically connected to a plurality of welding pads 22 of the printed circuit board 2, and the resistance (resistor ), capacitors or inductors and other passive components 32 are disposed on the printed circuit board 2 and electrically connected with it.

如上所述,因为薄型小尺寸封装体采用导线架作为芯片承座,而薄型小尺寸封装体的厚度有其规格限制,所以不适用于叠置式多芯片封装结构(Stacked-type Multi Chip Package,St.MCP),甚且由于空间有限,被动元件不易置入薄型小尺寸封装体内,因此,习知的采用导线架的芯片封装体使得记忆卡的功能与容量受到限制,无法进一步提升。As mentioned above, because the thin small size package uses the lead frame as the chip holder, and the thickness of the thin small size package has its specification limit, it is not suitable for the stacked-type multi-chip package structure (Stacked-type Multi Chip Package, Stacked-type Multi Chip Package, St .MCP), and due to limited space, passive components are not easy to be placed in a thin and small-sized package. Therefore, the conventional chip package using a lead frame limits the function and capacity of the memory card and cannot be further improved.

实用新型内容Utility model content

为解决上述问题,本实用新型目的之一是提供一种以基板(substrate)为芯片(chip)承座的芯片封装体的记忆卡封装结构,可适用于数字安全卡、迷你数字安全卡、微型数字安全卡及多媒体卡或快闪记忆卡...等。In order to solve the above problems, one of the purposes of this utility model is to provide a memory card packaging structure of a chip package with a substrate as a chip seat, which can be applied to digital security cards, mini digital security cards, miniature Digital security card and multimedia card or flash memory card...etc.

本实用新型目的之一是提供一种记忆卡封装结构,其采用覆晶(flipchip)式芯片封装的芯片封装体。One of the purposes of the present invention is to provide a memory card packaging structure, which adopts a flip chip chip packaging body.

本实用新型目的之一是提供一种记忆卡封装结构,其采用叠置式多芯片封装的芯片封装体。One of the purposes of the present invention is to provide a memory card packaging structure, which adopts a stacked multi-chip packaging chip package.

因此,本实用新型的记忆卡的芯片封装体采用基板作为芯片承座具有许多优点:1.基板内可设置多层布线(trace)以增加封装设计的自由度与弹性,并可采用叠置式多芯片封装以增加记忆卡的功能与储存容量;2.可以把被动元件置于芯片封装体内以节省印刷电路板的封装空间,因此印刷电路板上可设置两个以上的芯片封装体,进一步增加记忆卡的功能与储存容量。Therefore, the chip package body of the memory card of the present utility model adopts the substrate as the chip holder and has many advantages: 1. Multi-layer wiring (trace) can be arranged in the substrate to increase the freedom and flexibility of the packaging design, and a stacked multi-layer trace can be used. Chip packaging to increase the function and storage capacity of the memory card; 2. Passive components can be placed in the chip package to save the packaging space of the printed circuit board, so more than two chip packages can be set on the printed circuit board to further increase the memory The function and storage capacity of the card.

为了达到上述目的,本实用新型一实施例的记忆卡封装结构,包括:一印刷电路板,其具有一第一上表面及一第一下表面,第一下表面设有暴露的一金手指,且第一上表面设有多个焊垫;及至少一芯片封装体,每一芯片封装体包括至少一芯片与一基板,基板具有一第二上表面及一第二下表面,芯片封装体设置于第二上表面,基板内部设有至少一层布线,且布线具有暴露于第二下表面的多个导电端子,导电端子与焊垫粘着并电性导通。In order to achieve the above object, the memory card package structure of an embodiment of the present invention includes: a printed circuit board, which has a first upper surface and a first lower surface, the first lower surface is provided with an exposed golden finger, And the first upper surface is provided with a plurality of welding pads; and at least one chip package, each chip package includes at least one chip and a substrate, the substrate has a second upper surface and a second lower surface, the chip package is set On the second upper surface, at least one layer of wiring is arranged inside the substrate, and the wiring has a plurality of conductive terminals exposed on the second lower surface, and the conductive terminals are adhered to the pads and are electrically connected.

以下将通过具体实施例配合所示附图详加说明,当更容易了解本实用新型的目的、技术内容、特点及其所达成的功效。The following will be described in detail through specific embodiments in conjunction with the accompanying drawings, so that it is easier to understand the purpose, technical content, characteristics and effects of the present utility model.

附图说明Description of drawings

图1与图2分别为现有技术薄型小尺寸封装体的剖面示意图与俯视示意图;FIG. 1 and FIG. 2 are respectively a schematic cross-sectional view and a schematic top view of a thin and small-sized package in the prior art;

图3为现有技术印刷电路板的俯视示意图;FIG. 3 is a schematic top view of a prior art printed circuit board;

图4为现有技术记忆卡封装结构的俯视示意图;4 is a schematic top view of a memory card packaging structure in the prior art;

图5与图6分别为本实用新型一实施例的芯片封装体的剖面示意图与仰视示意图;5 and 6 are respectively a schematic cross-sectional view and a schematic bottom view of a chip package according to an embodiment of the present invention;

图7为本实用新型一实施例的印刷电路板俯视示意图;7 is a schematic top view of a printed circuit board according to an embodiment of the present invention;

图8为本实用新型一实施例的记忆卡封装结构俯视示意图;FIG. 8 is a schematic top view of a memory card packaging structure according to an embodiment of the present invention;

图9与图10为本实用新型实施例的记忆卡封装结构的剖面示意图;9 and 10 are schematic cross-sectional views of the packaging structure of the memory card according to the embodiment of the present invention;

图11与图12为本实用新型实施例的芯片封装体的剖面示意图;11 and 12 are schematic cross-sectional views of a chip package according to an embodiment of the present invention;

图13为本实用新型一实施例的记忆卡封装结构的俯视示意图;13 is a schematic top view of a memory card packaging structure according to an embodiment of the present invention;

图14为本实用新型一实施例的芯片封装体剖面示意图;14 is a schematic cross-sectional view of a chip package according to an embodiment of the present invention;

图15为本实用新型一实施例的记忆卡封装结构俯视示意图。FIG. 15 is a schematic top view of a memory card package structure according to an embodiment of the present invention.

图中符号说明Explanation of symbols in the figure

1         薄型小尺寸封装体1 Thin small size package

12        芯片12 chips

14        导线架14 lead frame

142       芯片承座142 chip socket

144       外引脚144 external pins

16        焊线16 welding wire

18        封装胶体18 Encapsulation colloid

2         印刷电路板2 printed circuit board

22        焊垫22 solder pads

3         记忆卡封装结构3 Memory card packaging structure

32        被动元件32 passive components

4、4’    芯片封装体4. 4' chip package

42        芯片42 chips

44        基板(包括上、下表面,在本案中称之为第二上、下表面)44 Substrate (including upper and lower surfaces, referred to as the second upper and lower surfaces in this case)

442       布线442 Wiring

4422      导电端子4422 Conductive terminals

46        焊线46 welding wire

48        封装胶体48 Encapsulation colloid

49        被动元件49 passive components

5、5’    印刷电路板(包括上、下表面,在本案中称之为第一上、5. 5' printed circuit board (including the upper and lower surfaces, referred to as the first upper and lower surfaces in this case

          下表面) lower surface)

52        焊垫52 solder pads

54        金手指54 Goldfinger

6、7、7’ 记忆卡封装结构6, 7, 7' memory card package structure

72        上盖72 Upper cover

74        封装胶体74 Encapsulation colloid

8、8’    芯片封装体8, 8' chip package

81、82、  芯片81, 82, chip

8383

84、85    基板84, 85 Substrate

842、     布线842、 Wiring

852852

86        焊球86 solder balls

87        焊线87 welding wire

9、9’    记忆卡封装结构9. 9' memory card packaging structure

92        被动元件92 passive components

具体实施方式Detailed ways

详细说明如下,所述较佳实施例仅做一说明而非用以限定本实用新型。The detailed description is as follows, and the preferred embodiment is only for illustration but not for limiting the utility model.

图5与图6分别为本实用新型一实施例的芯片封装体4的剖面示意图与仰视示意图,至少一芯片封装体4,该芯片封装体4包含至少一芯片42与一基板44,该基板44具有一第二上表面及一第二下表面,一芯片42设置于一基板44的第二上表面,即该芯片封装体4设置于基板的第二上表面;基板44内部具有一层布线442,布线442具有多个导电端子4422暴露出基板44的第二下表面,多个焊线46电性连接芯片42与基板44,一封装胶体48包覆焊线46、基板44的第二上表面与芯片42,并暴露出基板44的第二下表面,在一实施例中,封装胶体48的材质为环氧树脂(epoxy resin)。5 and 6 are respectively a schematic cross-sectional view and a schematic bottom view of a chip package 4 according to an embodiment of the present invention, at least one chip package 4, the chip package 4 includes at least one chip 42 and a substrate 44, the substrate 44 It has a second upper surface and a second lower surface, and a chip 42 is arranged on the second upper surface of a substrate 44, that is, the chip package 4 is arranged on the second upper surface of the substrate; the substrate 44 has a layer of wiring 442 inside , the wiring 442 has a plurality of conductive terminals 4422 exposing the second lower surface of the substrate 44, a plurality of bonding wires 46 electrically connect the chip 42 and the substrate 44, and an encapsulant 48 covers the bonding wires 46 and the second upper surface of the substrate 44 and the chip 42, and expose the second lower surface of the substrate 44. In one embodiment, the encapsulant 48 is made of epoxy resin.

图7为本实用新型一实施例的印刷电路板5的俯视示意图,印刷电路板5的第一上表面设有多个焊垫52。FIG. 7 is a schematic top view of a printed circuit board 5 according to an embodiment of the present invention. The first upper surface of the printed circuit board 5 is provided with a plurality of welding pads 52 .

图8为本实用新型一实施例的记忆卡封装结构6的俯视示意图,一印刷电路板5,其具有一第一上表面及一第一下表面,该第一下表面设有暴露的一金手指54(如图9所示),该芯片封装体4设置于印刷电路板5的第一上表面,导电端子4422(图中未示)与焊垫52粘着并电性导通。FIG. 8 is a schematic top view of a memory card packaging structure 6 according to an embodiment of the present invention. A printed circuit board 5 has a first upper surface and a first lower surface. The first lower surface is provided with an exposed gold plate. The finger 54 (as shown in FIG. 9 ), the chip package 4 is disposed on the first upper surface of the printed circuit board 5 , and the conductive terminal 4422 (not shown in the figure) is adhered to the pad 52 and is electrically connected.

因此,本实用新型的记忆卡封装结构的特征之一是包括一芯片封装体,且其采用基板作为芯片承座。所以本实用新型的记忆卡封装结构可适用于不同尺寸、外型与规格的记忆卡,例如:数字安全卡、迷你数字安全卡、微型数字安全卡及多媒体卡或快闪记忆卡...等,但不限于此。Therefore, one of the features of the memory card packaging structure of the present invention is that it includes a chip package, and it uses the substrate as the chip socket. Therefore, the memory card packaging structure of the present utility model can be applied to memory cards of different sizes, shapes and specifications, such as digital security cards, mini digital security cards, miniature digital security cards, multimedia cards or flash memory cards...etc. , but not limited to this.

接续上述说明,当完成芯片封装体的粘着后,可用一上盖或一封装胶体罩覆芯片封装体与基板上表面以保护记忆卡,防止外力或尘粒污染造成记忆卡毁损;请参考图9,图9为本实用新型一实施例的记忆卡封装结构7的剖面示意图,一上盖72用以罩盖芯片封装体4与印刷电路板5的第一上表面,并暴露出印刷电路板5的第一下表面;一金手指(golden finger)54暴露于印刷电路板5的第一下表面,当记忆卡插入一电子装置(图中未示)的插槽时,金手指54作为电子装置与记忆卡间的电源输送与数据交换的电性连接端子。请参考图10,其为本实用新型另一实施例的记忆卡封装结构7’的剖面示意图,图10与图9的记忆卡封装结构7有不同之处,图10的记忆卡封装结构7’是以一封装胶体74包覆芯片封装体4与印刷电路板5的第一上表面。Continuing the above description, after completing the bonding of the chip package, use a cover or an encapsulant to cover the chip package and the upper surface of the substrate to protect the memory card and prevent damage to the memory card caused by external force or dust pollution; please refer to Figure 9 , FIG. 9 is a schematic cross-sectional view of a memory card packaging structure 7 according to an embodiment of the present invention. An upper cover 72 is used to cover the first upper surface of the chip package 4 and the printed circuit board 5, and expose the printed circuit board 5. The first lower surface of the first lower surface; a golden finger (golden finger) 54 is exposed on the first lower surface of the printed circuit board 5, when the memory card is inserted into the slot of an electronic device (not shown), the golden finger 54 is used as an electronic device An electrical connection terminal for power transmission and data exchange with the memory card. Please refer to FIG. 10, which is a schematic cross-sectional view of a memory card packaging structure 7' according to another embodiment of the present invention. FIG. 10 is different from the memory card packaging structure 7 in FIG. 9. The memory card packaging structure 7' in FIG. The first upper surface of the chip package body 4 and the printed circuit board 5 is covered with a packaging compound 74 .

对此技艺具有通常知识者当可明了本实用新型可适用于各式各样的芯片与芯片封装体,例如闪存芯片与动态随机存取存储器;而且本实用新型的以基板作为芯片承座的芯片封装体可适用各种不同的封装结构,例如覆晶式芯片封装,请参考图11,其为本实用新型一实施例的芯片封装体8的剖面示意图,芯片封装体8为覆晶式芯片封装,芯片82的主动面朝向基板84第二上表面,且芯片82以多个焊球(flipball)86与基板84的布线842电性连接。Those who have ordinary knowledge of this technology should understand that the present invention can be applied to various chips and chip packages, such as flash memory chips and dynamic random access memory; The package can be applied to various packaging structures, such as flip-chip chip packaging. Please refer to FIG. 11 , which is a schematic cross-sectional view of a chip package 8 according to an embodiment of the present invention. The active surface of the chip 82 faces the second upper surface of the substrate 84 , and the chip 82 is electrically connected to the wiring 842 of the substrate 84 by a plurality of flipballs 86 .

因为本实用新型采用基板作为芯片承座,所以芯片封装体内部具有足够空间可作叠置式多芯片封装,请参考图12,其为本实用新型另一实施例的芯片封装体8’的剖面示意图,芯片封装体8’为叠置式多芯片封装,其包括叠置于基板85上的芯片81与芯片83,在此实施例中,芯片81与芯片83藉由焊线87与基板85电性连接,在另一实施例中亦可采用焊球等其它方式,因此,根据本实用新型的精神,举凡采用芯片封装体且以基板作为芯片承座的记忆卡封装结构皆涵盖在本实用新型的范围内,在此不再赘述。Because the utility model uses the substrate as the chip socket, there is enough space inside the chip package for stacked multi-chip packaging. Please refer to FIG. 12, which is a schematic cross-sectional view of a chip package 8' according to another embodiment of the utility model. The chip package 8' is a stacked multi-chip package, which includes a chip 81 and a chip 83 stacked on a substrate 85. In this embodiment, the chip 81 and the chip 83 are electrically connected to the substrate 85 by bonding wires 87 In another embodiment, other methods such as solder balls can also be used. Therefore, according to the spirit of the present invention, all memory card packaging structures that use chip packages and use the substrate as a chip socket are covered by the scope of the present invention. , and will not be repeated here.

此外,采用基板作为芯片承座的另一优点是基板内部可设置多层布线以增加封装设计的自由度与弹性,例如基板85内部设置有两层布线852(请再参考图12)。In addition, another advantage of using the substrate as a chip holder is that multiple layers of wiring can be provided inside the substrate to increase the freedom and flexibility of packaging design. For example, there are two layers of wiring 852 inside the substrate 85 (please refer to FIG. 12 again).

一般而言,记忆卡必须具有电阻、电容或电感等被动元件以达到过滤噪声等功能,请参考图13,其为本实用新型一实施例的记忆卡封装结构6’的俯视示意图,芯片封装体4设置于印刷电路板5的第一上表面,且电阻、电容或电感等被动元件92亦设置于印刷电路板5的第一上表面,并与印刷电路板5电性导通。Generally speaking, memory cards must have passive components such as resistors, capacitors, or inductors to achieve functions such as filtering noise. Please refer to FIG. 4 is disposed on the first upper surface of the printed circuit board 5 , and passive components 92 such as resistors, capacitors or inductors are also disposed on the first upper surface of the printed circuit board 5 and are electrically connected to the printed circuit board 5 .

甚且,因为本实用新型采用基板作为芯片承座的芯片封装体内部具有较大的空间,所以可把电阻、电容或电感等被动元件封装于芯片封装体内部以节省印刷电路板的封装空间,请参考图14,其为本实用新型一实施例的芯片封装体4’的剖面示意图,芯片封装体4’包括至少一被动元件49,其设置于基板44的第二上表面,并与基板44电性连接。Moreover, because the utility model uses the substrate as the chip socket inside the chip package has a larger space, passive components such as resistors, capacitors or inductors can be packaged inside the chip package to save the packaging space of the printed circuit board, Please refer to FIG. 14 , which is a schematic cross-sectional view of a chip package 4' according to an embodiment of the present invention. The chip package 4' includes at least one passive element 49 disposed on the second upper surface of the substrate 44 and connected to the substrate 44. electrical connection.

如上所述,因本实用新型的被动元件可封装于芯片封装体内部,节省的印刷电路板空间可供以再封装一个以上的芯片封装体于同一记忆卡,请参考图15,其为本实用新型一实施例的记忆卡封装结构9’的俯视示意图,两个芯片封装体4’设置于印刷电路板5’上以增加记忆卡的功能与储存容量。As mentioned above, because the passive components of the present invention can be packaged inside the chip package, the space saved on the printed circuit board can be used to repackage more than one chip package in the same memory card, please refer to FIG. A schematic top view of a memory card package structure 9' according to a new embodiment, two chip packages 4' are arranged on a printed circuit board 5' to increase the function and storage capacity of the memory card.

综上所述,本实用新型的记忆卡的芯片封装体采用基板作为芯片承座具有许多优点:1.基板内可设置多层布线以增加封装设计的自由度与弹性,并可采用叠置式多芯片封装以增加记忆卡的功能与储存容量;2.可以把被动元件设置于芯片封装体内部以节省记忆卡的封装空间,因此印刷电路板上可设置两个以上的芯片封装体,进一步增加记忆卡的功能与储存容量。In summary, the chip package of the memory card of the present invention adopts the substrate as the chip socket and has many advantages: 1. Multi-layer wiring can be arranged in the substrate to increase the freedom and flexibility of the package design, and a stacked multi-layer can be used. Chip packaging to increase the function and storage capacity of the memory card; 2. Passive components can be placed inside the chip package to save the packaging space of the memory card, so more than two chip packages can be set on the printed circuit board to further increase the memory The function and storage capacity of the card.

以上所述的实施例仅为说明本实用新型的技术思想及特点,其目的在使熟习此项技艺的人士能够了解本实用新型的内容并据以实施,当不能以此限定本实用新型的专利范围,即大凡依本实用新型所揭示的精神所作的均等变化或修饰,仍应涵盖在本实用新型的专利范围内。The above-described embodiments are only to illustrate the technical ideas and characteristics of the present utility model, and its purpose is to enable those skilled in this art to understand the content of the present utility model and implement it accordingly, and should not limit the patent of the present utility model with this scope, that is, all equivalent changes or modifications made according to the spirit disclosed in the utility model should still be covered within the patent scope of the utility model.

Claims (17)

1.一种记忆卡封装结构,其特征是,包含:1. A memory card packaging structure, characterized in that it comprises: 一印刷电路板,其具有一第一上表面及一第一下表面,该第一下表面设有暴露的一金手指,且该第一上表面设有多个焊垫;及A printed circuit board, which has a first upper surface and a first lower surface, the first lower surface is provided with an exposed gold finger, and the first upper surface is provided with a plurality of welding pads; and 至少一芯片封装体,该芯片封装体包含至少一芯片与一基板,该基板具有一第二上表面及一第二下表面,该芯片封装体设置于该第二上表面,且该基板内部设有至少一层布线,该布线具有暴露于该第二下表面的多个导电端子,这些导电端子与这些焊垫粘着并电性导通。At least one chip package, the chip package includes at least one chip and a substrate, the substrate has a second upper surface and a second lower surface, the chip package is arranged on the second upper surface, and the inner part of the substrate is There is at least one layer of wiring, and the wiring has a plurality of conductive terminals exposed on the second lower surface, and the conductive terminals are adhered to the pads and are electrically connected. 2.如权利要求1所述的记忆卡封装结构,其特征是,包含一上盖,其罩盖该印刷电路板的该第一上表面与该芯片封装体,并暴露出该印刷电路板的该第一下表面。2. The memory card packaging structure according to claim 1, characterized in that it comprises an upper cover, which covers the first upper surface of the printed circuit board and the chip package, and exposes the printed circuit board. the first lower surface. 3.如权利要求1所述的记忆卡封装结构,其特征是,包含一封装胶体,其包覆该印刷电路板的该第一上表面与该芯片封装体,并暴露出该印刷电路板的该第一下表面。3. The packaging structure of the memory card according to claim 1, characterized in that it comprises a packaging compound, which covers the first upper surface of the printed circuit board and the chip package, and exposes the printed circuit board. the first lower surface. 4.如权利要求1所述的记忆卡封装结构,其特征是,该封装胶体的材质为环氧树脂。4. The memory card packaging structure as claimed in claim 1, wherein the packaging colloid is made of epoxy resin. 5.如权利要求1所述的记忆卡封装结构,其特征是,包含至少一被动元件,其设置于该印刷电路板的该第一上表面上,并与该印刷电路板电性连接。5 . The memory card packaging structure as claimed in claim 1 , comprising at least one passive element disposed on the first upper surface of the printed circuit board and electrically connected to the printed circuit board. 6.如权利要求5所述记忆卡封装结构,其特征是,该被动元件为电阻、电容或电感。6. The package structure of the memory card according to claim 5, wherein the passive element is a resistor, a capacitor or an inductor. 7.如权利要求1所述的记忆卡封装结构,其特征是,该芯片封装体包含多个焊线,其电性连接该芯片与该基板。7. The memory card packaging structure of claim 1, wherein the chip package includes a plurality of bonding wires electrically connecting the chip and the substrate. 8.如权利要求1所述的记忆卡封装结构,其特征是,该芯片封装体包含至少一封装胶体,其包覆该芯片封装体的该基板的该第二上表面与该芯片,并暴露出该芯片封装体的该基板的该第二下表面。8. The memory card packaging structure according to claim 1, wherein the chip package comprises at least one packaging compound, which covers the second upper surface of the substrate of the chip package and the chip, and exposes out of the second lower surface of the substrate of the chip package. 9.如权利要求8所述的记忆卡封装结构,其特征是,该封装胶体的材质为环氧树脂。9. The memory card packaging structure as claimed in claim 8, wherein the packaging colloid is made of epoxy resin. 10.如权利要求1所述的记忆卡封装结构,其特征是,该芯片封装体为叠置式芯片封装,其包含叠置于该基板上的多个芯片,这些芯片与该基板电性连接。10 . The memory card packaging structure according to claim 1 , wherein the chip package is a stacked chip package comprising a plurality of chips stacked on the substrate, and the chips are electrically connected to the substrate. 11 . 11.如权利要求10所述的记忆卡封装结构,其特征是,包含多个焊线电性连接这些芯片与该基板。11. The memory card packaging structure of claim 10, comprising a plurality of bonding wires electrically connecting the chips and the substrate. 12.如权利要求1所述的记忆卡封装结构,其特征是,该芯片封装体为覆晶式芯片封装,该芯片的主动面朝向该第二上表面,且该芯片以多个焊球与该基板电性连接。12. The memory card packaging structure according to claim 1, wherein the chip package is a flip-chip chip package, the active surface of the chip faces the second upper surface, and the chip is connected with a plurality of solder balls. The substrate is electrically connected. 13.如权利要求1所述的记忆卡封装结构,其特征是,该芯片封装体包含至少一被动元件,其设置于该基板的该第二上表面上,并与该基板电性连接。13 . The memory card packaging structure of claim 1 , wherein the chip package comprises at least one passive element disposed on the second upper surface of the substrate and electrically connected to the substrate. 14 . 14.如权利要求13所述记忆卡封装结构,其特征是,该被动元件为电阻、电容或电感。14. The package structure of the memory card according to claim 13, wherein the passive element is a resistor, a capacitor or an inductor. 15.如权利要求1所述的记忆卡封装结构,其特征是,该记忆卡为一数字安全卡、一迷你数字安全卡、一微型数字安全卡、一多媒体卡或一快闪记忆卡。15. The memory card packaging structure of claim 1, wherein the memory card is a digital security card, a mini digital security card, a micro digital security card, a multimedia card or a flash memory card. 16.如权利要求1所述的记忆卡封装结构,其特征是,该芯片封装体为动态随机存取存储器。16. The memory card packaging structure of claim 1, wherein the chip package is a dynamic random access memory. 17.如权利要求1所述的记忆卡封装结构,其特征是,该芯片为闪存芯片。17. The memory card packaging structure as claimed in claim 1, wherein the chip is a flash memory chip.
CN200620147863.2U 2006-11-28 2006-11-28 Memory card packaging structure Expired - Fee Related CN201004240Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200620147863.2U CN201004240Y (en) 2006-11-28 2006-11-28 Memory card packaging structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200620147863.2U CN201004240Y (en) 2006-11-28 2006-11-28 Memory card packaging structure

Publications (1)

Publication Number Publication Date
CN201004240Y true CN201004240Y (en) 2008-01-09

Family

ID=39039783

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200620147863.2U Expired - Fee Related CN201004240Y (en) 2006-11-28 2006-11-28 Memory card packaging structure

Country Status (1)

Country Link
CN (1) CN201004240Y (en)

Similar Documents

Publication Publication Date Title
JP6122290B2 (en) Semiconductor package having a rewiring layer
US6611434B1 (en) Stacked multi-chip package structure with on-chip integration of passive component
US8716854B2 (en) Multi-chip package
TWM338433U (en) Multi-chip package structure
CN108054152A (en) Integrated circuit packaging structure
US8169066B2 (en) Semiconductor package
KR101450758B1 (en) Integrated circuit package
CN101192275A (en) Memory card packaging structure and manufacturing method thereof
US20070284717A1 (en) Device embedded with semiconductor chip and stack structure of the same
CN101118901B (en) Stacked chip package structure and manufacturing process thereof
CN201004240Y (en) Memory card packaging structure
US20080017970A1 (en) Brick type stackable semiconductor package
TW202117984A (en) Semiconductor package
CN100334726C (en) Window type multi-chip semiconductor package
CN103379736B (en) Printed circuit board assembly and method of making the same
JP2008130075A (en) Memory card package structure and manufacturing method thereof
CN100416827C (en) Package component
KR102029804B1 (en) Package on package type semiconductor package and manufacturing method thereof
CN201608174U (en) A system-in-package structure of a semiconductor device
CN101236958B (en) semiconductor package
CN201063342Y (en) A multi-chip packaging structure
CN201181705Y (en) Multi-chip package structure
CN221783207U (en) Chip packaging structure and electronic equipment
CN219163395U (en) 3D stacks up packaging structure
CN101540312A (en) Stack type chip packaging structure

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080109

Termination date: 20101128