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CN1901189A - Plane flip-chip LED integrated chip and producing method - Google Patents

Plane flip-chip LED integrated chip and producing method Download PDF

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CN1901189A
CN1901189A CNA2006100361541A CN200610036154A CN1901189A CN 1901189 A CN1901189 A CN 1901189A CN A2006100361541 A CNA2006100361541 A CN A2006100361541A CN 200610036154 A CN200610036154 A CN 200610036154A CN 1901189 A CN1901189 A CN 1901189A
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silicon substrate
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CN100414704C (en
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吴纬国
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Guangzhou Nanker Integrated Electronic Co Ltd
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    • H10W90/00
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F21LIGHTING
    • F21KNON-ELECTRIC LIGHT SOURCES USING LUMINESCENCE; LIGHT SOURCES USING ELECTROCHEMILUMINESCENCE; LIGHT SOURCES USING CHARGES OF COMBUSTIBLE MATERIAL; LIGHT SOURCES USING SEMICONDUCTOR DEVICES AS LIGHT-GENERATING ELEMENTS; LIGHT SOURCES NOT OTHERWISE PROVIDED FOR
    • F21K9/00Light sources using semiconductor devices as light-generating elements, e.g. using light-emitting diodes [LED] or lasers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
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Abstract

本发明公开了一种成本低、易于集成、散热效果好的平面倒装LED集成芯片及制造方法。该集成芯片包括若干个LED裸芯片和硅衬底,LED裸芯片包括衬底(10)和N型外延层(11)、P型外延层(12),硅衬底顶面于各LED裸芯片处有两个分离的金属层(32、33),P型外延层(12)、N型外延层(11)分别通过焊球(40、41)倒装在金属层(32、33)上,金属层(32、33)与硅衬底的结合区分别还有一个隔离层I(22、23),各LED裸芯片对应的金属层(32、33)与硅衬底之间设有隔离层II(5),若干个LED裸芯片之间通过金属层(32、33)相连接并引出阳极接点(80)和阴极接点(81)。该方法包括形成隔离层、金属层、保护层及倒装LED的步骤。本发明可广泛应用于LED领域。

Figure 200610036154

The invention discloses a planar flip-chip LED integrated chip with low cost, easy integration and good heat dissipation effect and a manufacturing method. The integrated chip includes several LED bare chips and a silicon substrate, and the LED bare chip includes a substrate (10) and an N-type epitaxial layer (11), a P-type epitaxial layer (12), and the top surface of the silicon substrate is placed on each LED bare chip. There are two separated metal layers (32, 33), and the P-type epitaxial layer (12) and the N-type epitaxial layer (11) are respectively flipped on the metal layers (32, 33) through solder balls (40, 41), There is also an isolation layer I (22, 23) in the bonding area between the metal layer (32, 33) and the silicon substrate, and an isolation layer is provided between the metal layer (32, 33) corresponding to each LED bare chip and the silicon substrate. II (5), a plurality of bare LED chips are connected through metal layers (32, 33) and anode contacts (80) and cathode contacts (81) are drawn out. The method includes the steps of forming an isolation layer, a metal layer, a protection layer and flip-chip LEDs. The invention can be widely used in the LED field.

Figure 200610036154

Description

平面倒装LED集成芯片及制造方法Planar flip-chip LED integrated chip and manufacturing method

                        技术领域Technical field

本发明涉及一种平面倒装LED集成芯片及制造方法。The invention relates to a plane flip-chip LED integrated chip and a manufacturing method thereof.

                        背景技术 Background technique

倒装芯片技术是当今最先进的微电子封装技术之一,它既是一种芯片互连技术,又是一种理想的芯片粘接技术,它将电路组装密度提升到了一个新的高度。在所有表面安装技术中,倒装芯片可以达到最小、最薄的封装,随着电子产品体积的进一步缩小,倒装芯片的应用将会越来越广泛。将LED裸芯片倒扣在硅衬底上的封装形式称为倒装LED。传统的倒装LED采用面积较大的功率型LED,成本较高,由于芯片面积较大,热源集中,因此散热效果不好。同时,这种倒装LED较难实现多芯片集成。Flip-chip technology is one of the most advanced microelectronic packaging technologies today. It is not only a chip interconnection technology, but also an ideal chip bonding technology, which raises the circuit assembly density to a new level. Among all surface mount technologies, flip chip can achieve the smallest and thinnest package. As the size of electronic products shrinks further, the application of flip chip will become more and more extensive. The packaging form in which the bare LED chip is buckled upside down on the silicon substrate is called a flip-chip LED. Traditional flip-chip LEDs use larger power LEDs with higher cost. Due to the larger chip area and concentrated heat source, the heat dissipation effect is not good. At the same time, it is difficult to realize multi-chip integration of this kind of flip-chip LED.

                        发明内容Contents of the invention

本发明所要解决的技术问题是克服现有技术上的不足,提供一种成本低、易于集成、散热效果好的平面倒装LED集成芯片及制造方法。The technical problem to be solved by the present invention is to overcome the deficiencies in the prior art and provide a flat flip-chip LED integrated chip with low cost, easy integration and good heat dissipation effect and a manufacturing method.

本发明平面倒装LED集成芯片所采用的技术方案是:本发明平面倒装LED集成芯片包括若干个LED裸芯片和硅衬底,所述LED裸芯片包括衬底和N型外延层、P型外延层,所述硅衬底顶面于每个所述LED裸芯片处有两个分离的沉积金属层,所述P型外延层、所述N型外延层分别通过焊球倒装焊接在所述金属层上,所述金属层与所述硅衬底的结合区分别还有一个掺杂的隔离层I,各所述LED裸芯片对应的所述金属层与所述硅衬底之间设有隔离层II,若干个所述LED裸芯片之间通过所述金属层相连接并引出阳极接点和阴极接点。The technical solution adopted by the planar flip-chip LED integrated chip of the present invention is: the planar flip-chip LED integrated chip of the present invention includes several LED bare chips and a silicon substrate, and the LED bare chip includes a substrate and an N-type epitaxial layer, a P-type The epitaxial layer, the top surface of the silicon substrate has two separate deposited metal layers at each of the LED bare chips, and the P-type epitaxial layer and the N-type epitaxial layer are flip-chip welded on the silicon substrate respectively. On the metal layer, there is also a doped isolation layer I in the bonding area between the metal layer and the silicon substrate, and a doped isolation layer I is provided between the metal layer corresponding to each of the LED bare chips and the silicon substrate. There is an isolation layer II, and several LED bare chips are connected through the metal layer to lead out anode contacts and cathode contacts.

若干个所述LED裸芯片之间并联或串联或串并联组合连接。Several LED bare chips are connected in parallel or in series or in combination.

本发明平面倒装LED集成芯片还包括保护层,所述保护层覆盖于所述金属层外表面。The planar flip-chip LED integrated chip of the present invention further includes a protection layer, and the protection layer covers the outer surface of the metal layer.

所述硅衬底的背面还有一层或多层金属构成的散热层。There is also a heat dissipation layer made of one or more layers of metal on the back of the silicon substrate.

所述金属层的外表面为反光面。The outer surface of the metal layer is a reflective surface.

所述硅衬底为P型或N型,所述隔离层I与所述硅衬底极性相反,所述焊球为金球栓或铜球栓或锡球,所述金属层为铝或铜或硅铝合金。The silicon substrate is P-type or N-type, the polarity of the isolation layer I is opposite to that of the silicon substrate, the solder balls are gold ball plugs or copper ball plugs or tin balls, and the metal layer is aluminum or Copper or silicon aluminum alloy.

本发明平面倒装LED集成芯片的制造方法所采用的技术方案是:它包括以下步骤:The technical scheme adopted in the manufacturing method of the plane flip-chip LED integrated chip of the present invention is: it comprises the following steps:

(a)形成隔离层II:将所述硅衬底的上表面在氧化炉管内热氧化生长出氧化层,在光刻机上利用扩散光刻掩模版进行光刻,再用含HF的腐蚀液对氧化层进行蚀刻,去除光刻图形部分内的氧化层,剩余的氧化层构成所述隔离层II;(a) Form isolation layer II: thermally oxidize and grow an oxide layer on the upper surface of the silicon substrate in an oxidation furnace tube, perform photolithography on a photolithography machine using a diffusion photolithography mask, and then use an etching solution containing HF to The oxide layer is etched to remove the oxide layer in the photolithographic pattern part, and the remaining oxide layer forms the isolation layer II;

(b)形成隔离层I:在高温扩散炉中热扩散形成若干个极性与所述硅衬底极性相反的所述隔离层I,或者,用离子注入法将与所述硅衬底极性相反的离子注入所述硅衬底,再在高温下驱入所述硅衬底,形成若干个所述隔离层I;(b) Form the isolation layer I: thermally diffuse in a high-temperature diffusion furnace to form several isolation layers I whose polarities are opposite to those of the silicon substrate; Implanting ions with opposite properties into the silicon substrate, and then driving into the silicon substrate at high temperature to form several isolation layers I;

(c)形成金属层:以溅射或蒸镀的方法沉积金属层,然后在光刻机上利用金属光刻掩模版进行光刻,再用湿法或干法蚀刻工艺对金属层进行蚀刻,蚀刻后剩余的金属层构成串联或并联或串并联组合连接的所述金属层及阳极接点和阴极接点;(c) Form a metal layer: deposit a metal layer by sputtering or vapor deposition, then use a metal photolithography mask to perform photolithography on a photolithography machine, and then use a wet or dry etching process to etch the metal layer. The remaining metal layer constitutes the metal layer and the anode contact and the cathode contact connected in series or in parallel or in combination of series and parallel;

(d)形成保护层:用化学气相沉积法沉积二氧化硅或氮化硅保护层,然后在光刻机上利用护层光刻掩模版进行光刻,再用含HF的腐蚀液对二氧化硅进行蚀刻或对氮化硅用干法进行蚀刻,使保护层出现用于植焊球的开口;(d) Forming a protective layer: Deposit a silicon dioxide or silicon nitride protective layer by chemical vapor deposition, then use a protective layer photolithography mask to perform photolithography on a photolithography machine, and then use a HF-containing etching solution to treat the silicon dioxide Etching or dry etching of silicon nitride, so that the protective layer has openings for planting solder balls;

(e)LED裸芯片封装:植金球栓或铜球栓或锡球于保护层的开口内,再通过超声键合或回流焊将若干个所述LED裸芯片(1)倒装在金球栓或铜球栓或锡球上。(e) LED bare chip packaging: plant gold ball plugs or copper ball plugs or tin balls in the opening of the protective layer, and then flip several of the LED bare chips (1) on the gold balls by ultrasonic bonding or reflow soldering Bolt or copper ball bolt or tin ball.

本发明的有益效果是:由于本发明平面倒装LED集成芯片若干个所述LED裸芯片之间通过所述金属层相连接并引出阳极接点和阴极接点,若干个所述LED裸芯片之间并联或串联或串并联组合连接,多个所述LED裸芯片分布面积广,发光效果更好,且制造成本比采用一个LED裸芯片的功率型LED芯片更低,每个所述LED裸芯片通过与其相接的两个所述焊球将热量传到所述金属层,并通过所述隔离层I将热量传给所述硅衬底及所述散热层,所述金属层的面积较大,热源较分散,散热效果好,使用寿命长,故本发明平面倒装LED集成芯片散热效果好、使用寿命长,易于实现多芯片集成;又由于本发明平面倒装LED集成芯片所述金属层的外表面为反光面,所述LED裸芯片的PN结在底面发出的光线遇到所述金属层会发生反射,反射的光线又从正面射出,这样从所述LED裸芯片的PN结的底面发出的光得到了有效利用,减少了底面光的浪费,提高了发光效率,故本发明平面倒装LED集成芯片发光效率高、正面出光强度高;同理,采用本发明的制造方法制造的平面倒装LED集成芯片具有上述优点,且该方法工艺简便,产品质量好。The beneficial effects of the present invention are: because several LED bare chips of the flat flip-chip LED integrated chip of the present invention are connected through the metal layer and anode contacts and cathode contacts are drawn out, several LED bare chips are connected in parallel Or connected in series or series-parallel combination, the multiple LED bare chips have a wide distribution area, the luminous effect is better, and the manufacturing cost is lower than that of a power type LED chip using one LED bare chip. The two connected solder balls transfer heat to the metal layer, and transfer heat to the silicon substrate and the heat dissipation layer through the isolation layer 1. The metal layer has a relatively large area, and the heat source Relatively dispersed, good heat dissipation effect, long service life, so the flat flip-chip LED integrated chip of the present invention has good heat dissipation effect, long service life, and is easy to realize multi-chip integration; and because the metal layer of the flat flip-chip LED integrated chip of the present invention The surface is a reflective surface, and the light emitted by the PN junction of the LED bare chip on the bottom surface will be reflected when it encounters the metal layer, and the reflected light will be emitted from the front, so that the light emitted from the bottom surface of the PN junction of the LED bare chip The light is effectively utilized, the waste of light on the bottom surface is reduced, and the luminous efficiency is improved. Therefore, the planar flip-chip LED integrated chip of the present invention has high luminous efficiency and high light intensity from the front; similarly, the planar flip-chip manufactured by the method of the present invention The LED integrated chip has the above-mentioned advantages, and the method has simple process and good product quality.

                        附图说明Description of drawings

图1是本发明实施例一的平面布置结构示意图;Fig. 1 is a schematic diagram of the plane layout structure of Embodiment 1 of the present invention;

图2是图1所示LED集成芯片的电路原理图;Fig. 2 is a schematic circuit diagram of the LED integrated chip shown in Fig. 1;

图3是本发明实施例二的平面布置结构示意图;Fig. 3 is a schematic diagram of the plane layout structure of Embodiment 2 of the present invention;

图4是图3所示LED集成芯片的电路原理图;Fig. 4 is a schematic circuit diagram of the LED integrated chip shown in Fig. 3;

图5是本发明实施例三的平面布置结构示意图;Fig. 5 is a schematic diagram of the plane layout structure of the third embodiment of the present invention;

图6是图5所示LED集成芯片的电路原理图;Fig. 6 is a schematic circuit diagram of the LED integrated chip shown in Fig. 5;

图7是本发明实施例四的平面布置结构示意图;Fig. 7 is a schematic diagram of the plane layout structure of Embodiment 4 of the present invention;

图8是图7所示LED集成芯片的电路原理图;Fig. 8 is a schematic circuit diagram of the LED integrated chip shown in Fig. 7;

图9是图1、图3、图5、图7所示平面倒装LED集成芯片的A-A剖面结构示意图Fig. 9 is a schematic diagram of the A-A cross-sectional structure of the planar flip-chip LED integrated chip shown in Fig. 1, Fig. 3, Fig. 5 and Fig. 7

图10是图1所示本发明平面倒装LED集成芯片的制造方法步骤(a)完成后的B-B剖面结构示意图;Fig. 10 is a schematic diagram of the B-B cross-sectional structure of the manufacturing method of the planar flip-chip LED integrated chip of the present invention shown in Fig. 1 after step (a) is completed;

图11是图1所示本发明平面倒装LED集成芯片的制造方法步骤(b)完成后的B-B剖面结构示意图;Fig. 11 is a schematic diagram of the B-B sectional structure of the manufacturing method of the planar flip-chip LED integrated chip of the present invention shown in Fig. 1 after step (b) is completed;

图12是图1所示本发明平面倒装LED集成芯片的制造方法步骤(c)完成后的B-B剖面结构示意图;Fig. 12 is a schematic diagram of the B-B cross-sectional structure of the manufacturing method of the planar flip-chip LED integrated chip of the present invention shown in Fig. 1 after step (c) is completed;

图13是图1所示本发明平面倒装LED集成芯片的制造方法步骤(d)完成后的B-B剖面结构示意图;Fig. 13 is a schematic diagram of the B-B cross-sectional structure of the manufacturing method of the planar flip-chip LED integrated chip of the present invention shown in Fig. 1 after step (d) is completed;

图14是图1所示本发明平面倒装LED集成芯片的制造方法步骤(d′)完成后的B-B剖面结构示意图;Fig. 14 is a schematic diagram of the B-B sectional structure after the manufacturing method step (d') of the planar flip-chip LED integrated chip of the present invention shown in Fig. 1 is completed;

图15是图1所示本发明平面倒装LED集成芯片的制造方法步骤(e)完成后的B-B剖面结构示意图。Fig. 15 is a B-B cross-sectional structural diagram after the step (e) of the manufacturing method of the planar flip-chip LED integrated chip of the present invention shown in Fig. 1 is completed.

                      具体实施方式 Detailed ways

实施例一:Embodiment one:

如图1、图2、图9所示,本实施例的平面倒装LED集成芯片包括九个LED裸芯片1和硅衬底2,所述LED裸芯片1包括蓝宝石(Al2O3)衬底10和氮化镓(GaN)N型外延层11、P型外延层12,当然,所述衬底10也可以为碳化硅(SiC)等其他材料的衬底,所述硅衬底2为P型硅衬底,所述硅衬底2顶面于每个所述LED裸芯片1处有两个分离的沉积金属层32、33,所述金属层32、33为金属铝,当然也可以采用金属铜或硅铝合金,所述金属层32、33的外表面为反光面,所述金属层32、33既是电极、导电体,又是LED的散热片,还是底面光线的反光体,所述硅衬底2的背面还有一层金属构成的散热层7,当然所述散热层7也可以由多层金属构成,所述P型外延层12、所述N型外延层11分别通过焊球40、41倒装焊接在所述金属层32、33上,所述焊球40、41为金球栓,当然也可以为铜球栓或锡球,所述金属层32、33与所述硅衬底2的结合区分别还有一个掺杂磷或砷等材料的N型隔离层I22、23,各所述LED裸芯片1对应的所述金属层32、33与所述硅衬底2之间设有隔离层II 5,用于隔离所述金属层32、33与所述硅衬底2,防止所述金属层32、33之间漏电或短路,同时所述隔离层I 22、23与所述硅衬底2之间也构成一个静电保护二极管,也可起到在封装过程中静电保护的作用,同时所述隔离层I 22、23将所述LED裸芯片1传给所述金属层32、33的热量再传递给所述硅衬底2,起到良好的导热、散热作用。各所述LED裸芯片1之间通过所述金属层32、33相并联连接并引出阳极接点80和阴极接点81,即所述阳极接点80和所述阴极接点81之间的所有LED裸芯片1相并联。本发明平面倒装LED集成芯片还包括保护层6,所述保护层6覆盖于所述金属层32、33外表面。As shown in Figures 1, 2 and 9, the planar flip-chip LED integrated chip of this embodiment includes nine LED bare chips 1 and a silicon substrate 2, and the LED bare chips 1 include sapphire (Al 2 O 3 ) lining Bottom 10 and gallium nitride (GaN) N-type epitaxial layer 11, P-type epitaxial layer 12, certainly, described substrate 10 also can be the substrate of other materials such as silicon carbide (SiC), described silicon substrate 2 is P-type silicon substrate, the top surface of the silicon substrate 2 has two separate deposited metal layers 32, 33 at each of the LED bare chips 1, the metal layers 32, 33 are metal aluminum, of course, it can also be Metal copper or silicon-aluminum alloy is used, and the outer surfaces of the metal layers 32, 33 are reflective surfaces, and the metal layers 32, 33 are not only electrodes, conductors, heat sinks for LEDs, but also light reflectors for bottom light. There is also a heat dissipation layer 7 made of a layer of metal on the back side of the silicon substrate 2. Of course, the heat dissipation layer 7 can also be composed of multiple layers of metal. 40, 41 are flip-chip soldered on the metal layers 32, 33, the solder balls 40, 41 are gold ball plugs, of course, they can also be copper ball plugs or tin balls, and the metal layers 32, 33 and the silicon The bonding area of the substrate 2 also has an N-type isolation layer I22, 23 doped with phosphorus or arsenic, etc. An isolation layer II 5 is arranged between the metal layers 32, 33 and the silicon substrate 2 to prevent leakage or short circuit between the metal layers 32, 33, while the isolation layers I 22, 23 and An electrostatic protection diode is also formed between the silicon substrates 2, which can also play the role of electrostatic protection during the packaging process. At the same time, the isolation layers 1 22, 23 pass the LED bare chip 1 to the metal layer The heat of 32 and 33 is then transferred to the silicon substrate 2, which plays a good role in heat conduction and heat dissipation. Each of the LED bare chips 1 is connected in parallel through the metal layers 32 and 33 to lead out the anode contact 80 and the cathode contact 81, that is, all the LED bare chips 1 between the anode contact 80 and the cathode contact 81 in parallel. The planar flip-chip LED integrated chip of the present invention further includes a protection layer 6 covering the outer surfaces of the metal layers 32 and 33 .

当然,所述硅衬底2也可以为N型硅衬底,此时,所述隔离层I 22、23为掺杂硼等材料的P型隔离层。Of course, the silicon substrate 2 can also be an N-type silicon substrate, and at this time, the isolation layers 122, 23 are P-type isolation layers doped with materials such as boron.

如图10~图14所示,本实施例的平面倒装LED集成芯片的制造方法包括以下步骤:As shown in Figures 10 to 14, the manufacturing method of the planar flip-chip LED integrated chip of this embodiment includes the following steps:

(a)形成隔离层II:将所述硅衬底2的上表面在氧化炉管内热氧化生长出厚度为3000埃的氧化层,所述氧化层的厚度范围可控制在1000~5000埃,在光刻机上利用扩散光刻掩模版进行光刻,再用含HF的腐蚀液对氧化层进行蚀刻,去除光刻图形部分内的氧化层,剩余的氧化层构成所述隔离层II 5,此步骤最后形成的剖面图如图10所示;(a) Forming the isolation layer II: the upper surface of the silicon substrate 2 is thermally oxidized in an oxidation furnace tube to grow an oxide layer with a thickness of 3000 angstroms, and the thickness of the oxide layer can be controlled in the range of 1000 to 5000 angstroms. On the lithography machine, the diffusion photolithography mask is used for photolithography, and then the oxide layer is etched with HF-containing etching solution to remove the oxide layer in the photolithography pattern part, and the remaining oxide layer constitutes the isolation layer II5. This step The resulting profile is shown in Figure 10;

(b)形成隔离层I:在高温扩散炉中热扩散形成极性与所述硅衬底2极性相反的所述隔离层I 22、23,所述隔离层I 22、23将使LED两个电极处于隔离状态,避免短路、漏电击穿,同时又使所述LED裸芯片1能够通过硅片散热,当然,此步骤也用离子注入法将与所述硅衬底2极性相反的离子注入所述硅衬底2,再在高温下驱入所述硅衬底2,形成若干个所述隔离层I 22、23,此步骤最后形成的剖面图如图11所示;(b) Forming the isolation layer 1: the isolation layer 1 22, 23 whose polarity is opposite to that of the silicon substrate 2 is formed by thermal diffusion in a high-temperature diffusion furnace, and the isolation layer 1 22, 23 will make the LED two Each electrode is in an isolated state to avoid short circuit and leakage breakdown, and at the same time, the LED bare chip 1 can dissipate heat through the silicon chip. Inject the silicon substrate 2, then drive into the silicon substrate 2 at high temperature to form several isolation layers 122, 23, the final cross-sectional view of this step is as shown in Figure 11;

(c)形成金属层:以溅射或蒸镀的方法沉积厚度为12000埃的金属层,所述金属层的厚度范围可控制在5000~40000埃,然后在光刻机上利用金属光刻掩模版进行光刻,再用半导体工艺习用的干法蚀刻工艺对金属层进行蚀刻,当然,也可以采用湿法蚀刻对金属层进行蚀刻,蚀刻后剩余的金属层构成并联连接的所述金属层32、33及阳极接点80和阴极接点81,此步骤最后形成的剖面图如图12所示;(c) Forming a metal layer: deposit a metal layer with a thickness of 12000 angstroms by sputtering or evaporation, the thickness of the metal layer can be controlled in the range of 5000 to 40000 angstroms, and then use a metal photolithography mask on the photolithography machine Perform photolithography, and then use the dry etching process commonly used in semiconductor technology to etch the metal layer. Of course, wet etching can also be used to etch the metal layer. The remaining metal layer after etching constitutes the metal layer 32, which is connected in parallel. 33 and the anode contact 80 and the cathode contact 81, the final cross-sectional view of this step is as shown in Figure 12;

(d)形成保护层:用化学气相沉积法沉积厚度为12000埃的二氧化硅保护层,所述二氧化硅保护层的厚度范围可控制在8000~15000埃,所述二氧化硅保护层也可以采用氮化硅保护层替代,然后在光刻机上利用护层光刻掩模版进行光刻,再用含HF的腐蚀液对二氧化硅进行蚀刻或对氮化硅用干法进行蚀刻,使保护层出现用于植焊球的开口,此步骤最后形成的剖面图如图13所示;(d) Forming a protective layer: depositing a silicon dioxide protective layer with a thickness of 12000 angstroms by chemical vapor deposition, the thickness range of the silicon dioxide protective layer can be controlled at 8000 to 15000 angstroms, and the silicon dioxide protective layer is also It can be replaced by a silicon nitride protective layer, and then photolithography is carried out on a photolithography machine using a protective layer photolithography mask, and then silicon dioxide is etched with an etching solution containing HF or silicon nitride is etched by a dry method, so that The protective layer has openings for planting solder balls, and the final cross-sectional view of this step is shown in Figure 13;

(d′)形成散热层:用金属溅射或蒸镀的方法沉积一层铝金属层或包含钛、镍、银等材料的多层金属层于所述硅衬底2的背面,形成所述散热层7,此步骤最后形成的剖面图如图14所示;(d') Form heat dissipation layer: deposit a layer of aluminum metal layer or a multilayer metal layer containing titanium, nickel, silver and other materials on the back side of the silicon substrate 2 by metal sputtering or vapor deposition to form the The heat dissipation layer 7, the cross-sectional view formed at the end of this step is shown in Figure 14;

(e)LED裸芯片封倒装:植金球栓于保护层的开口内,再通过超声键合将各所述LED裸芯片1倒装在金球栓上,当然金球栓也可以采用铜球栓或锡球,当采用锡球时,需通过回流焊将若干个所述LED裸芯片1倒装在锡球上,此步骤最后形成的剖面图如图15所示。(e) LED bare chip packaging and flip-chip: plant gold ball plugs in the openings of the protective layer, and then flip-chip each of the LED bare chips 1 on the gold ball plugs by ultrasonic bonding. Of course, the gold ball plugs can also be made of copper. For ball plugs or solder balls, when solder balls are used, it is necessary to flip-chip several LED bare chips 1 on the solder balls by reflow soldering. The final cross-sectional view of this step is shown in FIG. 15 .

实施例二:Embodiment two:

如图3、图4、图9所示,本实施例与实施例一的不同之处在于:各所述LED裸芯片1之间通过所述金属层32、33的连接方式——本实施例各所述LED裸芯片1之间相串联连接,即所述阳极接点80和所述阴极接点81之间的所有LED裸芯片1相串联。As shown in Fig. 3, Fig. 4 and Fig. 9, the difference between this embodiment and Embodiment 1 lies in: the connection mode between the LED bare chips 1 through the metal layers 32, 33—this embodiment The LED bare chips 1 are connected in series, that is, all the LED bare chips 1 between the anode contact 80 and the cathode contact 81 are connected in series.

本实施例其余特征与实施例一相同。The remaining features of this embodiment are the same as those of Embodiment 1.

实施例三:Embodiment three:

如图5、图6、图9所示,本实施例与实施例一的不同之处在于:各所述LED裸芯片1之间通过所述金属层32、33的连接方式——本实施例各所述LED裸芯片1之间先每三个串联成一组,再将三组相并联连接。As shown in Fig. 5, Fig. 6 and Fig. 9, the difference between this embodiment and Embodiment 1 lies in: the connection mode between the LED bare chips 1 through the metal layers 32, 33—this embodiment Each of the LED bare chips 1 is connected in series every three groups, and then the three groups are connected in parallel.

本实施例其余特征与实施例一相同。The remaining features of this embodiment are the same as those of Embodiment 1.

实施例四:Embodiment four:

如图7、图8、图9所示,本实施例与实施例一的不同之处在于:各所述LED裸芯片1之间通过所述金属层32、33的连接方式——本实施例各所述LED裸芯片1之间先每三个并联成一组,再将三组相串联连接。As shown in Fig. 7, Fig. 8, and Fig. 9, the difference between this embodiment and Embodiment 1 lies in: the connection mode between the LED bare chips 1 through the metal layers 32, 33—this embodiment Each of the LED bare chips 1 is connected in parallel every three to form a group, and then the three groups are connected in series.

本实施例其余特征与实施例一相同。The remaining features of this embodiment are the same as those of Embodiment 1.

本发明平面倒装LED集成芯片所述LED裸芯片1的数量不限于九个,实施例中仅是举例说明。The number of LED bare chips 1 described in the planar flip-chip LED integrated chip of the present invention is not limited to nine, and the embodiment is only for illustration.

本发明将若干个所述LED裸芯片1集成在一个所述硅衬底2上,散热效果好、使用寿命长,提高了发光效率,成本低,易于实现多芯片集成。The present invention integrates several LED bare chips 1 on one silicon substrate 2, which has good heat dissipation effect, long service life, improved luminous efficiency, low cost and easy realization of multi-chip integration.

本发明可广泛应用于LED领域。The invention can be widely used in the LED field.

Claims (8)

1、一种平面倒装LED集成芯片,包括若干个LED裸芯片(1)和硅衬底(2),所述LED裸芯片(1)包括衬底(10)和N型外延层(11)、P型外延层(12),所述硅衬底(2)顶面于每个所述LED裸芯片(1)处有两个分离的沉积金属层(32、33),所述P型外延层(12)、所述N型外延层(11)分别通过焊球(40、41)倒装焊接在所述金属层(32、33)上,其特征在于:所述金属层(32、33)与所述硅衬底(2)的结合区分别还有一个掺杂的隔离层I(22、23),各所述LED裸芯片(1)对应的所述金属层(32、33)与所述硅衬底(2)之间设有隔离层II(5),若干个所述LED裸芯片(1)之间通过所述金属层(32、33)相连接并引出阳极接点(80)和阴极接点(81)。1. A planar flip-chip LED integrated chip, comprising several LED bare chips (1) and a silicon substrate (2), the LED bare chip (1) including a substrate (10) and an N-type epitaxial layer (11) , P-type epitaxial layer (12), the top surface of the silicon substrate (2) has two separate deposited metal layers (32, 33) at each of the LED bare chips (1), the P-type epitaxial layer The layer (12) and the N-type epitaxial layer (11) are respectively flip-chip welded on the metal layers (32, 33) through solder balls (40, 41), and it is characterized in that: the metal layers (32, 33 ) and the silicon substrate (2) respectively have a doped isolation layer I (22, 23), the metal layers (32, 33) corresponding to each of the LED bare chips (1) and An isolation layer II (5) is provided between the silicon substrates (2), and several LED bare chips (1) are connected through the metal layers (32, 33) and anode contacts (80) are drawn out and cathode contact (81). 2、根据权利要求1所述的平面倒装LED集成芯片,其特征在于:若干个所述LED裸芯片(1)之间并联或串联或串并联组合连接。2. The planar flip-chip LED integrated chip according to claim 1, characterized in that: several LED bare chips (1) are connected in parallel or in series or in combination. 3、根据权利要求1所述的平面倒装LED集成芯片,其特征在于:它还包括保护层(6),所述保护层(6)覆盖于所述金属层(32、33)外表面。3. The planar flip-chip LED integrated chip according to claim 1, characterized in that it further comprises a protective layer (6), and the protective layer (6) covers the outer surfaces of the metal layers (32, 33). 4、根据权利要求1或2或3所述的平面倒装LED集成芯片,其特征在于:所述硅衬底(2)的背面还有一层或多层金属构成的散热层(7)。4. The planar flip-chip LED integrated chip according to claim 1, 2 or 3, characterized in that there is a heat dissipation layer (7) made of one or more layers of metal on the back of the silicon substrate (2). 5、根据权利要求1或2或3所述的平面倒装LED集成芯片,其特征在于:所述金属层(32、33)的外表面为反光面。5. The planar flip-chip LED integrated chip according to claim 1, 2 or 3, characterized in that: the outer surface of the metal layer (32, 33) is a reflective surface. 6、根据权利要求1或2或3所述的平面倒装LED集成芯片,其特征在于:所述硅衬底(2)为P型或N型,所述隔离层I(22、23)与所述硅衬底(2)极性相反,所述焊球(40、41)为金球栓或铜球栓或锡球,所述金属层(32、33)为铝或铜或硅铝合金。6. The planar flip-chip LED integrated chip according to claim 1, 2 or 3, characterized in that: the silicon substrate (2) is P-type or N-type, and the isolation layers I (22, 23) and The polarity of the silicon substrate (2) is opposite, the solder balls (40, 41) are gold ball plugs or copper ball plugs or tin balls, and the metal layers (32, 33) are aluminum or copper or silicon aluminum alloy . 7、一种用于制造权利要求1所述的平面倒装LED集成芯片的方法,其特征在于:包括以下步骤:7. A method for manufacturing the planar flip-chip LED integrated chip according to claim 1, characterized in that it comprises the following steps: (a)形成隔离层II:将所述硅衬底(2)的上表面在氧化炉管内热氧化生长出氧化层,在光刻机上利用扩散光刻掩模版进行光刻,再用含HF的腐蚀液对氧化层进行蚀刻,去除光刻图形部分内的氧化层,剩余的氧化层构成所述隔离层II(5);(a) Form isolation layer II: thermally oxidize and grow an oxide layer on the upper surface of the silicon substrate (2) in an oxidation furnace tube, perform photolithography on a photolithography machine using a diffusion photolithography mask, and then use HF-containing The etching solution etches the oxide layer to remove the oxide layer in the photolithographic pattern, and the remaining oxide layer forms the isolation layer II (5); (b)形成隔离层I:在高温扩散炉中热扩散形成若干个极性与所述硅衬底(2)极性相反的所述隔离层I(22、23),或者,用离子注入法将与所述硅衬底(2)极性相反的离子注入所述硅衬底(2),再在高温下驱入所述硅衬底(2),形成若干个所述隔离层I(22、23);(b) Form the isolation layer I: heat diffusion in a high-temperature diffusion furnace to form several isolation layers I (22, 23) whose polarity is opposite to that of the silicon substrate (2), or, use ion implantation Implanting ions with a polarity opposite to that of the silicon substrate (2) into the silicon substrate (2), and driving into the silicon substrate (2) at high temperature to form several isolation layers I (22 ,twenty three); (c)形成金属层:以溅射或蒸镀的方法沉积金属层,然后在光刻机上利用金属光刻掩模版进行光刻,再用湿法或干法蚀刻工艺对金属层进行蚀刻,蚀刻后剩余的金属层构成串联或并联或串并联组合连接的所述金属层(32、33)及阳极接点(80)和阴极接点(81);(c) Form a metal layer: deposit a metal layer by sputtering or vapor deposition, then use a metal photolithography mask to perform photolithography on a photolithography machine, and then use a wet or dry etching process to etch the metal layer. The remaining metal layers constitute the metal layers (32, 33) connected in series or in parallel or combined series and parallel, and the anode contact (80) and cathode contact (81); (d)形成保护层:用化学气相沉积法沉积二氧化硅或氮化硅保护层,然后在光刻机上利用护层光刻掩模版进行光刻,再用含HF的腐蚀液对二氧化硅进行蚀刻或对氮化硅用干法进行蚀刻,使保护层出现用于植焊球的开口;(d) Forming a protective layer: Deposit a silicon dioxide or silicon nitride protective layer by chemical vapor deposition, then use a protective layer photolithography mask to perform photolithography on a photolithography machine, and then use a HF-containing etching solution to treat the silicon dioxide Etching or dry etching of silicon nitride, so that the protective layer has openings for planting solder balls; (e)LED裸芯片封装:植金球栓或铜球栓或锡球于保护层的开口内,再通过超声键合或回流焊将若干个所述LED裸芯片(1)倒装在金球栓或铜球栓或锡球上。(e) LED bare chip packaging: plant gold ball plugs or copper ball plugs or tin balls in the opening of the protective layer, and then flip several of the LED bare chips (1) on the gold balls by ultrasonic bonding or reflow soldering Bolt or copper ball bolt or tin ball. 8、根据权利要求7所述的平面倒装LED集成芯片的方法,其特征在于:步骤(d)与步骤(e)之间还包括以下步骤:8. The method of planar flip-chip LED integrated chip according to claim 7, characterized in that: between step (d) and step (e), the following steps are further included: (d′)形成散热层:用金属溅射或蒸镀的方法沉积一层铝金属层或包含钛、镍、银等材料的多层金属层于所述硅衬底(2)的背面,形成所述散热层(7)。(d') Forming a heat dissipation layer: depositing a layer of aluminum metal layer or a multi-layer metal layer containing titanium, nickel, silver and other materials on the back side of the silicon substrate (2) by metal sputtering or vapor deposition to form The heat dissipation layer (7).
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