CN1979198B - Detecting system and method for input/output board - Google Patents

Abstract

The present invention provides a test system of an input/output board, the system includes: a computer, used to provide a control signal for testing the input/output board to be tested; a test fixture, used to combine the computer with the connected to the I/O board under test; the computer includes a test module for testing the EEPROM chip in the I/O board. The invention also provides a testing method of the input/output board. According to the characteristics of the product to be tested, the invention cooperates with a special test fixture to test the product to be tested, and the test cost is low, and the operation is simple and practical.

Description

Test system and method for input/output board

【Technical field】

The invention relates to a testing system and method of a printed circuit assembly board, in particular to a testing system and method of an input/output board.

【Background technique】

A blade server is a new type of high-density server, which consists of multiple independent processing components. These processing components are thin and hot-swappable, so people call this server a "blade server". Blade servers are being rapidly applied in current enterprise data centers. Compared with traditional rack-mounted installations, blade servers can greatly reduce rack space, power consumption, and management costs.

The input/output board used in the blade server is a Printed Circuit Board Assembly (PCBA) board, which is used to provide several ports for the blade server, such as USB port, optical drive port, floppy drive port, etc. Some indication information, such as information error, high pressure alarm, etc. The PCBA board is based on the circuit design, draws the electrical wiring connecting the circuit parts into a wiring pattern, and then uses the mechanical processing and surface treatment specified by the design to reproduce the electrical conductor on the insulator to form a circuit board. required equipment elements.

Since the quality of the input/output board produced by the production line may be unqualified for some reasons, it needs to be tested to ensure its quality. In the previous test method, the input/output board produced by the production line is often directly installed into the blade server, and then the function is checked through related operations. In this way, when testing in large quantities, all The above-mentioned blade server is easy to be damaged, which virtually increases the test cost, and the test process is completely controlled by the testers, which is very inefficient and increases the labor cost.

【Content of invention】

In view of the above, it is necessary to provide an I/O board testing system, which uses a control signal provided by a computer to test whether the I/O board and its connected equipment components are functioning normally through a test fixture.

In view of the above, it is also necessary to provide a testing method for an I/O board, which utilizes a control signal provided by a computer to test whether the I/O board and its connected equipment components function normally through a test fixture.

A test system for an input/output board. The system includes: a computer, which is used to provide a control signal for testing to the input/output board to be tested; a test fixture, which is used to connect the computer with the input/output board to be tested; the computer includes A test module is used for testing the EEPROM chip in the I/O board.

Further, the control signal includes: a universal serial bus signal, a printer port signal and an internal integrated circuit bus signal.

Further, the computer includes a printer port, a full system management bus and a universal serial bus port.

Further, the test fixture includes a universal serial bus port, a system-wide management bus port, a printer port, a power port and an input/output board connection port, which are respectively connected to the universal port in the computer through a cable. The serial bus port, the whole system management bus port, the printer port, the power port and the input/output board are connected to convert the control signal in the computer into the signal corresponding to the input/output board.

Further, the test module is also used to test the optical drive, floppy drive, U disk connected to the input/output board and the light-emitting diode indicator light on the input/output board.

A method for testing an input/output board, the method for testing the input/output board comprises the following steps: (a) modifying the port mode of a computer and setting the test; (b) connecting the computer with the input to be tested through a test fixture /output board; (c) the computer utilizes the print port control signal to detect the state to be tested of the input/output board; (d) utilizes the print port control signal of the computer to open the power supply of the internal integrated circuit bus device of the input/output board , so that the internal integrated circuit bus is in working condition; (e) select the data transmission circuit one by one to carry out the test of the input/output board; Erases the programmable read-only memory chip.

Further, the step of testing the EEPROM chip includes: (f1) reading standard EEPROM chip data; (f2) reading the standard EEPROM chip data; Erase the PROM chip data and modify; (f3) read the data recorded by the EEPROM chip to be tested; (f4) convert the revised standard EEPROM The chip data is compared with the data recorded by the EEPROM chip to determine whether they are the same.

Compared with the prior art, the test system and method of the input/output board utilize the special functions such as the internal integrated circuit bus and the print port provided by the industrial control PC (Personal Computer), and directly draw the data corresponding to the product to be tested from the PC. General serial, internal integration and other bus signals and control signals control the product to be tested, and then use special fixtures and software to perform functional tests on the product to be tested. The test cost is low, and the operation is simple and practical.

【Description of drawings】

FIG. 1 is a hardware architecture diagram of a preferred embodiment of the testing system of the I/O board of the present invention.

Fig. 2 is a sub-function block diagram of the test module of the present invention.

Fig. 3 is a flow chart of the preferred embodiment of the testing method for the I/O board of the present invention.

FIG. 4 is a flow chart of testing an EEPROM chip in a preferred embodiment of the testing method for the I/O board of the present invention.

【Detailed ways】

For ease of understanding, the technical terms involved in the present invention are explained as follows:

EEPROM: Electrically Erasable & Programmable ROM, Electrically Erasable Programmable Read-Only Memory;

LPT: print port;

I2C Bus: Inter-Integrated Circuit Bus, internal integrated circuit bus;

SMBus: System Management Bus, the whole system management bus, is a subset of I2C Bus;

SFC: Shopping Floor Control, a production management server;

USB: Universal Serial Bus, Universal Serial Bus;

LED: Light-emitting Diode, light-emitting diode;

PCB: Printed Circuit Board, printed circuit board.

Referring to shown in Fig. 1, be the hardware architecture diagram of the preferred embodiment of the test system of input/output board of the present invention, this hardware architecture comprises: a computer 1, a test fixture 2, an input/output board 3 to be tested and an SFC server 4 . Wherein, the computer 1 is used to provide control signals to the input/output board 3 to be tested, and the test result is displayed through a display screen (not shown); The board 3 is connected, and one side of the test fixture 2 is connected to each port of the computer 1, and the other side is connected to the input/output board 3 to be tested, and the control signal in the computer 1 is transmitted to the input/output to be tested. In board 3; SFC server 4 is to link to each other with computer 1 by a LAN adapter 14, is used for storing standard EEPROM chip data, detects the route of product, to determine whether this input/output board 3 to be tested has finished testing, and will The test results are imported into the database of the SFC server 4 .

Wherein, described computer 1 comprises: at least one USB port 10, is used for providing USB signal, to read the data storage device connected on the input/output board 3 to be tested, as optical drive 41, floppy drive 43, U disk 42 etc.; One SMBus 11 is used to provide the I2C signal to the input/output board 3 to be tested, and is used to control the I2C equipment on the input/output board 3 to be tested, such as the built-in chip 30, LED indicator light 34, etc. of the input/output board, the The built-in chip 30 of the input/output board includes a pressure sensor chip, an EEPROM chip, etc.; an LPT 12 is used to provide a control signal for controlling the input/output board 3 to be tested, such as detecting the input/output board 3 to be tested. Existence, open the I2C device power supply of the input/output board 3 to be tested; a power supply 13 is used to provide power to the input/output board 3 to be tested, and the optimum value of this power supply is 12V; the LAN adapter 14 is used to connect SFC server 4; a test module 15, used for functional testing of the input/output board 3 to be tested. In this embodiment, the test of the EEPROM chip is taken as an example to describe the test of the built-in chip 30 of the I/O board.

Wherein, the test fixture 2 adopts a 4-layer PCB design, which includes a USB port, an SMBus port, an LPT, a power port and an input/output board connection port, respectively connected to the computer 1 through a cable. USB port 10, SMBus port 11, LPT 12, power supply port 13 and input/output board 3 are connected, so that the control signal in the computer 1 is converted into the corresponding signal of input/output board 3.

Wherein, the components that need to be tested included in the input/output board 3 to be tested include: EEPROM chip, which is used to record the data of the input/output board 3, and this data includes identification data (such as: production date, manufacturer's name, etc.), parameter Data (such as: the burning data of hardware) etc., when the data of the input/output board 3 of record goes wrong, can make corresponding indicator light flicker to propose system error warning; A CD-ROM port 31, is used to connect described CD-ROM 41; a USB port 32 for connecting the U disk 42; and a floppy drive port 33 for connecting the floppy drive 43; and five LED indicator lights 34, the LED indicator lights 34 include: power indicator light, system Error indicator lights, etc., are used to prompt the power status and system error information. For example, when the power is turned on, the power indicator light will remain on, and when the system fails, the corresponding indicator light will flash to remind the operator.

Referring to Fig. 2, it is a sub-function block diagram of the test module of the present invention. This test module 15 comprises an acquisition submodule 151, is used to obtain the control signal of computer 1, comprises USB signal, I2C Bus signal and LPT control signal etc.; A test submodule 152, is used for utilizing described acquisition submodule 151 to obtain The control signals of the input/output board 3 and the equipment components connected thereto carry out functional tests, wherein the equipment components to be tested include the EEPROM chip, the optical drive 41, the U disk 42, the floppy drive 43 and the Described LED indicator light 34; And a judging submodule 153, is used for judging whether input/output board 3 and the device component function that it is connected are normal; A storage submodule 154, is used for test result is stored in the SFC server 4; And a result reporting sub-module 155 for reporting test results.

Further, the judging sub-module 153 is also used to judge whether all channels have been selected, judge whether confirmation information is obtained from the SFC server 4, and judge whether the standard EEPROM chip data is the same as the data recorded by the current EEPROM chip.

Wherein, the channel refers to a circuit for data transmission between various devices, which is divided into an A channel and a B channel. The A channel has the same function as the B channel, and they work independently. At a specific moment, only one channel is working, and the other channel is used as a backup channel. When a channel fails, the system will automatically switch to another channel. for data transfer.

Referring to FIG. 3 , it is a flow chart of a preferred embodiment of the testing method of the I/O board of the present invention. Before the test, the operations that the user needs to perform include: modify the printer port mode in the BIOS (Basic Input Output System) menu to: EPP1. The CD-ROM runs automatically. In step S10, the user uses cables to connect the related equipment of the test, including connecting the computer 1 with the test fixture 2, connecting the test fixture 2 with the input/output board 3, and connecting the input/output board 3 Each port on the computer is connected to related equipment, including optical drive 41, floppy drive 43 and U disk 42 and so on. In step S11, the computer 1 communicates with the SFC server 4 through the network, and the user transmits the serial number of the input/output board 3 to be tested to the SFC server 4, and accepts the product route detection to determine whether the product has completed the test. test, then replace the next I/O board 3 for testing; in step S12, the computer 1 detects whether the I/O board 3 to be tested exists by the LPT control signal, that is, the computer 1 detects the I/O board to be tested by the LPT control signal The pin of 3 is in high level or low level (this embodiment sets high level to represent the existence of input/output board 3 to be tested), if does not exist, then end flow process, if exists, then in step S13, computer 1. Utilize the LPT control signal to open the power supply of the I2C device of the input/output board 3 to be tested, so that the I2C Bus is in a working state, and the I2C device includes a built-in chip 30 of the input/output board, an LED indicator light 34, etc.; in step S14 Among them, select a channel. This channel refers to the circuit for data transmission between various devices. It is divided into A channel or B channel. The A channel and B channel have the same function and work independently. At a specific moment, Only one channel is working, and the other channel is used as a backup channel, and when a channel fails, the system will automatically switch to another channel for data transmission; in step S15, the acquisition submodule 151 acquires the access USB device of the computer 1 signal and sent to the test sub-module 152, the optical drive 41, floppy drive 43 and U disk 42 connected to the input/output board 3 to be tested are functionally tested. In this step, the test sub-module 152 will automatically detect the optical drive 41, floppy drive 43 and Whether the U disk 42 exists, and read and write data therein and verify the correctness of the data, and open and close the door of the optical drive 41 for judging whether the submodule 153 judges whether its function is good; in step S16, the submodule 151 obtains the computer 1 and send the I2C signal to the test sub-module 152 to test the EEPROM chip. During the test, the I2C signal is used to obtain standard EEPROM chip data from the SFC server 4, and read the data according to the I2C address and I2C protocol of the current EEPROM chip. Get the data recorded by the EEPROM chip in the current I/O board 3, the I2C protocol specifies hardware access standards, reading methods, etc.; again in step S17, the test submodule 152 utilizes the I2C signal obtained to test the LED Indicator light 34, in the process of this test, test submodule 152 at first tests the indicator light of control power supply, if power supply light keeps the state of light on when powering on, then judging submodule 153 judges that its function is good, otherwise judges that its function is abnormal , when the test submodule 152 tests the remaining four lamps, if its flickering and extinguishing conditions are good, then the judging submodule 153 determines that its function is normal, otherwise its function is abnormal; in step S18, the judging submodule 153 judges whether all channels are selected Complete; if all channels have been selected, then in step S19, the measured The test result is saved in a log file in the computer 1; in step S20, the test result is sent to the SFC server 4; in step S21, the judging submodule 153 judges whether to obtain confirmation information from the SFC server 4 to confirm Whether the storage submodule 154 has stored the test results in the database of the SFC server 4; if the storage submodule 154 has stored the test results in the SFC server 4, then in step S22, the result report submodule 155 displays the test results.

Further, in step S18, if there is a channel that has not been selected, go to step S14 and continue to select a channel for testing.

Further, in step S21, if the confirmation information from the SFC server 4 is not obtained, the network connection error message is displayed in step S23, and the test result is displayed by the result reporting sub-module 155 in step S22.

Referring to FIG. 4 , it is a flow chart of testing the EEPROM chip in a preferred embodiment of the testing method for the I/O board of the present invention. In step S160, obtain submodule 151 to obtain standard EEPROM chip data from SFC server 4; In step S161, test submodule 152 revises the variable data in the standard EEPROM chip data that obtains, makes variable data and current input/ Corresponding to the output board 3, the variable data is not fixed, and the variable data corresponding to different input/output boards 3 is different, for example: the serial number of the input/output board 3, the programming time of the hardware, etc.; in step S162, Obtain submodule 151 according to the I2C address of current EEPROM chip and the I2C protocol to read the data recorded by the EEPROM chip in the current input/output board 3; The data recorded by the EEPROM chip in the /output board 3 is compared to judge whether the two are the same; if the data recorded by the EEPROM chip in the standard EEPROM chip after modification is identical with the data recorded by the EEPROM chip in the current input/output board 3, then in step S165 , the judging sub-module 153 judges that the function of the EEPROM chip is normal; otherwise, in step S164, the judging sub-module 153 judges that the function of the EEPROM chip is abnormal.

Claims (10)

1. the test macro of an input/output board is characterized in that, this system comprises:

One computing machine is used for providing the control signal of testing to input/output board to be measured;

One measurement jig is used for this computing machine and this input/output board to be measured are coupled together;

Described computing machine comprises a test module, and this test module comprises:

Obtain submodule, be used to obtain standard electric Erasable Programmable Read Only Memory EPROM chip data;

The test submodule is used for the variable data of the standard electric Erasable Programmable Read Only Memory EPROM chip data that obtains is made amendment, and makes variable data corresponding with input/output board to be measured;

Judge submodule, be used for the data of the Electrically Erasable Read Only Memory chip of amended standard electric Erasable Programmable Read Only Memory EPROM chip data and input/output board to be measured record are compared, and judge according to comparison result whether the Electrically Erasable Read Only Memory chip functions in the input/output board to be measured is normal.

2. the test macro of input/output board as claimed in claim 1 is characterized in that, described control signal comprises: universal serial bus signal, LPT signal and internal integrated circuit bus signal.

3. the test macro of input/output board as claimed in claim 1 is characterized in that, described computing machine comprises a LPT, a System Management Bus and a USB (universal serial bus) port.

4. the test macro of input/output board as claimed in claim 3, it is characterized in that, described measurement jig comprises a USB (universal serial bus) port, a System Management Bus port, a LPT, a power port and an input/output board connectivity port, be connected with USB (universal serial bus) port, System Management Bus port, LPT, power port and input/output board in the computing machine by a cable respectively, the control signal in the computing machine is converted to the pairing signal of input/output board.

5. the test macro of input/output board as claimed in claim 1 is characterized in that, described test module also is used to test the light emitting diode lamp on CD-ROM drive, floppy drive, USB flash disk and this input/output board that is connected with this input/output board.

6. the method for testing of an input/output board is characterized in that, the method for testing of this input/output board may further comprise the steps:

One computing machine is carried out port mode to be revised and test setting;

Connect this computing machine and input/output board to be measured by a measurement jig;

The LPT control signal of utilizing this computing machine detects the state to be measured of this input/output board;

Utilize the LPT control signal of this computing machine to open the power supply of the internal integrate circuit bus equipment of this input/output board, make this internal integrate circuit bus in running order;

Select data transmission circuit to carry out the test of this input/output board one by one;

The internal integrated circuit bus signal of obtaining computing machine is tested the Electrically Erasable Read Only Memory chip in this input/output board.

7. the method for testing of input/output board as claimed in claim 6 is characterized in that, the step of described test Electrically Erasable Read Only Memory chip comprises:

Read the Electrically Erasable Read Only Memory chip data of standard;

The standard electric Erasable Programmable Read Only Memory EPROM chip data that reads is made amendment;

Read the data of Electrically Erasable Read Only Memory chip record to be measured;

The data of amended standard electric Erasable Programmable Read Only Memory EPROM chip data and Electrically Erasable Read Only Memory chip to be measured record are compared, judge whether identical.

8. the method for testing of input/output board as claimed in claim 6 is characterized in that, describedly this computing machine is carried out port mode is revised and the step of test setting comprises:

In the Basic Input or Output System (BIOS) menu, revise the LPT pattern;

Forbid this computing machine installation floppy drive and CD-ROM drive, and forbid that the data storage device of this computing machine moves automatically.

9. the method for testing of input/output board as claimed in claim 6 is characterized in that, described computing machine comprises a LPT, a System Management Bus and a USB (universal serial bus) port.

10. the method for testing of input/output board as claimed in claim 9, it is characterized in that, described measurement jig comprises a USB (universal serial bus) port, a System Management Bus port, a LPT, a power port and an input/output board connectivity port, be connected with USB (universal serial bus) port, System Management Bus port, LPT, power port and input/output board in the computing machine by a cable respectively, the control signal in the computing machine is converted to the pairing signal of input/output board.

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