CN1945861A - Light emitting diode chip - Google Patents
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- CN1945861A CN1945861A CNA2005101082118A CN200510108211A CN1945861A CN 1945861 A CN1945861 A CN 1945861A CN A2005101082118 A CNA2005101082118 A CN A2005101082118A CN 200510108211 A CN200510108211 A CN 200510108211A CN 1945861 A CN1945861 A CN 1945861A
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Abstract
Description
技术领域technical field
本发明涉及一种发光二极管芯片(light-emitting diode chip),且特别涉及一种具有静电放电防护功能(electro static discharge protection)的发光二极管芯片。The present invention relates to a light-emitting diode chip (light-emitting diode chip), and in particular to a light-emitting diode chip with electrostatic discharge protection function (electro static discharge protection).
背景技术Background technique
近年来,发光二极管元件可说是非常广泛地被使用,一般常应用于交通灯号(红绿灯)、大型的显示看板或者作为平面显示器的光源。为了防止发光二极管遭受静电放电破坏,常见的解决方法是利用额外的二极管(例如是齐纳二极管)与发光二极管反相并联。当静电放电现象产生时,静电的高压特性会使得用以防止静电的二极管在其击穿电压(breakdownvoltage)区操作,此时,与发光二极管反相并联的二极管便可以有效避免发光二极管被静电所破坏。In recent years, light-emitting diode elements can be said to be widely used, and are generally used in traffic lights (traffic lights), large-scale display boards, or as light sources for flat-panel displays. In order to prevent the LED from being damaged by ESD, a common solution is to use an additional diode (such as a Zener diode) in anti-parallel connection with the LED. When electrostatic discharge occurs, the high-voltage characteristics of static electricity will cause the diode used to prevent static electricity to operate in its breakdown voltage (breakdown voltage) region. At this time, the diode connected in anti-parallel with the light-emitting diode can effectively prevent the light-emitting diode from being charged by static electricity. destroy.
图1A为公知的覆晶封装的发光二极管芯片示意图,而图1B为图1A中覆晶封装的电路示意图。请同时参考图1A与图1B,公知的覆晶封装的发光二极管芯片100包括发光二极管110与二极管120。其中,发光二极管110包括基板112、N型掺杂半导体层114、活性层116、P型掺杂半导体层118、透明导电层119、电极1与电极2。上述N型掺杂半导体层114设置于基板112上,而活性层116设置于N型掺杂半导体层114与P型掺杂半导体层118之间。此外,电极1与透明导电层119设置于P型掺杂半导体层118上,而电极2设置于N型掺杂半导体层114上。FIG. 1A is a schematic diagram of a known flip-chip packaged LED chip, and FIG. 1B is a schematic circuit diagram of the flip-chip package in FIG. 1A . Please refer to FIG. 1A and FIG. 1B at the same time. A known flip-
另外,前述二极管120包括N型掺杂区122与P型掺杂区124,而发光二极管110通过焊锡W1与W2分别接合于二极管120上的N型掺杂区122与P型掺杂区124。换言之,发光二极管110与二极管120反相并联(如图1B所示),且发光二极管110的电极1与二极管120中的N型掺杂区122连接至工作电压V1,而发光二极管110的电极2与二极管120中的P型掺杂区124连接至工作电压V2。In addition, the
当静电放电现象产生时,静电的高压特性会使得二极管120在其击穿电压(breakdown voltage)区操作,此时,静电荷会通过二极管120,而不会通过发光二极管110。如此一来,静电荷会被二极管120所消耗并从发光二极管芯片100中被导出,因此,二极管120便可以有效地保护发光二极管110免于遭受静电破坏。When electrostatic discharge occurs, the high voltage characteristic of static electricity will make the
上述覆晶封装的发光二极管芯片100在制造上需利用额外的基板以制造出二极管120,然后,再将两者(发光二极管110与二极管120)利用焊锡W1与W2来接合。因此,在工艺上需要较高的成本。The
图2A为另一种公知的发光二极管芯片示意图,而图2B为图2A中发光二极管芯片的电路示意图。请同时参考图2A与图2B,公知的发光二极管芯片200包括基板210、非故意掺杂层(unintentionally-doped layer)220、N型掺杂半导体层230、活性层240、P型掺杂半导体层250、透明导电层251、第一金属层260、第一氧化层261、第二金属层270、第二氧化层271、电极3与电极4。FIG. 2A is a schematic diagram of another known light emitting diode chip, and FIG. 2B is a schematic circuit diagram of the light emitting diode chip in FIG. 2A . Please refer to FIG. 2A and FIG. 2B at the same time. The known light-emitting diode chip 200 includes a substrate 210, an unintentionally-doped layer (unintentionally-doped layer) 220, an N-type doped semiconductor layer 230, an active layer 240, and a P-type doped semiconductor layer. 250 , transparent conductive layer 251 , first metal layer 260 , first oxide layer 261 , second metal layer 270 , second oxide layer 271 , electrode 3 and electrode 4 .
上述非故意掺杂层220设置于基板210上,而N型掺杂半导体层230设置于非故意掺杂层220上。此外,活性层240设置于P型掺杂半导体层250与N型掺杂半导体层230之间,而电极3与透明导电层251设置于P型掺杂半导体层250上。此外,电极4设置于N型掺杂半导体层230上。值得留意的是,电极3通过接触窗H1中的第一金属层260与非故意掺杂层220连接,而第一氧化层261设置于接触窗H1内,此第一氧化层261可使第一金属层260与其它膜层(N型掺杂半导体层230、活性层240与P型掺杂半导体层250)电绝缘。The above-mentioned unintentionally doped layer 220 is disposed on the substrate 210 , and the N-type doped semiconductor layer 230 is disposed on the unintentionally doped layer 220 . In addition, the active layer 240 is disposed between the P-type doped semiconductor layer 250 and the N-type doped semiconductor layer 230 , and the electrode 3 and the transparent conductive layer 251 are disposed on the P-type doped semiconductor layer 250 . In addition, the electrode 4 is disposed on the N-type doped semiconductor layer 230 . It is worth noting that the electrode 3 is connected to the unintentionally doped layer 220 through the first metal layer 260 in the contact window H1, and the first oxide layer 261 is disposed in the contact window H1, and the first oxide layer 261 can make the first The metal layer 260 is electrically insulated from other film layers (the N-type doped semiconductor layer 230 , the active layer 240 and the P-type doped semiconductor layer 250 ).
前述电极4通过接触窗H2中的第二金属层270与非故意掺杂层220连接,而第二氧化层271设置于接触窗H2内,此第二氧化层271可使第二金属层270与N型掺杂半导体层230电绝缘。值得留意的是,第一金属层260与非故意掺杂层220以及第二金属层270与非故意掺杂层220之间皆为萧基接触(shottky contact)。此外,电极3连接至工作电压V1,而电极4连接至工作电压V2。The aforementioned electrode 4 is connected to the unintentionally doped layer 220 through the second metal layer 270 in the contact window H2, and the second oxide layer 271 is arranged in the contact window H2. This second oxide layer 271 can make the second metal layer 270 and the second metal layer 270 The N-type doped semiconductor layer 230 is electrically insulated. It should be noted that the first metal layer 260 and the unintentionally doped layer 220 and the second metal layer 270 and the unintentionally doped layer 220 are shottky contacts. Furthermore, electrode 3 is connected to an operating voltage V1 and electrode 4 is connected to an operating voltage V2.
当静电放电现象产生时,静电的高压特性会使得二极管202(图2B所示)在其击穿电压区操作,此时,静电荷会流过二极管202;意即,静电荷会依次流过图2A中所示的电极4、第二金属层270、非故意掺杂层220、第一金属层260与电极3。如此一来,静电荷便不会流入发光二极管201,进而造成发光二极管201遭受静电破坏,因此,二极管202可以保护发光二极管201免于遭受静电破坏。When electrostatic discharge occurs, the high-voltage characteristics of static electricity will cause the diode 202 (shown in FIG. 2B ) to operate in its breakdown voltage region. At this time, the electrostatic charge will flow through the
然而,上述发光二极管芯片200的第一金属层260与第二金属层270必须与非故意掺杂层220、电极3与电极4以外的膜层电绝缘。因此,此公知技术必须在接触窗H1与H2内形成第一氧化层261与第二氧化层271。然而,随着接触窗H1与H2的深度越深,在接触窗H1与H2内形成第一氧化层261与第二氧化层271也就越困难,换言之,在制造上极有可能面临产品合格率不佳的问题。However, the first metal layer 260 and the second metal layer 270 of the LED chip 200 must be electrically insulated from the film layers other than the unintentional doped layer 220 and the electrode 3 and the electrode 4 . Therefore, in this known technique, the first oxide layer 261 and the second oxide layer 271 must be formed in the contact holes H1 and H2 . However, the deeper the contact windows H1 and H2 are, the more difficult it is to form the first oxide layer 261 and the second oxide layer 271 in the contact windows H1 and H2. Poor question.
图3A为一种公知的发光二极管芯片示意图,而图3B为图3A中发光二极管芯片的电路示意图。请同时参考图3A与图3B,发光二极管芯片300由发光二极管301与二极管302所构成。其中,发光二极管301包括基板310、N型掺杂半导体层320、活性层330、P型掺杂半导体层340、透明导电层350、电极5与电极6。FIG. 3A is a schematic diagram of a known light emitting diode chip, and FIG. 3B is a schematic circuit diagram of the light emitting diode chip in FIG. 3A . Please refer to FIG. 3A and FIG. 3B at the same time, the light
上述N型掺杂半导体层320设置于基板310上,而活性层330设置于P型掺杂半导体层340与N型掺杂半导体层320之间。此外,透明导电层350与电极5设置于P型掺杂半导体层340上,而电极6设置于N型掺杂半导体层320上。The N-type doped
另外,二极管302设置于基板310上,且二极管302包括P型掺杂区362、N型掺杂区364、电极7与电极8。其中,电极7设置于P型掺杂区362上,而电极8设置于N型掺杂区364上。此外,电极5与8通过导线连接至工作电压V1,而电极6与7通过导线连接至工作电压V2。换言之,二极管302反相并联于发光二极管301(如图3B所示)。In addition, the
当静电放电现象产生时,静电的高压特性会使得二极管302(图3B所示)在其击穿电压区操作,此时,静电荷会流过二极管302,而不会流过发光二极管301,进而防止发光二极管301遭受静电放电破坏。然而,电极5与8之间必需通过长度较长的导线来连接,导线过长容易使发光二极管芯片300产生可靠度不佳的问题。此外,由于二极管302占据了基板310上的部分面积,因此发光二极管301的发光面积便相对地减少,使得发光二极管301的亮度受到影响。When electrostatic discharge occurs, the high-voltage characteristics of static electricity will cause the diode 302 (shown in FIG. 3B ) to operate in its breakdown voltage region. At this time, the electrostatic charge will flow through the
发明内容Contents of the invention
有鉴于此,本发明的目的就是提供一种具有静电放电防护功能的发光二极管芯片,其不但制造容易且可靠度佳。In view of this, the object of the present invention is to provide a light-emitting diode chip with electrostatic discharge protection function, which is not only easy to manufacture but also has good reliability.
为达上述或其它目的,本发明提供一种发光二极管芯片,其包括基板、静电传导层、第一型掺杂半导体层、活性层、第二型掺杂半导体层、第一电极与第二电极。其中,静电传导层设置于基板上,而第一型掺杂半导体层设置于静电传导层的部分区域上。此外,活性层设置于第一型掺杂半导体层的部分区域上,而第二型掺杂半导体层设置于活性层上。另外,第一电极设置于第一型掺杂半导体层上,而第二电极设置于第二型掺杂半导体层上。To achieve the above or other objectives, the present invention provides a light emitting diode chip, which includes a substrate, an electrostatic conductive layer, a first-type doped semiconductor layer, an active layer, a second-type doped semiconductor layer, a first electrode and a second electrode . Wherein, the electrostatic conduction layer is arranged on the substrate, and the first type doped semiconductor layer is arranged on a partial area of the electrostatic conduction layer. In addition, the active layer is disposed on a part of the first-type doped semiconductor layer, and the second-type doped semiconductor layer is disposed on the active layer. In addition, the first electrode is disposed on the first-type doped semiconductor layer, and the second electrode is disposed on the second-type doped semiconductor layer.
本发明之一实施例中,发光二极管芯片还包括第一萧基接触电极,此第一萧基接触电极例如设置于静电传导层上,且第一萧基接触电极与第二电极电连接。In an embodiment of the present invention, the light emitting diode chip further includes a first Schottky contact electrode, the first Schottky contact electrode is disposed on the electrostatic conductive layer, and the first Schottky contact electrode is electrically connected to the second electrode.
本发明之一实施例中,发光二极管芯片还包括第一导线,此第一导线电连接第一萧基接触电极与第二电极。In an embodiment of the present invention, the LED chip further includes a first wire, and the first wire is electrically connected to the first Schottky contact electrode and the second electrode.
本发明之一实施例中,发光二极管芯片还包括第二萧基接触电极,此第二萧基接触电极例如设置于静电传导层上,且第二萧基接触电极与第一电极电连接。In an embodiment of the present invention, the light emitting diode chip further includes a second Schottky contact electrode, the second Schottky contact electrode is disposed on the electrostatic conductive layer, and the second Schottky contact electrode is electrically connected to the first electrode.
本发明之一实施例中,发光二极管芯片还包括第二导线,此第二导线电连接第二萧基接触电极与第一电极。In an embodiment of the present invention, the LED chip further includes a second wire, and the second wire is electrically connected to the second Schottky contact electrode and the first electrode.
本发明之一实施例中,发光二极管芯片还包括电流阻隔层,此电流阻隔层例如设置于第一型掺杂半导体层与静电传导层之间。In an embodiment of the present invention, the light emitting diode chip further includes a current blocking layer, for example, the current blocking layer is disposed between the first type doped semiconductor layer and the static electricity conducting layer.
本发明之一实施例中,电流阻隔层与第二型掺杂半导体层例如为相同掺杂类型的材料,且静电传导层与第一型掺杂半导体层例如为相同掺杂类型的材料。In an embodiment of the present invention, the current blocking layer and the second-type doped semiconductor layer are, for example, materials of the same doping type, and the static conduction layer and the first-type doping semiconductor layer are, for example, materials of the same doping type.
本发明之一实施例中,发光二极管芯片还包括第三萧基接触电极,此第三萧基接触电极例如设置于静电传导层上,且第三萧基接触电极与第一电极电连接。In an embodiment of the present invention, the LED chip further includes a third Schottky contact electrode, the third Schottky contact electrode is disposed on the electrostatic conductive layer, and the third Schottky contact electrode is electrically connected to the first electrode.
本发明之一实施例中,发光二极管芯片还包括第三导线,此第三导线例如电连接第三萧基接触电极与第一电极。In an embodiment of the present invention, the LED chip further includes a third wire, for example, the third wire is electrically connected to the third Schottky contact electrode and the first electrode.
本发明之一实施例中,发光二极管芯片还包括第三萧基接触电极,此第三萧基接触电极例如设置于静电传导层上,且第三萧基接触电极与第二电极电连接。In an embodiment of the present invention, the light emitting diode chip further includes a third Schottky contact electrode, the third Schottky contact electrode is disposed on the electrostatic conductive layer, and the third Schottky contact electrode is electrically connected to the second electrode.
本发明之一实施例中,发光二极管芯片还包括第三导线,此第三导线例如电连接第三萧基接触电极与第二电极。In an embodiment of the present invention, the LED chip further includes a third wire, for example, the third wire is electrically connected to the third Schottky contact electrode and the second electrode.
本发明之一实施例中,发光二极管芯片还包括第四萧基接触电极,此第四萧基接触电极例如设置于电流阻隔层上,且第四萧基接触电极与第一电极电连接。In an embodiment of the present invention, the LED chip further includes a fourth Schottky contact electrode, the fourth Schottky contact electrode is disposed on the current blocking layer, and the fourth Schottky contact electrode is electrically connected to the first electrode.
本发明之一实施例中,发光二极管芯片还包括第四导线,此第四导线例如电连接第四萧基接触电极与第一电极。In an embodiment of the present invention, the LED chip further includes a fourth wire, for example, the fourth wire is electrically connected to the fourth Schottky contact electrode and the first electrode.
本发明之一实施例中,第一型掺杂半导体层例如为N型掺杂半导体层,而第二型掺杂半导体层例如为P型掺杂半导体层。In an embodiment of the present invention, the first-type doped semiconductor layer is, for example, an N-type doped semiconductor layer, and the second-type doped semiconductor layer is, for example, a P-type doped semiconductor layer.
本发明之一实施例中,静电传导层的材质例如包括氮化镓系的材料。In an embodiment of the present invention, the material of the electrostatic conductive layer includes GaN-based materials, for example.
本发明之一实施例中,活性层例如包括多重量子井层。In one embodiment of the present invention, the active layer includes, for example, a multiple quantum well layer.
综上所述,本发明之发光二极管芯片具有静电传导层,且发光二极管芯片中的静电传导层设置于基板与第一型掺杂半导体层之间。当静电放电现象产生时,静电会流过静电传导层,进而被导出发光二极管芯片。因此,本发明之发光二极管芯片具有静电放电防护的功能,且其结构简单而易于被制造。In summary, the light emitting diode chip of the present invention has an electrostatic conductive layer, and the electrostatic conductive layer in the light emitting diode chip is disposed between the substrate and the first type doped semiconductor layer. When the electrostatic discharge phenomenon occurs, static electricity will flow through the static conductive layer, and then be exported to the LED chip. Therefore, the light-emitting diode chip of the present invention has the function of electrostatic discharge protection, and its structure is simple and easy to be manufactured.
为让本发明之上述和其它目的、特征和优点能更明显易懂,下文特举较佳实施例,并配合附图,作详细说明如下。In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments are specifically cited below and described in detail with accompanying drawings.
附图说明Description of drawings
图1A为公知的覆晶封装的发光二极管芯片示意图。FIG. 1A is a schematic diagram of a conventional flip-chip packaged LED chip.
图1B为图1A中覆晶封装的电路示意图。FIG. 1B is a schematic circuit diagram of the flip-chip package in FIG. 1A .
图2A为另一种公知的发光二极管芯片示意图。FIG. 2A is a schematic diagram of another known LED chip.
图2B为图2A中发光二极管芯片的电路示意图。FIG. 2B is a schematic circuit diagram of the LED chip in FIG. 2A .
图3A为一种公知的发光二极管芯片示意图。FIG. 3A is a schematic diagram of a known LED chip.
图3B为图3A中发光二极管芯片的电路示意图。FIG. 3B is a schematic circuit diagram of the LED chip in FIG. 3A .
图4A为本发明第一实施例之发光二极管芯片示意图。FIG. 4A is a schematic diagram of a light emitting diode chip according to the first embodiment of the present invention.
图4B为本发明第一实施例之发光二极管芯片的等效电路示意图。FIG. 4B is a schematic diagram of an equivalent circuit of a light emitting diode chip according to the first embodiment of the present invention.
图4C为本发明第二实施例之发光二极管芯片示意图。FIG. 4C is a schematic diagram of a light emitting diode chip according to a second embodiment of the present invention.
图4D为本发明第二实施例之发光二极管芯片的等效电路示意图。FIG. 4D is a schematic diagram of an equivalent circuit of a light emitting diode chip according to a second embodiment of the present invention.
图5A为本发明第三实施例之发光二极管芯片示意图。FIG. 5A is a schematic diagram of a light emitting diode chip according to a third embodiment of the present invention.
图5B为本发明第三实施例之发光二极管芯片之的等效电路示意图。FIG. 5B is a schematic diagram of an equivalent circuit of a light emitting diode chip according to a third embodiment of the present invention.
图5C为本发明第四实施例之发光二极管芯片示意图。FIG. 5C is a schematic diagram of a light emitting diode chip according to a fourth embodiment of the present invention.
图5D为本发明第四实施例之发光二极管芯片的等效电路示意图。5D is a schematic diagram of an equivalent circuit of a light emitting diode chip according to a fourth embodiment of the present invention.
图6A为本发明第五实施例之发光二极管芯片示意图。FIG. 6A is a schematic diagram of a light emitting diode chip according to a fifth embodiment of the present invention.
图6B为本发明第五实施例之发光二极管芯片的等效电路示意图。FIG. 6B is a schematic diagram of an equivalent circuit of a light emitting diode chip according to a fifth embodiment of the present invention.
主要元件标记说明Description of main component marking
1、2、3、4、5、6、7、8:电极1, 2, 3, 4, 5, 6, 7, 8: electrodes
10:第一导线10: First wire
20:第二导线20: Second wire
30:第三导线30: Third wire
40:第四导线40: Fourth wire
100、200、300、400、500、600、700、800:发光二极管芯片100, 200, 300, 400, 500, 600, 700, 800: LED chips
110、201、301、401、501、601、701、801:发光二极管110, 201, 301, 401, 501, 601, 701, 801: LED
120、202、302、402、502、602、702、802:二极管120, 202, 302, 402, 502, 602, 702, 802: Diodes
112、210、310、410:基板112, 210, 310, 410: substrate
114、230、320:N型掺杂半导体层114, 230, 320: N-type doped semiconductor layer
116、240、330、440:活性层116, 240, 330, 440: active layer
118、250、340:P型掺杂半导体层118, 250, 340: P-type doped semiconductor layer
119、251、350、460:透明导电层119, 251, 350, 460: transparent conductive layer
122、364:N型掺杂区122, 364: N-type doped region
124、362:P型掺杂区124, 362: P-type doped region
220:非故意掺杂层220: Unintentionally doped layer
260:第一金属层260: first metal layer
261:第一氧化层261: first oxide layer
270:第二金属层270: second metal layer
271:第二氧化层271: second oxide layer
412:缓冲层412: buffer layer
420:静电传导层420: Static conductive layer
430:第一型掺杂半导体层430: first type doped semiconductor layer
432:N型被覆层432: N-type coating
450:第二型掺杂半导体层450: Second-type doped semiconductor layer
452:P型被覆层452: P-type coating layer
B:电流阻隔层B: current blocking layer
C1、C2、C3:导线C1, C2, C3: wires
M1:第一电极M1: first electrode
M2:第二电极M2: second electrode
M3:第三电极M3: third electrode
M4:第四电极M4: fourth electrode
M5:第五电极M5: fifth electrode
S1:第一萧基接触电极S1: First Schottky contact electrode
S2:第二萧基接触电极S2: Second Schottky contact electrode
S3:第三萧基接触电极S3: The third Schottky contact electrode
S4:第四萧基接触电极S4: Fourth Schottky contact electrode
H1、H2:接触窗H1, H2: contact window
V1、V2:工作电压V1, V2: working voltage
W1、W2:焊锡W1, W2: solder
I、II:路径I, II: path
具体实施方式Detailed ways
第一实施例first embodiment
图4A为本发明第一实施例之发光二极管芯片示意图,而图4B为本发明第一实施例之发光二极管芯片的等效电路示意图。请同时参考图4A与图4B,本发明之发光二极管芯片400包括基板410、静电传导层420、第一型掺杂半导体层430、活性层440、第二型掺杂半导体层450、第一电极M1与第二电极M2。其中,静电传导层420设置于基板410上。一般而言,我们可选择性地在基板410与静电传导层420之间形成缓冲层412,以提高静电传导层420与基底410的晶格匹配特性。前述缓冲层412的材料例如为AlaGabIn1-a-bN(0≤a,b<1;0≤a+b≤1),而静电传导层420的材料例如为氮化镓系的材料。FIG. 4A is a schematic diagram of a light emitting diode chip according to the first embodiment of the present invention, and FIG. 4B is a schematic diagram of an equivalent circuit of the light emitting diode chip according to the first embodiment of the present invention. Please refer to FIG. 4A and FIG. 4B at the same time. The
承上述,本实施例之第一型掺杂半导体层430设置于静电传导层420的部分区域上。此外,活性层440设置于第一型掺杂半导体层430的部分区域上,而第二型掺杂半导体层450设置于活性层440上。上述第一型掺杂半导体层430例如为N型掺杂半导体层,而第二型掺杂半导体层450例如为P型掺杂半导体层,且活性层440例如为多重量子井层。Based on the above, the first-type doped
一般而言,发光二极管芯片400的发光原理主要是通过电子与空穴在活性层440中结合以产生光子,然而,电子与空穴在活性层440中的移动率(mobility)不相同,而这会影响电子与空穴在活性层440中结合的机率。因此,在本实施例中例如可设置N型被覆层(cladding layer)432于第一型掺杂半导体层430与活性层440之间,以及例如设置P型被覆层452于第二型掺杂半导体层450与活性层440之间。此N型被覆层432与P型被覆层452主要的功能在于提高电子与空穴在活性层440中结合的机率。Generally speaking, the light-emitting principle of the light-emitting
另外,第一电极M1设置于第一型掺杂半导体层430上,而第二电极M2设置于第二型掺杂半导体层450上。本实施例之发光二极管芯片400可设置透明导电层460于第二型掺杂半导体层450上,此透明导电层460的材料例如是铟锡氧化物。此外,本实施例之发光二极管芯片400还包括第一萧基接触电极S1,其设置于静电传导层420上,而第一萧基接触电极S 1的材料例如是镍(Ni)、金(Au)、铝(Al)、铬(Cr)与氮化钛(TiN)所形成的金属膜层。第一萧基接触电极S 1例如通过第一导线10而与第二电极M2电连接。值得留意的是,第一萧基接触电极S1与静电传导层420之间的界面为萧基接面(shottky junction)。In addition, the first electrode M1 is disposed on the first-type doped
承上述,第一电极M1连接至工作电压V2,而第二电极M2通过第一导线10连接至工作电压V1。当发光二极管芯片400在正常电压下操作,由于静电传导层420与第一萧基接触电极S1之间的界面为萧基接面,因此电流会流过路径I,进而使得图4B中所示的发光二极管401发光。According to the above, the first electrode M1 is connected to the working voltage V2 , and the second electrode M2 is connected to the working voltage V1 through the
当静电放电现象产生时,静电的高压可能施加于第一电极M1,而此静电的高压特性会使得二极管402(如图4B所示)在其击穿电压区操作,而使静电流过二极管402。换言之,静电会流过路径II(如图4A所示),其依次由第一电极M1、第一型掺杂半导体层430、静电传导层420流至第一萧基接触电极S1。如此一来,静电会被二极管402所消耗并通过第一导线10从发光二极管芯片400中导出,以避免发光二极管401遭受静电放电破坏。When the electrostatic discharge phenomenon occurs, the high voltage of static electricity may be applied to the first electrode M1, and the high voltage characteristic of the static electricity will make the diode 402 (as shown in FIG. 4B ) operate in its breakdown voltage region, so that the static electricity flows through the
本发明之发光二极管芯片400通过静电传导层420作为静电排除的路径,以避免发光二极管芯片400遭受静电破坏。与公知技术相比,本发明的结构较为简单,在制造上也相对容易。此外,由于第二电极M2与第一萧基接触电极S1之间的距离与公知的电极5与8之间的距离相比(如图3A所示)更短。因此,长度较短的第一导线10可避免如公知技术的发光二极管芯片400的可靠度不佳的问题发生。In the light emitting
第二实施例second embodiment
图4C为本发明第二实施例之发光二极管芯片示意图,而图4D为本发明第二实施例之发光二极管芯片的等效电路示意图。请同时参考图4C与图4D,第二实施例与第一实施例类似,二者主要不同之处在于:本实施例所使用的电极数目以及萧基接触电极的设置位置。详细地说,本实施例的发光二极管芯片500还包括第二萧基接触电极S2,此第二萧基接触电极S2设置于静电传导层420上,且第二萧基接触电极S2例如以第二导线20与第一电极电性M1连接。FIG. 4C is a schematic diagram of a light emitting diode chip according to the second embodiment of the present invention, and FIG. 4D is a schematic diagram of an equivalent circuit of the light emitting diode chip according to the second embodiment of the present invention. Please refer to FIG. 4C and FIG. 4D at the same time. The second embodiment is similar to the first embodiment. The main difference between the two lies in the number of electrodes used in this embodiment and the location of Schottky contact electrodes. In detail, the light emitting diode chip 500 of this embodiment further includes a second Schottky contact electrode S2, the second Schottky contact electrode S2 is disposed on the electrostatic
当发光二极管芯片500在正常电压下操作,由于静电传导层420与第二萧基接触电极S2之间的界面为萧基接面,因此电流会流过路径I,进而使得图4D中所示的发光二极管501发光。When the light-emitting diode chip 500 operates at a normal voltage, since the interface between the electrostatic
当静电放电现象产生时,静电的高压可能施加于第一电极M1与第二萧基接触电极S2上,而此静电的高压特性会使得二极管502(如图4D所示)在其击穿电压区操作,而使静电流过二极管502。换言之,静电会流过路径II(如图4C所示),其依次由第二萧基接触电极S2、静电传导层420流至第一萧基接触电极S1。如此一来,静电会被二极管502所消耗并通过第一导线10从发光二极管芯片500中导出,以避免发光二极管501遭受静电放电破坏。When the electrostatic discharge phenomenon occurs, the high voltage of static electricity may be applied to the first electrode M1 and the second Schottky contact electrode S2, and the high voltage characteristic of the static electricity will make the diode 502 (as shown in FIG. 4D ) in its breakdown voltage region operation, so that static electricity flows through the diode 502. In other words, the static electricity flows through the path II (as shown in FIG. 4C ), which sequentially flows from the second Schottky contact electrode S2 , the electrostatic
值得留意的是,上述第一萧基接触电极S1与第二萧基接触电极S2,只要其中之一个与静电传导层420之间的界面为萧基接面即可,在本实施例中并无意限定第一萧基接触电极S1与静电传导层420之间的界面以及第二萧基接触电极S2与静电传导层420之间的界面必须同时为萧基接面。It is worth noting that, as long as the interface between the first Schottky contact electrode S1 and the second Schottky contact electrode S2 and the electrostatic
第三实施例third embodiment
图5A为本发明第三实施例之发光二极管芯片示意图,而图5B为本发明第三实施例之发光二极管芯片的等效电路示意图。请同时参考图5A与图5B,本实施例与第二实施例非常类似,两者主要不同之处在于:本实施例之发光二极管芯片600还包括电流阻隔层B,其例如设置于静电传导层420与第一型掺杂半导体层430之间,而此电流阻隔层B的材料的掺杂类型是不同于静电传导层420的掺杂类型,此电流阻隔层B的材料可以是氮化镓系或者是绝缘性质的材料所构成。FIG. 5A is a schematic diagram of an LED chip according to the third embodiment of the present invention, and FIG. 5B is a schematic diagram of an equivalent circuit of the LED chip according to the third embodiment of the present invention. Please refer to FIG. 5A and FIG. 5B at the same time. This embodiment is very similar to the second embodiment. The main difference between the two is that: the
详细地说,电流阻隔层B与第二型掺杂半导体层450例如为相同掺杂类型的材料,且静电传导层420与第一型掺杂半导体层430例如为相同掺杂类型的材料。此外,本实施例之发光二极管芯片600例如包括第三萧基接触电极S3,此第三萧基接触电极S3替代了图4C所示的第二萧基接触电极S2。In detail, the current blocking layer B and the second-type doped
本实施例中之第三萧基接触电极S3例如设置于静电传导层420上,值得留意的是,第三萧基接触电极S3与静电传导层420之间的界面为萧基接面。此外,第三萧基接触电极S3例如以第三导线30与第一电极M1电连接。此外,本实施例之发光二极管芯片600例如设置第三电极M3于静电传导层420上,且此第三电极M3例如以导线C1与第二电极M2电连接。In this embodiment, the third Schottky contact electrode S3 is disposed on the electrostatic
当发光二极管芯片600在正常电压下操作,由于静电传导层420与第三萧基接触电极S3之间的界面为萧基接面,因此电流会流过路径I,进而使得图5B所示的发光二极管601发光。When the light-emitting
当静电放电现象产生时,静电的高压可能施加于第一电极M1与第三萧基接触电极S3(第三导线30),此静电的高压特性会使得二极管602(如图5B所示)在其击穿电压区操作,而使静电流过二极管602。换言之,静电会流过路径II,其依次由第三萧基接触电极S3、静电传导层420流至第三电极M3。如此一来,静电会被二极管602所消耗并通过导线C1从发光二极管芯片600中导出,以避免发光二极管601遭受静电放电破坏。When the electrostatic discharge phenomenon occurs, the high voltage of static electricity may be applied to the first electrode M1 and the third Schottky contact electrode S3 (the third wire 30), and the high voltage characteristic of the static electricity will make the diode 602 (as shown in FIG. 5B ) in its Operates in the breakdown voltage region, allowing static current to flow through the
值得留意的是,静电的排除路径II依次为第三萧基接触电极S3、静电传导层420与第三电极M3,因此,静电并不易对上述以外的膜层造成破坏,这更确保发光二极管601免于遭受静电放电破坏。It is worth noting that the static electricity elimination path II is the third Schottky contact electrode S3, the static
第四实施例Fourth embodiment
图5C为本发明第四实施例之发光二极管芯片示意图,而图5D为本发明第四实施例之发光二极管芯片的等效电路示意图。请同时参考图5C与图5D,本实施例与第三实施例非常类似,两者主要不同之处在于:本实施例与第三实施例中萧基接触电极的设置位置。详细地说,本实施例之发光二极管芯片700的第三萧基接触电极S3设置于静电传导层420上,且此第三萧基接触电极S3通过第三导线30与第二电极M2电连接。这里要留意的是,第三萧基接触电极S3与静电传导层420之间的界面为萧基接面。FIG. 5C is a schematic diagram of an LED chip according to the fourth embodiment of the present invention, and FIG. 5D is a schematic diagram of an equivalent circuit of the LED chip according to the fourth embodiment of the present invention. Please refer to FIG. 5C and FIG. 5D at the same time. This embodiment is very similar to the third embodiment. The main difference between the two lies in the location of the Schottky contact electrodes in this embodiment and the third embodiment. In detail, the third Schottky contact electrode S3 of the LED chip 700 of this embodiment is disposed on the electrostatic
此外,本实施例之发光二极管芯片700例如包括第四电极M4,此第四电极M4设置于静电传导层420上,此第四电极M4例如以导线C2与第一电极M1电连接。如此一来,本实施例之发光二极管601同样可以免于遭受静电放电破坏。In addition, the light emitting diode chip 700 of this embodiment includes, for example, a fourth electrode M4 disposed on the electrostatic
第五实施例fifth embodiment
图6A为本发明第五实施例之发光二极管芯片示意图,而图6B为本发明第五实施例之发光二极管芯片的等效电路示意图。请同时参考图6A与图6B,本实施例与第四实施例非常的类似,两者主要不同之处在于:本实施例与第四实施例中萧基接触电极的设置位置。FIG. 6A is a schematic diagram of a light emitting diode chip according to a fifth embodiment of the present invention, and FIG. 6B is a schematic diagram of an equivalent circuit of the light emitting diode chip according to the fifth embodiment of the present invention. Please refer to FIG. 6A and FIG. 6B at the same time. This embodiment is very similar to the fourth embodiment. The main difference between the two lies in the location of the Schottky contact electrodes in this embodiment and the fourth embodiment.
详细地说,本实施例之发光二极管芯片800还包括第四萧基接触电极S4,此第四萧基接触电极S4设置于电流阻隔层B上,且第四萧基接触电极S4例如以第四导线40与第一电极M1电连接。值得留意的是,这里的电流阻隔层B与静电传导层420的材料的掺杂类型是不同的,上述电流阻隔层B的材料例如为P型掺杂类型的氮化镓系材料,而静电传导层420的材料例如为N型掺杂类型的氮化镓系材料。In detail, the light-emitting diode chip 800 of this embodiment further includes a fourth Schottky contact electrode S4, which is disposed on the current blocking layer B, and the fourth Schottky contact electrode S4 is, for example, formed as a fourth Schottky contact electrode S4. The wire 40 is electrically connected to the first electrode M1. It is worth noting that the doping types of the materials of the current blocking layer B and the
当发光二极管芯片800在正常电压下操作,由于静电传导层420与第四萧基接触电极S4之间的界面为萧基接面,因此电流会流过路径I,进而使得图6B所示的发光二极管801发光。When the light-emitting diode chip 800 operates at a normal voltage, since the interface between the electrostatic
当静电放电现象产生时,静电的高压可能施加于第一电极M1与第四萧基接触电极S4(第四导线40),此静电的高压特性会使得二极管802(如图6B所示)在其击穿电压区操作,而使静电流过二极管802。换言之,静电会流过路径II,其依次由第四萧基接触电极S4、电流阻隔层B、静电传导层420流至第五电极M5。如此一来,静电会被二极管802所消耗并通过导线C3从发光二极管芯片800中导出,以避免发光二极管801遭受静电放电破坏。When the electrostatic discharge phenomenon occurs, the high voltage of static electricity may be applied to the first electrode M1 and the fourth Schottky contact electrode S4 (the fourth wire 40), and the high voltage characteristic of the static electricity will make the diode 802 (as shown in FIG. Operates in the breakdown voltage region, allowing static current to flow through the
综上所述,本发明之发光二极管芯片至少具有下列优点:In summary, the LED chip of the present invention has at least the following advantages:
一、本发明之发光二极管芯片包括静电传导层,而此静电传导层设置于基板与第一型掺杂半导体层之间。本发明之发光二极管芯片以此静电传导层作为静电排除的路径,以避免发光二极管芯片遭受静电破坏。1. The LED chip of the present invention includes an electrostatic conduction layer, and the electrostatic conduction layer is disposed between the substrate and the first-type doped semiconductor layer. The light-emitting diode chip of the present invention uses the electrostatic conduction layer as a static discharge path to prevent the light-emitting diode chip from being damaged by static electricity.
二、本发明之发光二极管芯片之结构简单且制造容易,此外,由于本发明之发光二极管芯片中,电极与电极之间的连接导线较短,因此发光二极管芯片的可靠度也更佳。2. The light emitting diode chip of the present invention has a simple structure and is easy to manufacture. In addition, in the light emitting diode chip of the present invention, the connecting wires between electrodes are shorter, so the reliability of the light emitting diode chip is also better.
虽然本发明已以较佳实施例披露如上,然其并非用以限定本发明,任何所属技术领域的技术人员,在不脱离本发明之精神和范围内,当可作些许之更动与改进,因此本发明之保护范围当视权利要求所界定者为准。Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some modifications and improvements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the claims.
Claims (14)
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102169937A (en) * | 2010-02-23 | 2011-08-31 | Lg伊诺特有限公司 | Light emitting diode, light emitting diode package, method of manufacturing light emitting diode and illumination system |
| WO2017206772A1 (en) * | 2016-06-01 | 2017-12-07 | 厦门三安光电有限公司 | Light emitting diode with electrostatic protection function and manufacturing method therefor |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100497121B1 (en) * | 2002-07-18 | 2005-06-28 | 삼성전기주식회사 | Semiconductor LED Device |
| JP2003243701A (en) * | 2003-03-20 | 2003-08-29 | Toyoda Gosei Co Ltd | Iii nitride-based semiconductor light emitting element |
| CN1558451A (en) * | 2004-02-03 | 2004-12-29 | ���ڿƼ��ɷ�����˾ | Light-emitting diode element capable of preventing electrostatic damage |
-
2005
- 2005-10-08 CN CNB2005101082118A patent/CN100426542C/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169937A (en) * | 2010-02-23 | 2011-08-31 | Lg伊诺特有限公司 | Light emitting diode, light emitting diode package, method of manufacturing light emitting diode and illumination system |
| US8395182B2 (en) | 2010-02-23 | 2013-03-12 | Lg Innotek Co., Ltd. | Light emitting device, light emitting device package, method of manufacturing light emitting device and illumination system |
| CN102169937B (en) * | 2010-02-23 | 2014-03-26 | Lg伊诺特有限公司 | Light emitting diode, light emitting diode package, method of manufacturing light emitting diode and illumination system |
| TWI492418B (en) * | 2010-02-23 | 2015-07-11 | Lg伊諾特股份有限公司 | Illuminating device |
| WO2017206772A1 (en) * | 2016-06-01 | 2017-12-07 | 厦门三安光电有限公司 | Light emitting diode with electrostatic protection function and manufacturing method therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100426542C (en) | 2008-10-15 |
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Effective date of registration: 20091204 Address after: Longtan Road, Taoyuan County, Taiwan, China Longtan science and Technology Industrial Park, No. 99, Dragon Garden Road Co-patentee after: LUMENS Limited by Share Ltd. Patentee after: FORMOSA EPITAXY INCORPORATION Address before: Longtan County, Taoyuan County, Taiwan province Longtan science and Technology Industrial Park, No. 99, Dragon Garden Road Patentee before: Formosa Epitaxy Incorporation |
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