CN1898713A - Display device and method for manufacturing display device - Google Patents

Abstract

Provided is an organic EL display device which does not use an ITO film. After a common electrode (11) composed of an impurity region is formed on the rear surface of a semiconductor substrate (10), holes (20) having a bottom are arranged in a matrix, an organic light-emitting layer (40) is formed in each hole (20), and pixel electrodes (43) are provided on the surfaces thereof, respectively. When a voltage is applied between the common electrode (40) and the pixel electrode (43), the organic light-emitting layer (40) emits light, and the emitted light is emitted to the outside through the common electrode (40). A display device (102) can be obtained by providing a connection transistor (115) and causing only a desired pixel (110) to emit light.

Description

Display device and method for manufacturing display device

technical field

The present invention relates to the technology of organic EL device, especially the organic EL device that does not use ITO (Indium-tin oxide).

Background technique

To use an organic EL device in a head-mounted display or a projector, it is necessary to manufacture a small and high-quality organic EL display device. In order to manufacture small and high-quality organic EL, it is necessary to manufacture tiny light-emitting elements.

However, it is difficult to manufacture such a tiny light-emitting element by forming a transparent electrode such as ITO on a glass substrate as in the past. This is because, generally, the ITO film is formed by a sputtering method, and thus defects such as unevenness may sometimes occur. In addition, defects such as unevenness may occur on the ITO film by the sputtering process. If the thickness of the ITO film is reduced in order to produce a small organic EL, short circuits are likely to occur due to the above defects.

Furthermore, the ITO film produced by the sputtering method has a non-dense structure due to anisotropic growth. Therefore, during patterning, the etchant used may infiltrate into the ITO film and damage the organic layer formed on the ITO film. Therefore, it is difficult to manufacture a small organic EL device using ITO.

In addition, in order to reduce the resistance of the ITO film, it is necessary to perform thermal baking at a temperature of 200° C. or higher.

Patent Document 1: JP 2001-76884

Patent Document 2: JP 2002-237383

Contents of the invention

An object of the present invention is to manufacture a small and high-quality organic EL display device using a Si wafer instead of a glass substrate.

Another object of the present invention is to provide an organic EL display device having a minute light-emitting element without using ITO.

In order to achieve the above tasks, the display device of technical solution 1 has: a semiconductor substrate, a plurality of connection transistors formed on the semiconductor substrate, a plurality of holes formed on the semiconductor substrate, and a plurality of holes formed in each of the holes respectively. The organic light-emitting layer that emits light when current flows, and the pixel electrodes respectively arranged on the surface of each of the organic light-emitting layers. The control terminal for controlling conduction between the second main terminals is electrically separated from the pixel electrodes on the respective organic light-emitting layers, and each of the pixel electrodes is connected to the first main terminal of a different connection transistor. .

Technical solution 2 is that in the display device described in technical solution 1, each of the holes is formed as a bottomed hole, the common electrode is exposed from the bottom surface, and the bottom surface of the organic light-emitting layer is in contact with the common electrode.

The technical solution 3 is that in the display device of the technical solution 2, the common electrode is an impurity region formed inside the semiconductor substrate.

Technical solution 4 is that in the display device described in technical solution 3, the thickness between the bottom surface of the semiconductor substrate and the bottom surface of each of the holes is less than 500 nm, and the light emitted by the organic light-emitting layer passes through the holes. Said semiconductor substrate at the bottom surface is projected to the outside.

According to claim 5, in the display device according to claim 3 or 4, the conductivity type of the impurity region is opposite to that of the semiconductor substrate.

The display device of technical solution 6 has: a semiconductor substrate, a plurality of holes formed on the semiconductor substrate, common electrodes respectively located on the bottom surfaces of each of the holes, an organic light-emitting layer respectively arranged in each of the holes, and, The pixel electrodes that are electrically separated from each other on the surface of each of the organic light-emitting layers, when a voltage is applied between the common electrode and the pixel electrodes, and a current flows in the organic light-emitting layer, the organic light-emitting layer The light-emitting layer emits light, and the feature is that the common electrode is composed of an impurity region formed in the semiconductor substrate.

Technical solution 7 is that in the display device described in technical solution 6, a plurality of connection transistors are formed in the semiconductor substrate, and each of the connection transistors has a first and a second main terminal, and a connection to the first and second main terminals. A control terminal for controlling conduction between two main terminals, and each of the pixel electrodes is connected to the first main terminal of a different connection transistor.

Technical solution 8 is that in the display device described in technical solution 6 or 7, the thickness between the bottom surface of the semiconductor substrate and the bottom surface of each of the holes is more than 200nm and less than 500nm, and the light emitted by the organic light-emitting layer , emitted to the outside through the semiconductor substrate at the bottom of the hole.

Technical solution 9 is that in the display device described in any one of technical solutions 1 to 8, a plurality of electronic components including transistors different from the connection transistors are formed on the semiconductor substrate, by In the electronic component, a conduction control circuit connected to the control terminal of each of the connection transistors and a voltage application circuit connected to the second main terminal are formed on the semiconductor substrate, The conduction control circuit and the voltage application circuit turn on a desired transistor among the plurality of connection transistors, and current flows in the organic light-emitting layer connected to the first main terminal of the turned-on connection transistor. flow to make the organic light-emitting layer emit light.

The method for manufacturing a display device according to technical solution 10 includes: doping impurities of the second conductivity type into the back surface of the semiconductor substrate of the first conductivity type to form a common electrode; forming a plurality of holes on the front surface of the semiconductor substrate, a step of exposing the common electrode in each of the holes; a step of forming an organic light-emitting layer in the hole; and a step of forming a pixel electrode on the surface of each of the organic light-emitting layers.

Technical solution 11 is in the manufacturing method of the display device described in technical solution 10, having channel regions of the second conductivity type formed in the semiconductor substrate, and forming channels of the first conductivity type in the channel regions respectively. In the first and second regions separated from each other, a step of forming a connection transistor connects the first region to the pixel electrode.

As the present invention, a bottomed hole is formed in a semiconductor substrate, and an organic light-emitting layer is formed in the hole.

On the bottom surface of the hole, a diffusion region having a low resistivity due to the diffusion of impurities is formed. Use it as a common electrode. When the thickness of the common electrode present on the bottom surface of each hole (the thickness of this part of the semiconductor crystal when the common electrode is composed of a semiconductor crystal constituting the semiconductor substrate) is made to be a thickness that allows the light emitted from the organic light-emitting layer to pass through , the emitted light can pass through the common electrode and exit to the outside.

Therefore, there is no need to emit emitted light from the surface opposite to the common electrode among the surfaces of the organic light-emitting layer, so a metal electrode can be provided on the surface opposite to the common electrode.

In the present invention, since a part of the semiconductor wafer can be used as an electrode, an organic EL display device having a minute light-emitting element can be manufactured without using ITO.

In addition, in the present invention, there is no need to use semiconductor wafers of such high quality as required for manufacturing LSIs, and therefore, those that do not conform to the LSI standards, such as non-standard ones, that were discarded in the past or reused as secondary raw materials can be used. Si wafer.

Description of drawings

FIG. 1 is a cross-sectional view (1) illustrating the manufacturing process of the display device of the present invention.

Fig. 2 is a cross-sectional view (2) illustrating a manufacturing process of the display device of the present invention.

Fig. 3 is a cross-sectional view (3) illustrating a manufacturing process of the display device of the present invention.

Fig. 4 is a cross-sectional view (4) illustrating a manufacturing process of the display device of the present invention.

Fig. 5 is a cross-sectional view (5) illustrating a manufacturing process of the display device of the present invention.

Fig. 6 is a cross-sectional view (6) illustrating a manufacturing process of the display device of the present invention.

Fig. 7 is a cross-sectional view (7) illustrating the manufacturing process of the display device of the present invention.

Fig. 8 is a cross-sectional view (8) illustrating a manufacturing process of the display device of the present invention.

Fig. 9 is a cross-sectional view (9) illustrating a manufacturing process of the display device of the present invention.

Fig. 10 is a cross-sectional view (10) illustrating the manufacturing process of the display device of the present invention.

Fig. 11 is a cross-sectional view (11) illustrating the manufacturing process of the display device of the present invention.

Fig. 12 is a cross-sectional view (12) illustrating the manufacturing process of the display device of the present invention.

Fig. 13 is a cross-sectional view (13) illustrating the manufacturing process of the display device of the present invention.

Fig. 14 is a cross-sectional view (14) illustrating the manufacturing process of the display device of the present invention.

Fig. 15 is a cross-sectional view (15) illustrating the manufacturing process of the display device of the present invention.

Fig. 16 is a cross-sectional view (16) illustrating the manufacturing process of the display device of the present invention.

Fig. 17 is a cross-sectional view (17) illustrating the manufacturing process of the display device of the present invention.

FIG. 18 is a plan view illustrating the layout in the semiconductor substrate of the display device of the present invention.

FIG. 19 is a schematic plan view illustrating a display device of the present invention.

20 is a schematic plan view illustrating a pixel of the display device of the present invention.

Explanation of reference signs

10...Semiconductor substrate

11...Common electrode

20...holes

40...Organic light-emitting layer

43......Pixel electrode

102...Display device

115...Connect the transistor

Detailed ways

Reference numeral 101 in FIG. 18 is a semiconductor wafer on which a plurality of display devices 102 of the present invention are formed.

Each display device 102 is arranged in rows and columns, and score lines 103x and 103y are respectively provided between rows and columns of each display device 102 . The surface of the semiconductor wafer 101 on the scribe lines 103x and 103y is exposed, and the display devices 102 can be separated from each other by cutting from the scribe lines 103x and 103y.

FIG. 19 is a schematic plan view illustrating the structure of one display device 102 , in which a protective film, first and second interlayer insulating films described later, and the like are omitted.

The display device 102 has a plurality of pixels 110 corresponding to the smallest dot-shaped display unit. Each pixel 110 is arranged in rows and columns, and there are scanning lines 112 and data lines 111 respectively between rows and columns of each pixel 110 .

FIG. 20 is an enlarged schematic plan view of pixels 110 each having an organic EL layer 40 and a connection transistor 115 .

The connecting transistor 115 has first and second main terminals that can be output terminals or input terminals, and a control terminal that controls conduction between the first and second main terminals.

Here, the connection transistor 115 is an n-channel MOSFET, and the control terminal is called a gate terminal. The gate terminal is connected to the data line 111 .

A pixel electrode 43 is provided on the surface of the organic EL layer 40 . The first main terminal of the control transistor 115 is a drain terminal, and the pixel electrode 43 is connected to the drain terminal.

In addition, the second main terminal is a source terminal, and the source terminal is connected to the scanning line 112 .

The data line 111 and the scanning line 112 are connected to a conduction control circuit 113 and a voltage application circuit 114, respectively. The conduction control circuit 113 and the voltage application circuit 114 can apply voltages to the required data lines 111 and scan lines 112 respectively. The pixel 110 connected to the two is selected, and only the connection transistor 115 of the pixel 110 is turned on.

As the connection transistor 115 is turned on, the pixel electrode 43 connected to the connection transistor 115 is connected to the scanning line 112 , and a voltage is applied to the organic EL layer 40 . When the voltage causes a current to flow in the organic EL layer 40 , the organic EL layer 40 emits light, and the emitted light is emitted from the selected pixel 110 .

Next, the structure and manufacturing process of the pixel 110 in which one of the p-type and n-type is the first conductivity type and the other is the second conductivity type will be described.

Reference numeral 10 in FIG. 1 is a first conductivity type semiconductor substrate composed of a part of a silicon wafer 101 composed of single crystal silicon. When the impurity of the second conductivity type is injected and diffused into the back side thereof, as shown in FIG. 2, the common electrode 11 composed of a diffusion layer of the second conductivity type is formed. When the first conductivity type is n-type and the second conductivity type is p-type, boron can be used as the impurity of the second conductivity type. Here, the impurities of the second conductivity type are implanted into the entire back surface of the semiconductor substrate 10 , so the common electrode 11 is formed on the entire back surface of the semiconductor substrate 10 . The thickness of the common electrode 11 is 2000 Ȧ˜5000 Ȧ. The resistance is preferably about 5-10Ω/□.

Next, for the surface of the semiconductor substrate 10 opposite to the surface on which the common electrode 11 is formed, the photoprinting process, etching process, impurity implantation process, diffusion process, etc. are repeated, except for forming n-channel MOSFETs and p-channel MOSFETs. , Electronic components such as resistance elements and capacitors are also formed as needed.

Reference numeral 115 in FIG. 3 indicates a connection transistor after the diffusion region is formed, having a channel region 31 as an impurity region of the second conductivity type, and a source of the first conductivity type located inside the channel region 31. pole region 32 and drain region 33 .

Next, the connection transistor 115 is shown in the drawing, but the electronic components constituting the conduction control circuit 113 and the voltage application circuit 114 are not shown.

The channel regions 31 are arranged in rows and columns in a region where one display device 102 is formed, and one source region 32 and one drain region 33 are provided separately from each other in one channel region 31 .

In addition, in a state where at least the surface of the channel region 31 sandwiched by the source region 32 and the drain region 33 is exposed, as shown in FIG. 4 , a gate insulating film 13 made of an insulating material is formed. . Here, the gate insulating film 13 is a silicon oxide film, which exposes the entire front surface of the semiconductor substrate 10 including the surfaces of the channel region 31, the source region 32 and the drain region 33, and then undergoes thermal oxidation and other treatments. And formed, but not limited to oxide film.

Next, as shown in FIG. 5 , a conductive thin film 14 made of a conductive material such as polysilicon is formed on the surface of the gate insulating film 13 .

Next, as shown in FIG. 6 , the conductive thin film 14 is patterned, and at least the portions where holes 20 and openings 16 to be described later are to be formed are removed. On the other hand, the portion between the source region 32 and the drain region 33 is left to form the gate 34 .

Next, as shown in FIG. 7, on one side of the semiconductor substrate 10 including the gate insulating film 13 and the surface of the gate electrode 34, a first interlayer insulating film 15 made of an insulating material is formed. In the printing process and etching process, at least the portion on the source region 32 and the portion on the drain region 33 in the first interlayer insulating film 15 are removed, so that, as shown in FIG. An opening 16 is formed on the drain region 33 .

The surfaces of the source region 32 and the drain region 33 are exposed from the bottom of the opening 16. In this state, a metal film 17 is formed on the surface of the interlayer insulating film 15 and inside the opening 16 by sputtering or the like, as shown in FIG. 9. The inside of opening 16 is filled with metal film 17 . When the part of the metal film 17 other than the part inside the opening 16 is removed, as shown in FIG. 10 , the metal pillar 18 whose lower end is in contact with the source region 32 or the drain region 33 can be obtained. The metal pillars 18 located inside different openings 16 are separated from each other. When in the state shown in FIG. 10 , the metal pillars 18 are electrically insulated.

Next, the first interlayer insulating film 15, the gate insulating film 13, and the semiconductor substrate 10 located between the connection transistors 115 are etched through a photoprinting process and an etching process to form a plurality of holes 20 as shown in FIG. .

Each hole 20 is formed at a position not in contact with the channel region 31 , the source region 32 , and the drain region 33 , and penetrates through the first interlayer insulating film 15 and the gate insulating film 13 . The gate insulating film 13 and the first interlayer insulating film 15 are exposed from the upper side surfaces of the holes 20 .

Each hole 20 does not penetrate the semiconductor substrate 10 , and each hole 20 is formed at a depth such that the common electrode 11 is exposed on the bottom surface of each hole 20 . The bottom of each hole 20 may be located not only on the front surface of the common electrode 11 , but also inside the common electrode 11 so that the common electrode 11 is exposed from the lower end of the side surface of each hole 20 .

Parts of the first conductivity type of the semiconductor substrate 10 are exposed on the side surfaces of each hole, above the common electrode 11 and below the front surface of the semiconductor substrate 10 . In addition, the holes 20 are separated by a certain distance and arranged in rows and columns.

Next, when the organic thin film material with hole transport property is sprayed into each hole 20 by means of spraying, and the solvent is evaporated by heating, as shown in FIG. 1 organic film35.

Here, the first organic thin film 35 is in contact with the common electrode 11, but it is also possible to arrange a conductive buffer layer between the first organic thin film 35 and the common electrode 11 so that the first organic thin film 35 is not in contact with the common electrode. 11 direct contact.

Next, as shown in Figure 13, adopt spraying method to spray organic material to the surface of the 1st organic film 35, form the 2nd light-emitting organic film 36 through heating, next, when as shown in Figure 14, with the 1st, the 2nd organic film 36 2 Formation method of organic thin films 35 and 36 In the same way, spray organic material onto the surface of the second organic thin film 36, and then heat to form the third organic thin film 37 with electron transport property, then the first to third organic thin films 35 ˜37 forms an organic light-emitting layer 40 in each hole 20 . The organic light emitting layers 40 in different holes 20 are separated from each other. The organic material is prevented from being sprayed to the outside of the hole 20 when spraying.

Here, the organic light-emitting layer 40 is formed with a thickness such that the surface height of the organic light-emitting layer 40 substantially coincides with the surface height of the first interlayer insulating film 40 .

Next, an opening is formed in the first interlayer insulating film 15 at a position not shown on the gate 34 so that the surface of the gate 34 is exposed from the bottom of the opening.

When in this state, the surface of the first interlayer insulating film 15, the surface of the third organic thin film 37 of the organic light-emitting layer 40, and the upper ends of the metal pillars 18 are also exposed. When the first wiring film 22 is formed as shown, the upper ends of the metal pillars 18 , the surface of the organic light emitting layer 40 , the surface of the gate 34 , etc. will be in contact with the first wiring film 22 . Metal films such as aluminum can be used for the first wiring film 22, the metal film 17 described above, and the second wiring film described later.

Next, the first wiring film 22 is patterned so that, as shown in FIG. The pixel electrode 43 covered by the thin film of the organic light-emitting layer 40 and the gate line connected to the gate 34 at a position not shown in the figure.

The source connection 42 is connected to the scan line 112 , and the gate connection is connected to the data line 111 .

Pixel electrodes 43 are respectively provided on the organic light emitting layers 40 , and the pixel electrodes 43 are separated and electrically insulated. In addition, each pixel electrode 43 is separated from the source connection 42 and electrically insulated.

Reference numeral 110 in FIG. 16 denotes a pixel. The pixel 110 is a pixel having a connection transistor 115 and an organic light emitting layer 40 connected to the drain region 33 (first main terminal) of the connection transistor 115 through a pixel electrode 43 .

When the first wiring film 22 is patterned, the scanning line 112 is also formed with the first wiring film 22 and connected to the source wiring 42 .

Next, after the second interlayer insulating film is formed on the source connection 42, the pixel electrode 43 and the first interlayer insulating film 15, an opening is formed at a predetermined position of the second interlayer insulating film. In the state where a part, or a part of the first wiring film 22 connected to the gate 34 is exposed from the bottom surface of the opening, a second wiring film is formed on the second interlayer insulating film, and the data line 111 is formed by patterning. After that, as shown in FIG. 17 , the display device 102 of the present invention is obtained. Reference numeral 19 in FIG. 17 denotes a second interlayer insulating film, and the data line 111 and the scanning line 112 are insulated by the second interlayer insulating film 19 . In addition, the scanning line 112 is insulated from the gate electrode 35 by the first interlayer insulating film 15 .

When forming the connection transistor 115 of the display device 102, a transistor (here, an n-channel MOSFET or a p-channel MOSFET) different from the connection transistor 115, a resistive element, a diode, etc. are also formed outside the region where the pixel 110 is provided. Components. These electronic components form the conduction control circuit 113 connected to the control terminal of each connection transistor 115 and the voltage application circuit 114 connected to the second main terminal.

This display device 102 has a plurality of pads composed of a part of the first wiring film 22 and the second wiring film 19 on the front side of the semiconductor substrate 10, and these pads are connected by bonding wires or the like. When connected to an external circuit, the conduction control circuit 113 and the voltage application circuit 114 are connected to the external circuit.

In addition, the surface of the common electrode 11 is exposed, and when the display device 102 is mounted on a lead frame for electrical connection, a voltage can be applied to the common electrode 11 by applying a voltage to the lead frame.

On one data line 111, the control terminals of all connection transistors 115 arranged on the same column in one display device 102 are connected thereto, and the second main terminals of all connection transistors 115 connected on the same data line 111 They are respectively connected to different scanning lines 112 .

In addition, on one scanning line 112, the second main terminals of all connection transistors 115 arranged on the same row in one display device 102 are connected thereto, and the second main terminals of all connection transistors 115 connected on the same scanning line 112 are connected to it. The control terminals are connected to different data lines 111 from each other.

When a voltage is applied to a selected data line 111 and a selected scanning line 112 through the conduction control circuit 113 and the voltage application circuit 114, only one connecting transistor 115 connected to the data line 111 and the scanning line 112 is turned on.

When the first conductivity type is n-type and the connection transistor 115 is an n-channel MOSFET, a positive voltage is applied to one data line 111, and the other data lines 111 are connected to the ground potential. Furthermore, one scanning line 112 is connected to the ground potential, and a positive voltage is applied to the other scanning lines 112 .

Since a pn junction is formed between the common electrode 11 and the first conductivity type portion of the semiconductor substrate 10, when the first conductivity type is n-type and the common electrode 11 is p-type, when a positive voltage is applied to the common electrode 11 Voltage, the same or higher positive voltage as the common electrode 11 is applied to the first conductivity type part of the semiconductor substrate 10 that is in contact with the common electrode 11, and the pn junction is reverse biased, so that the selected connection When the transistor 115 is turned on so that the pixel electrode 43 is connected to the common electrode 11 , a voltage will be applied between the front and the back of the organic light emitting layer 40 .

When a voltage is applied to the organic light-emitting layer 40, holes and electrons flow in the first and third organic thin films 35 and 37 respectively, and they combine in the second organic thin film 36 to make the second organic thin film 36 emit light.

When the thickness of the common electrode 11 is more than 200nm (200×10 ^-9 m) and less than 500nm (500×10 ^-9 m) and the semiconductor substrate 10 is made of single crystal silicon, the transmittance of visible light is more than 85%.

Therefore, the emitted light passes through the first organic thin film 35 and the common electrode 11 and is emitted to the outside.

When the common electrode 11 is placed on the lead frame, a through hole should be formed in the part of the lead frame on the area where the pixel 110 is placed, so as to avoid blocking the emitted light.

In addition, by forming a bump on the pad on the side where the pixel electrode 43 is formed, and placing the display device 102 on the wiring board in a state where the bump is connected to a hard wiring board or a flexible wiring board, it is possible to The surface of the common electrode 11 is exposed, so emitted light is not blocked. In this case, the common electrode 11 can also be connected to an external circuit by connecting the common electrode 11 to a hard circuit board or a flexible circuit board by means of welding leads or the like. For example, a metal thin film may be formed on a portion of the common electrode 11 that does not block emitted light, and the metal thin film may be used as an electrode to connect thin metal wires of welding leads.

The above-mentioned embodiment cites an example in which the connection transistor 115 is an n-channel MOSFET, but other switching devices such as a p-channel transistor or a double-base transistor may also be used.

In addition, in the above-mentioned embodiment, the drain terminal of the n-channel MOSFET is connected to the pixel electrode 43, the scanning line 112 is grounded, and a positive voltage is applied to the common electrode 11, but it is also possible to connect the source terminal of the n-channel MOSFET The pole terminal is connected to the pixel electrode, the common electrode 11 is grounded and a positive voltage is applied to the scanning line 112, so that a current flows in the organic light emitting layer. In this case, the first organic thin film 35 in contact with the common electrode has electron transport properties, and the third organic thin film 37 in contact with the pixel electrodes 43 has electron transport properties.

In the above-mentioned embodiment, there is only one common electrode 11, and the single surface of each organic light-emitting layer 40 is electrically at the same potential, but it is also possible to inject the impurity of the second conductivity type into the back surface of the semiconductor substrate 10 after patterning. The subsequent silicon oxide film or the like is used as a mask to perform pattern etching on the common electrode 11 . For example, a plurality of parallel wirings may be formed using the common electrode 11 , and the organic light emitting layers 40 in the same row or column of the organic light emitting layers 40 arranged in rows and columns may be connected to the wiring of the same common electrode 11 .

In addition, in the above-described embodiment, the semiconductor substrate 10 is composed of single crystal silicon, but it may be a semiconductor substrate composed of polycrystalline silicon or a single crystal or polycrystal of other semiconductors such as GaAs.

The present invention is not limited to the fact that each pixel 110 emits light in the same single color, but also includes a display device capable of displaying colors by emitting light in R, G, or B of the three colors of RGB. In addition, even if it emits light in a single color, it also includes a display device in which a color filter is arranged on the side of the common electrode 11 to display in color.

It is also possible to grind the front surface of the common electrode 11 after forming the common electrode 11 on the semiconductor substrate 10, or to grind the back surface of the semiconductor substrate 10 to reduce the thickness of the semiconductor substrate 10 to form the common electrode, so that there are The thickness of the semiconductor substrate 10 (thickness of the common electrode 11 in the above embodiment) at the bottom surface of the hole 20 is thinned.

Claims (11)

1. A display device, characterized in that, have: semiconductor substrate, A plurality of connection transistors formed on the semiconductor substrate, The plurality of holes formed on the semiconductor substrate, an organic light-emitting layer that emits light when an electric current flows, respectively disposed in each of said holes, and, pixel electrodes respectively arranged on the surface of each said organic light-emitting layer, Each of the connection transistors has first and second main terminals and a control terminal for controlling conduction between the first and second main terminals, The pixel electrodes on each of the organic light-emitting layers are electrically separated from each other, Each of the pixel electrodes is connected to the first main terminal of a different connection transistor. 2. The display device according to claim 1, wherein each of the holes is formed as a bottomed hole, the common electrode is exposed from the bottom surface thereof, and the bottom surface of the organic light-emitting layer is in contact with the common electrode. 3. The display device according to claim 2, wherein said common electrode is an impurity region formed inside said semiconductor substrate. 4. The display device according to claim 3, wherein the thickness between the bottom surface of said semiconductor substrate and the bottom surface of each said hole is below 500nm, and the light emitted by said organic light-emitting layer passes through said hole. The semiconductor substrate at the bottom of the hole projects outward. 5. The display device according to claim 3 or 4, wherein the conductivity type of the impurity region is the opposite conductivity type to that of the semiconductor substrate. 6. A display device, have: semiconductor substrate, The plurality of holes formed on the semiconductor substrate, The common electrodes respectively located on the bottom surface of each said hole, an organic light-emitting layer respectively disposed in each of said holes, and, pixel electrodes disposed on the surface of each of said organic light-emitting layers and electrically separated from each other, When a voltage is applied between the common electrode and the pixel electrode, and a current flows in the organic light emitting layer, the organic light emitting layer emits light, It is characterized by, The common electrode is composed of an impurity region formed in the semiconductor substrate. 7. The display device according to claim 6, wherein: A plurality of connection transistors are formed in the semiconductor substrate, Each of the connection transistors has first and second main terminals and a control terminal for controlling conduction between the first and second main terminals, Each of the pixel electrodes is connected to the first main terminal of a different connection transistor. 8. The display device according to claim 6 or 7, wherein the thickness between the bottom surface of said semiconductor substrate and the bottom surface of each said hole is more than 200nm and less than 500nm, and the light emitted by said organic light-emitting layer Light is emitted to the outside through the semiconductor substrate at the bottom of the hole. 9. The display device according to any one of claims 1 to 8, wherein: A plurality of electronic components including transistors different from the connection transistors are formed on the semiconductor substrate, A conduction control circuit connected to the control terminal of each of the connection transistors and a voltage application circuit connected to the second main terminal are formed on the semiconductor substrate by the electronic component, A desired transistor among the plurality of connection transistors is turned on by the conduction control circuit and the voltage application circuit, and a current flows in the first main terminal connected to the turned-on connection transistor. flow in the organic light-emitting layer to make the organic light-emitting layer emit light. 10. A method of manufacturing a display device, characterized in that: have: Doping impurities of the second conductivity type into the back surface of the semiconductor substrate of the first conductivity type to form a common electrode; A step of forming a plurality of holes on the front side of the semiconductor substrate to expose the common electrode in each of the holes; a step of forming an organic light-emitting layer in said hole; A step of forming a pixel electrode on the surface of each of the organic light-emitting layers. 11. The method of manufacturing a display device according to claim 10, wherein: forming a channel region of the second conductivity type in the semiconductor substrate, forming first and second regions separated from each other with the first conductivity type in the channel region, thereby forming a connection transistor, The first region is connected to the pixel electrode.

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