CN1897221A

CN1897221A - Fabrication method of deep trench

Info

Publication number: CN1897221A
Application number: CN200510083344.4A
Authority: CN
Inventors: 钟朝喜; 简荣吾
Original assignee: Promos Technologies Inc
Current assignee: Promos Technologies Inc
Priority date: 2005-07-12
Filing date: 2005-07-12
Publication date: 2007-01-17

Abstract

The method for preparing the deep groove comprises the steps of forming at least one groove in a substrate, forming a nitrogen-containing layer on the inner wall of the groove, forming a plurality of crystal grains covering the partial surface of the nitrogen-containing layer, forming a phosphorus-containing oxide layer on the surface of the nitrogen-containing layer and converting the phosphorus-containing oxide layer into etching liquid to remove the nitrogen-containing layer which is not covered by the crystal grains. The nitrogen-containing layer can be a silicon nitride layer, and the phosphorus-containing oxide layer can be a borophosphosilicate glass layer or a phosphosilicate glass layer. The method for converting the phosphorus-containing oxide layer into an etching solution can place the substrate in a water vapor environment, and the phosphorus-containing oxide layer reacts with the water vapor to generate phosphoric acid which can etch the nitrogen-containing layer.

Description

The preparation method of deep trench

Technical field

The present invention relates to a kind of preparation method of deep trench, particularly relate to a kind of preparation method who has bigger internal surface area thereby can be applicable to the deep trench of high integration dynamic random access memory.

Background technology

The capacitor of dynamic random access memory can be divided into stacking-type and two kinds of kenels of zanjon slot type.Stacked capacitor is formed on the silicon substrate surface, and the zanjon trench capacitor then is formed in silicon substrate inside.In recent years, the integrated level of dynamic random access memory increases apace along with the innovation of semiconductor process techniques, and in order to reach the purpose of high integration, must dwindle the size of transistor AND gate capacitor.Because it is long-pending that the capacitance of capacitor is proportional to its electrode plate surface, therefore dwindle capacitor sizes and will cause capacitance to descend, be unfavorable for the correct interpretation of storage data.Therefore, the researcher develops the doleiform deep-trench capacitor, and its internal surface area by being increased in the deep trench in the silicon substrate to be promoting the follow-up surface area that is formed at the lower electrode plate in the deep trench, and then promotes the capacitance of capacitor.

The existing skill of Fig. 1 to Fig. 5 illustration prepares the method for a roughening deep trench 10.At first in a substrate 12, form two adjacent grooves 16.Afterwards, form a bottom electrode 18 second outer rim, and utilize thermal oxidation method (or chemical vapour deposition (CVD)) collocation anisotropic etching to form a ring-type oxide layer 20 first inner peripheral surface in this groove 16 in this groove 16.

With reference to figure 2, utilize low-pressure chemical vapor deposition process, thermal oxidation technology or hot nitriding process form thickness circle in the screen (masking layer) 22 of 0.3-10 nanometer on this bottom electrode 18 and ring-type oxide layer 20.This screen 22 can be made of silica or silicon nitride, and covers the inwall of second inner edge of this groove 16.Afterwards, utilize low-pressure chemical vapor deposition process to form a plurality of siliceous nanocrystals (nanocrystallites) 24 in the local surfaces of this screen 22, as shown in Figure 3.

With reference to figure 4, utilize an etching solution that comprises phosphoric acid or hydrofluoric acid to carry out a wet etching process, optionally etching is not by the screen 22 of these nanocrystal silicon 24 coverings.Because this screen 22 is made of silica or silicon nitride, and this nanocrystal 24 is made of silicon, therefore the etching solution that comprises phosphoric acid is an etch shield with this nanocrystal silicon 24, the screen 22 that do not covered of etching optionally by this nanocrystal silicon 24, but keep the screen 22 of this nanocrystal 24 and below thereof.

With reference to figure 5, utilize an etching solution that mixes hydrofluoric acid and nitric acid to carry out a wet etching process, optionally remove groove 16 inwalls that this nanocrystal 24 and etching are not covered by this screen 22, to form a plurality of little grooves 26.Afterwards, remove this screen 22 with hydrofluoric acid or phosphoric acid again, to form this roughening deep trench 10.This roughening deep trench 10 has bigger internal surface area, helps to promote the capacitance of the deep-trench capacitor of follow-up formation.Because the inwall of this groove 16 and this nanocrystal 24 are made of silicon, and this screen 22 is made of silica or silicon nitride, therefore the etching solution that mixes hydrofluoric acid and nitric acid can be etch shield by this screen 22, carries out optionally etching and forms this roughening deep trench 10.

As previously mentioned, existing skill is utilized the screen 22 of the not good phosphoric acid etch of flowability in the Lower Half of this groove 16.Only, along with the aperture of this groove 16 dwindles, phosphoric acid is not easy to be delivered to the Lower Half of this groove 16, causes the etch-rate of this wet etching process not good.That is the reduced bore that the etch-rate of this wet etching process is subject to this groove 16 can't be promoted effectively with increasing the degree of depth.

Summary of the invention

Main purpose of the present invention provides a kind of preparation method who has big internal surface area thereby can be applicable to the deep trench of high integration dynamic random access memory, it utilizes the reaction of a phosphorous oxide layer and steam and the etching solution that generates is removed the nitrogenous layer in a deep trench Lower Half, thereby can solve the problem that traditional etching solution is difficult for being delivered to the deep trench Lower Half.

For reaching above-mentioned purpose, the present invention discloses a kind of preparation method of deep trench, its comprise form at least one groove in a substrate, form a nitrogenous layer in the inwall of this groove, form the crystal grain of the local surfaces of a plurality of these nitrogenous layers of covering, form a phosphorous oxide layer and be converted into the nitrogenous layer that an etching solution is not covered by this crystal grain with removal in the surface of this nitrogenous layer and with this phosphorous oxide layer.This nitrogenous layer can be a silicon nitride layer, and this phosphorous oxide layer can be a phosphorosilicate glass layer (PSG) or a boron-phosphorosilicate glass layer (BPSG).The method that this phosphorous oxide layer is converted into an etching solution can be positioned over this substrate in the water vapor atmosphere of temperature circle between 700-1000 ℃, and this phosphorous oxide layer will generate phosphoric acid with the steam reaction, but this nitrogenous layer of its etching.

Afterwards, utilize dilute hydrofluoric acid or buffered hydrofluoric acid to carry out a wet etching process, remove the phosphorous oxide layer in this groove.Then, utilize an etching solution that comprises ammoniacal liquor to carry out another wet etching process, ammoniacal liquor etching silicon and can etching of silicon nitride optionally only wherein, therefore this wet etching process is only removed the trench wall that crystal grain and etching are not covered by this silicon nitride on this nitrogenous layer, and form an inwall with convex-concave surface, can increase the internal surface area of this deep trench.

Existing skill must flowability is not good phosphoric acid etch liquid be delivered to the Lower Half of this groove from the opening of this groove, being etched in the silicon nitride layer of this lower half part of groove, thereby its etch-rate is subject to the pore size of this groove.Relatively, the present invention utilizes phosphoric acid etch liquid removal that phosphorous oxide layer and the steam reaction in this groove the generate nitrogenous layer at this trench wall, and steam is delivered to the pore size that Lower Half can't be subject to this groove from the opening of this groove, so the present invention can solve existing skill effectively and dwindles the problem that is faced because of the aperture of groove.

Description of drawings

The existing skill of Fig. 1 to Fig. 5 illustration prepares the method for a roughening deep trench; And

The present invention of Fig. 6 to Figure 11 illustration prepares the method for a roughening groove.

The simple symbol explanation

10 roughening deep trench, 12 substrates

16 grooves, 18 bottom electrodes

20 ring-type oxide layers, 22 screens

24 nanocrystals, 26 little grooves

40 roughening grooves, 42 substrates

44 ring-type oxide layers, 46 grooves

48 bottom electrodes, 52 nitrogenous layers

54 crystal grain, 56 phosphorous oxide layers

58 little grooves

Embodiment

The present invention of Fig. 6 to Figure 11 illustration prepares the method for a roughening deep trench 40.At first in a substrate 42, form two grooves 46.Generally speaking can form numerous groove usually on the substrate, only be simplicity of illustration herein.Afterwards, form a bottom electrode 48 second outer rim, and utilize thermal oxidation method (or chemical vapour deposition (CVD)) collocation anisotropic etching to form a ring-type oxide layer 44 first inner peripheral surface in this groove 46 in this groove 46.

With reference to figure 7, utilize low-pressure chemical vapor deposition process to form a nitrogenous layer 52 on the inwall of surperficial and this groove 46 of this substrate 42.Afterwards, form a plurality of crystal grain 54, it covers the local surfaces of this nitrogenous layer 52, as shown in Figure 8.This crystal grain 54 can be the polysilicon grain of size circle between the 15-30 nanometer, for example utilize the dome-type crystal grain that low-pressure chemical vapor deposition process forms (hemi-spherical grain, HSG).

With reference to figure 9, utilize low-pressure chemical vapor deposition process to form a phosphorous oxide layer 56 in the surface of this nitrogenous layer 52, this phosphorous oxide layer 56 covers this nitrogenous layer 52 and this crystal grain 54.Preferably, this nitrogenous layer 52 can be a silicon nitride layer, and this phosphorous oxide layer 56 can be a boron-phosphorosilicate glass layer or a phosphorosilicate glass layer.Afterwards, this phosphorous oxide layer 56 is converted into an etching solution optionally to remove the nitrogenous layer 52 that directly contacts with this phosphorous oxide layer 56, promptly remove the nitrogenous layer 52 that is not covered by this crystal grain 54, utilize dilute hydrofluoric acid or buffered hydrofluoric acid to carry out a wet etching process again and remove the unconverted residual phosphorous oxide layer 56 of etching solution that is, as shown in figure 10.

The method that this phosphorous oxide layer 56 is converted into an etching solution can be this substrate 42 is positioned in the water vapor atmosphere of temperature circle between 700-1000 ℃, this phosphorous oxide layer 56 will generate phosphoric acid with the steam reaction, it is an etch shield with this crystal grain 54, the nitrogenous layer 52 that etching is not covered by this crystal grain 54, and the nitrogenous layer 52 that keeps this crystal grain 54 and be capped.

Afterwards, utilizing an etching solution that comprises ammoniacal liquor, is that etch shield is carried out a wet etching process with the nitrogenous layer 52 that is covered by this crystal grain 54, and the inwall of this groove 46 of etching is to form a plurality of little grooves 58.Afterwards, remove this nitrogenous layer 52 again to form this roughening deep trench 40, as shown in figure 11.Because ammoniacal liquor is etching silicon and can etching of silicon nitride optionally only, so this wet etching process only removes the inwall of the groove 46 that polysilicon grain 54 on this nitrogenous layer 52 and etching do not cover by this nitrogenous layer 52, and forms an inwall with convex-concave surface.This groove 46 has the electrode of the inwall of convex-concave surface as a capacitor, and the internal surface area that increases this roughening groove 40 can increase the capacitance of this capacitor.

Existing skill must flowability is not good the etching solution Lower Half that is delivered to this groove from the opening of this groove being etched in the silicon nitride layer of this lower half part of groove, thereby its etch-rate is subject to the pore size of this groove.Relatively, the present invention utilizes phosphoric acid etch liquid removal that phosphorous oxide layer and the steam reaction in this groove the generate nitrogenous layer at this trench wall, and steam is delivered to the pore size that Lower Half can't be subject to this groove from the opening of this groove, so the present invention can solve existing skill effectively and dwindles the problem that is faced because of the aperture of groove.Profess it, the present invention only needs this substrate is positioned over (for example in the water vapor atmosphere) in the gaseous environment, but the phosphorous oxide layer in this groove can change into the etching solution of this nitrogenous layer of etching under this environment.Therefore, the present invention does not need to carry the bottom of the etching solution of this nitrogenous layer to this groove from the opening part of this groove, thereby can be applicable to have the high integration dynamic random access memory of the groove of smaller opening.

Technology contents of the present invention and technical characterstic disclose as above, yet those skilled in the art still may be based on teaching of the present invention and announcements and done all replacement and modifications that does not deviate from spirit of the present invention.Therefore, protection scope of the present invention should be not limited to those disclosed embodiments, and should comprise various do not deviate from replacement of the present invention and modifications, and is contained by following claim.

Claims

1. the preparation method of a deep trench comprises the following steps:

Form at least one groove in a substrate;

Form the inwall of a nitrogenous layer in this groove;

Form a plurality of crystal grain, it covers the local surfaces of this nitrogenous layer;

Form a phosphorous oxide layer in the surface of this nitrogenous layer; And

This phosphorous oxide layer is converted into an etching solution to remove the nitrogenous layer that is not covered by this crystal grain.

2. the preparation method of deep trench according to claim 1, wherein this crystal grain is polysilicon grain.

3. the preparation method of deep trench according to claim 1, wherein size circle of this crystal grain is between the 15-30 nanometer.

4. the preparation method of deep trench according to claim 1, wherein this nitrogenous layer is a silicon nitride layer, and this phosphorous oxide layer is a boron-phosphorosilicate glass layer.

5. the preparation method of deep trench according to claim 1, wherein this nitrogenous layer is a silicon nitride layer, and this phosphorous oxide layer is a phosphorosilicate glass layer.

6. the preparation method of deep trench according to claim 1 wherein forms a phosphorous oxide layer and utilizes a low-pressure chemical vapor deposition process in the surface of this nitrogenous layer.

7. the preparation method of deep trench according to claim 1 wherein should phosphorous oxide layer be converted into an etching solution this substrate is positioned in the water vapor atmosphere.

8. the preparation method of deep trench according to claim 7 wherein is converted into reaction temperature circle of an etching solution between 700-1000 ℃ with this phosphorous oxide layer.

9. the preparation method of deep trench according to claim 8, wherein this etching solution is a phosphoric acid.

10. the preparation method of deep trench according to claim 1, it also comprises and carries out a wet etching process, removes the phosphorous oxide layer in this groove.

11. the preparation method of deep trench according to claim 10, wherein the etching solution of this wet etching process is dilute hydrofluoric acid or buffered hydrofluoric acid.

12. the preparation method of deep trench according to claim 1, it also comprises and carries out a wet etching process, and this trench wall that etching is not covered by this nitrogenous layer forms convex-concave surface.

13. the preparation method of deep trench according to claim 12, wherein the etching solution of this wet etching process comprises ammoniacal liquor.

14. the preparation method of deep trench according to claim 12, wherein this wet etching process uses the nitrogenous layer that is covered by this crystal grain to be etch shield.

15. the preparation method of deep trench according to claim 12, wherein this wet etching process is removed crystal grain on this nitrogenous layer.

16. the preparation method of deep trench according to claim 12, wherein the inwall of this groove tool convex-concave surface is as the electrode of a capacitor.