[go: up one dir, main page]

TWI302343B - Method for preparing a deep trench - Google Patents

Method for preparing a deep trench Download PDF

Info

Publication number
TWI302343B
TWI302343B TW94121824A TW94121824A TWI302343B TW I302343 B TWI302343 B TW I302343B TW 94121824 A TW94121824 A TW 94121824A TW 94121824 A TW94121824 A TW 94121824A TW I302343 B TWI302343 B TW I302343B
Authority
TW
Taiwan
Prior art keywords
layer
nitrogen
trench
preparing
deep trench
Prior art date
Application number
TW94121824A
Other languages
Chinese (zh)
Other versions
TW200701338A (en
Inventor
Chao Hsi Chung
Jung Wu Chien
Original Assignee
Promos Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Promos Technologies Inc filed Critical Promos Technologies Inc
Priority to TW94121824A priority Critical patent/TWI302343B/en
Priority to US11/222,966 priority patent/US20060234441A1/en
Publication of TW200701338A publication Critical patent/TW200701338A/en
Application granted granted Critical
Publication of TWI302343B publication Critical patent/TWI302343B/en

Links

Landscapes

  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)

Description

1302343 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種深溝渠之製備方法,特別係關於一種 具有較大之内表面積因而可應用於高集積度動態隨機存取 記憶體之深溝渠的製備方法。 【先前技術】 動態隨機存取記憶體之電容器可分為堆疊式和深溝渠式 二種型態。堆疊式電容器係形成在矽基板表面,而深溝渠 式電容器則是形成在石夕基板内部。近年來,動態隨機存取 記憶體之集積度隨著半導體製程技術之創新而快速地增加 ’而為了達成高集積度之目的’必須縮小電晶體與電容器 之尺寸。由於電容器之電容值係正比於其電極板表面積, 因此縮小電容器尺寸將導致電容值下降,不利於儲存資料 之正確判讀。因此,研究人員開發出瓶形深溝渠電容器, 其係藉由增加在矽基板内之深溝渠的内表面積以提昇後續 形成於深溝渠内之下電極板的表面積,進而提昇電容器之 電容值。 、,圖1至圖5例示習知技藝製備一粗糙化深溝渠1〇之方法。 百先在-基板12中形成二個相鄰之溝渠16。n,形成一 ^電極18於該溝渠16之下半外緣,並利用熱氧化法(或化學 軋相沉積)搭配非等向性蝕刻以形成一環狀氧化層2〇於該 溝渠16之上半内緣表面。 /考圖2,制低壓化學氣相沈積製程、熱氧化製程或熱 ""衣耘形成厚度界於0.3-10奈米之遮罩層(masking1302343 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD The present invention relates to a method for preparing a deep trench, and more particularly to a deep trench having a large internal surface area and thus applicable to a high-concentration dynamic random access memory. Preparation method. [Prior Art] Capacitors of the dynamic random access memory can be classified into a stacked type and a deep trench type. The stacked capacitor is formed on the surface of the germanium substrate, and the deep trench capacitor is formed inside the substrate. In recent years, the degree of accumulation of dynamic random access memory has rapidly increased with the innovation of semiconductor process technology, and the size of transistors and capacitors has to be reduced in order to achieve high integration. Since the capacitance of the capacitor is proportional to the surface area of the electrode plate, reducing the size of the capacitor will result in a decrease in the capacitance value, which is not conducive to the correct interpretation of the stored data. Therefore, researchers have developed bottle-shaped deep trench capacitors that increase the capacitance of capacitors by increasing the internal surface area of the deep trenches in the germanium substrate to increase the surface area of the electrode plates that are subsequently formed in the deep trenches. 1 to 5 illustrate a method of preparing a roughened deep trench 1 by conventional techniques. Two adjacent trenches 16 are formed in the substrate 12. n, forming an electrode 18 on the lower outer edge of the trench 16, and using thermal oxidation (or chemical rolling deposition) with anisotropic etching to form an annular oxide layer 2 over the trench 16 Half inner edge surface. /Test Figure 2, Low Pressure Chemical Vapor Deposition Process, Thermal Oxidation Process or Thermal ""The formation of a mask layer with a thickness of 0.3-10 nm (masking)

101S73.DOC P26164 101873 004^8^^7 -6- 1302343 1㈣)22於該下電極18及環狀氧化層2〇上。該遮罩層Μ可由 氧匕夕或氮化石夕構成,且覆蓋該溝渠16之下半内緣的内壁 曰之後’利用低壓化學氣相沈積製程形成複數個含矽奈米 曰曰粒(nanocrystalhtes)24於該遮罩層22之局部表面,如圖3 所示。 :考园利用一包含鱗酸或氫氟酸之姓刻液進行一溼|虫 刻製私,選擇性地蝕刻未被該奈米晶矽24覆蓋之遮罩層22 ,由於β遮罩層22係由氧化⑨或氮化秒構成,而該奈米晶 係由矽構成,因此包含磷酸之蝕刻液以該奈米晶矽24 為1虫刻遮罩’可選擇性地蝕刻未被該奈米晶矽24覆蓋之遮 罩層22,但保留該奈米晶粒24及其下方之遮罩層22。 多考圖5利用一混合氫氟酸及硝酸之餘刻液進行一溼餘 d製私選擇性地去除該奈米晶粒24及蝕刻未被該遮罩層 22覆蓋之溝渠16内壁,以形成複數個微溝渠26。之後,再 以虱氟酸或磷酸去除該遮罩層22,以形成該粗糙化深溝渠 1〇。该粗糙化深溝渠1〇具有較大之内表面積,有助於提昇 後續形成之深溝渠電容器的電容值。由於該溝渠16之内壁 及該奈米晶粒24係由矽構成,而該遮罩層22係由氧化矽或 氮化矽構成’因此混合氫氟酸及硝酸之餘刻液可以該遮罩 層22為钱刻笔;罩,進行選擇性地餘刻而形成該粗糖化深溝 渠10 〇 如前所述,習知技藝係利用流動性不佳之磷酸蝕刻在該 溝渠16之下半部的遮罩層22。惟,隨著該溝渠16之孔徑縮 小,磷酸不易於輸送至該溝渠16之下半部,導致該溼蝕刻101S73.DOC P26164 101873 004^8^^7 -6- 1302343 1(d)) 22 is on the lower electrode 18 and the annular oxide layer 2〇. The mask layer may be composed of a cerium or a nitrite, and after covering the inner wall of the lower inner edge of the trench 16, a plurality of nanocrystals are formed by a low pressure chemical vapor deposition process. 24 is a partial surface of the mask layer 22, as shown in FIG. The test garden uses a sulphuric acid or hydrofluoric acid-containing engraving solution to perform a wet etching process to selectively etch the mask layer 22 not covered by the nanocrystal wafer 24, since the beta mask layer 22 It is composed of oxidation 9 or nitridation, and the nanocrystal is composed of ruthenium, so the etchant containing phosphoric acid is selectively masked by the nanocrystal 矽24 as a worm mask. The wafer 24 covers the mask layer 22, but retains the nanocrystal grains 24 and the mask layer 22 therebelow. Figure 5 is a method of selectively removing the nanocrystal grains 24 and etching the inner walls of the trenches 16 not covered by the mask layer 22 by using a residual solution of hydrofluoric acid and nitric acid to form a moisture residue. A plurality of microchannels 26 are provided. Thereafter, the mask layer 22 is removed by hydrofluoric acid or phosphoric acid to form the roughened deep trench. The roughened deep trench 1 has a large internal surface area, which helps to increase the capacitance of the subsequently formed deep trench capacitor. Since the inner wall of the trench 16 and the nanocrystal grain 24 are composed of tantalum, the mask layer 22 is composed of tantalum oxide or tantalum nitride. Therefore, the residual layer of hydrofluoric acid and nitric acid may be used for the mask layer. 22 is a pen for money; a cover is selectively engraved to form the deep saccharified deep trench 10 〇 As described above, conventional techniques utilize a poorly flowing phosphoric acid to etch a mask on the lower half of the trench 16 Layer 22. However, as the aperture of the trench 16 is reduced, phosphoric acid is not easily transported to the lower half of the trench 16, resulting in the wet etching.

I01873.DOC P26164 101873 〇〇4.ς8ϋΤ7 1302343 . 冑'之蝕刻速率不佳。亦即該溼蝕刻製程之蝕刻速率係受 :艮於該溝渠16之縮小孔徑與增長深度而無法有效地予以提 • 昇。 • 【發明内容】 本t月之主要目的係提供一種具有較大内表面積因而可 應用於高集積度動態隨機存取記憶體之深溝渠的製備方法 利用3 4氧化層與水蒸氣反應而生成之餘刻液去除 _ ^珠溝渠下半部之含氮層,因而可解決傳統姓刻液不易 輸送至深溝渠下半部的問題。 為達成上述目的,本發明揭示一種深溝渠之製備方法, /、匕3形成至少一溝渠於一基板中、形成一含氮層於該溝 木之内壁、形成複數個覆蓋該含氮層之局部表面的晶粒, 形成一含磷氧化層於該含氮層之表面以及將該含磷氧化層 轉化為一蝕刻液以去除未被該晶粒覆蓋之含氮層。該含氮 層可為一氮化矽層,而該含磷氧化層可為一磷矽玻璃層 φ (PSG)或一硼磷矽玻璃層(BpsG)。將該含磷氧化層轉化為一 飯刻液之方法可將該基板放置於溫度界於7〇〇_1〇〇〇c>c間之 水療氣環境中,該含磷氧化層將與水蒸氣反應生成磷酸, 其可蝕刻該含氮層。 之後’利用稀釋氳氟酸或緩衝氫氟酸進行一溼姓刻製程 ’去除該溝渠内之含磷氧化層。接著,利用一包含氨水之 蝕刻液進行另一溼蝕刻製程,其中氨水僅選擇性地蝕刻矽 而不會蝕刻氮化矽,因此該溼蝕刻製程僅去除該含氮層上 晶粒及餘刻未被該氮化矽覆蓋之溝渠内壁,而形成一具有I01873.DOC P26164 101873 〇〇4.ς8ϋΤ7 1302343 . The etch rate of 胄' is not good. That is, the etching rate of the wet etching process is not effectively increased by the reduced aperture and the depth of growth of the trench 16. • [Summary of the Invention] The main purpose of this month is to provide a method for preparing deep trenches with a large internal surface area and thus can be applied to a high-concentration dynamic random access memory (DRAM). The residual liquid removes the nitrogen-containing layer in the lower half of the bead ditch, thereby solving the problem that the conventional surname is not easily transported to the lower half of the deep trench. In order to achieve the above object, the present invention discloses a method for preparing a deep trench, wherein 匕3 forms at least one trench in a substrate to form a nitrogen-containing layer on the inner wall of the trench to form a plurality of partial surfaces covering the nitrogen-containing layer. The crystal grains form a phosphorus-containing oxide layer on the surface of the nitrogen-containing layer and convert the phosphorus-containing oxide layer into an etching solution to remove the nitrogen-containing layer not covered by the crystal grains. The nitrogen-containing layer may be a tantalum nitride layer, and the phosphorus-containing oxide layer may be a phosphorous glass layer φ (PSG) or a borophosphon glass layer (BpsG). The method for converting the phosphorus-containing oxide layer into a rice engraving liquid can be placed in a spa atmosphere between a temperature range of 7 〇〇 1 〇〇〇 c > c, the phosphorus-containing oxide layer and water vapor The reaction produces phosphoric acid which etches the nitrogen containing layer. Thereafter, the phosphorus-containing oxide layer in the trench is removed by performing a wet etching process using diluted hydrofluoric acid or buffered hydrofluoric acid. Then, another wet etching process is performed by using an etching solution containing ammonia water, wherein the ammonia water selectively etches only the germanium without etching the tantalum nitride, so the wet etching process only removes the crystal grains on the nitrogen-containing layer and remains unfinished. The inner wall of the trench covered by the tantalum nitride, forming a

101873.DOC P26164 101873 1302343 凹凸表面之内壁,可增加該深溝渠之内表面積。 習知技藝必須將流動性不佳之磷酸蝕刻液從該溝渠之開 口輸达至该溝渠之下半部,以蝕刻在該溝渠下半部之氮化 石夕層’因而其㈣速率受限於該溝渠之孔徑大小。相對地 、本么月係利用在該溝渠内之含構氧化層與水蒸氣反應生 成之^刻液去除在該溝渠内壁之含氮層,而將水蒸氣 伙。亥溝本m 口輸送至τ半部並不會受限於該溝渠之孔徑 大j 口此本發明可有效地解決習知技藝因溝渠之孔徑縮 小所面臨之問題。 【實施方式】 圖6至圖11例不本發明製備一粗縫化深溝渠之方法。首 先在基板42中形成二個溝渠46。一般而言,該基板42上 通常會形成許多溝渠46,圖6至圖n僅為舉例圖示。之後, I成下電極48於該溝渠46之下半外緣,並利用熱氧化法( 或化予氣相/儿積)搭配非等向性蝕刻以形成一環狀氧化層 44於該溝渠46之上半内緣表面。 參考圖7,利用低壓化學氣相沈積製程形成一含氮層52 於該基板42之表面及該溝渠46之内壁上。之後,形成複數 個晶粒54’其覆蓋該含氮層52之局部表面,如圖8所示。該 晶粒54可為尺寸界於15_3G奈米間之多晶石夕晶/粒,例如利用 低壓化學氣相沈積製程形成之半球型晶粒(hemi_sphericai grain,HSG)。 一含攝氧化層 參考圖9,利用低壓化學氣相沈積製程形成 56於該含氣層52之表面 該含碟氧化層56覆蓋該含氮層52101873.DOC P26164 101873 1302343 The inner wall of the concave and convex surface, which increases the internal surface area of the deep trench. Conventional techniques must transport a poorly flowing phosphoric acid etchant from the opening of the trench to the lower half of the trench to etch a layer of nitride in the lower half of the trench' such that its (four) rate is limited by the trench The size of the aperture. In contrast, in this month, the nitrogen-containing layer on the inner wall of the trench is removed by the reaction of the oxide layer containing the oxide layer in the trench and the water vapor, and the water vapor is used. The transport of the H-channel to the τ half is not limited by the aperture of the ditch. The present invention can effectively solve the problems faced by the prior art due to the reduction of the aperture of the ditch. [Embodiment] Figs. 6 to 11 illustrate a method of preparing a rough-slit deep trench without the present invention. First, two trenches 46 are formed in the substrate 42. In general, a plurality of trenches 46 are typically formed on the substrate 42. Figures 6 through n are merely illustrative. Thereafter, a lower electrode 48 is formed on the lower outer edge of the trench 46, and is anisotropically etched by thermal oxidation (or gas phase/integration) to form an annular oxide layer 44 in the trench 46. Upper semi-inner edge surface. Referring to FIG. 7, a nitrogen-containing layer 52 is formed on the surface of the substrate 42 and the inner wall of the trench 46 by a low pressure chemical vapor deposition process. Thereafter, a plurality of crystal grains 54' are formed which cover a partial surface of the nitrogen-containing layer 52 as shown in FIG. The crystal grains 54 may be polycrystalline crystals/grains having a size range of 15 to 3 G between nanometers, for example, hemi-spherical grains (HSG) formed by a low pressure chemical vapor deposition process. An oxide-containing layer is formed on the surface of the gas-containing layer 52 by a low-pressure chemical vapor deposition process. The disk-containing oxide layer 56 covers the nitrogen-containing layer 52.

IOI873.DOC P26164 101873 004<=;8^^^7 1302343 及該晶粒54。較佳地,該含氮層52可為一氮化矽層,而該 含磷氧化層56可為一硼磷矽玻璃層或一磷矽玻璃層。之後 ,將該含磷氧化層56轉化為一蝕刻液以選擇性地去除直接 與該含磷氧化層56接觸之含氮層52,即去除未被該晶粒54 覆盍之含氮層52,再利用稀釋氫氟酸或緩衝氫氟酸進行一 溼蝕刻製程去除未轉化為蝕刻液之殘留的含磷氧化層5 6, 如圖10所示。 將該含磷氧化層56轉化為一蝕刻液之方法可為將該基板 42放置於溫度界於70〇_1〇〇〇〇c間之水蒸氣環境中,該含磷 氧化層56將與水蒸氣反應生成磷酸,其以該晶粒54為蝕刻 遮罩,蝕刻未被該晶粒54覆蓋之含氮層52,而保留該晶粒 54及被覆蓋之含氮層52。 之後’利用一包含氨水之蝕刻液,以被該晶粒54覆蓋之 含氮層52為蝕刻遮罩進行一溼蝕刻製程,蝕刻該溝渠“之 内壁以形成複數個微溝渠5 8。之後,再去除該含氮層52以 形成該粗糙化深溝渠4〇,如圖丨丨所示。由於氨水僅選擇性 地蝕刻矽而不會蝕刻氮化矽,因此該溼蝕刻製程僅去除該 含氣層52上之多晶矽晶粒54及蝕刻未被該含氮層52覆蓋之 溝渠46的内壁,而形成一具有凹凸表面之内壁。該溝渠牝 具有凹凸表面之内壁係作為一電容器之電極,而增加該粗 縫化溝渠40之内表面積可增加該電容器之電容值。 習知技蟄必須將流動性不佳之蝕刻液從該溝渠之開口輸 送至該溝渠之下半部以蝕刻在該溝渠下半部之氮化矽層, 因而其I虫刻速率受限於該溝渠之孔徑大小。相對地,本發IOI 873.DOC P26164 101873 004 <=; 8^^^7 1302343 and the die 54. Preferably, the nitrogen-containing layer 52 may be a tantalum nitride layer, and the phosphorus-containing oxide layer 56 may be a borophosphophosphorus glass layer or a phosphorous-phosphorus glass layer. Thereafter, the phosphorus-containing oxide layer 56 is converted into an etchant to selectively remove the nitrogen-containing layer 52 directly in contact with the phosphorus-containing oxide layer 56, that is, the nitrogen-containing layer 52 not covered by the crystal grains 54 is removed. Further, a wet etching process is performed by diluting hydrofluoric acid or buffered hydrofluoric acid to remove the phosphorus-containing oxide layer 5 6 which is not converted into an etching liquid, as shown in FIG. The method for converting the phosphorus-containing oxide layer 56 into an etching solution may be to place the substrate 42 in a water vapor environment having a temperature between 70 〇 and 1 〇〇〇〇c, and the phosphorus-containing oxide layer 56 and water. The vapor reaction produces phosphoric acid with the die 54 as an etch mask, etching the nitrogen-containing layer 52 that is not covered by the die 54, and retaining the die 54 and the nitrogen-containing layer 52 that is covered. Then, using a etchant containing ammonia, the nitrogen-containing layer 52 covered by the die 54 is subjected to a wet etching process for etching the trench, and the inner wall of the trench is etched to form a plurality of microchannels 58. Thereafter, The nitrogen-containing layer 52 is removed to form the roughened deep trench 4〇, as shown in FIG. 。. Since the ammonia water selectively etches only the germanium and does not etch the tantalum nitride, the wet etching process removes only the gas-bearing layer. a polycrystalline germanium grain 54 on 52 and an inner wall of the trench 46 not covered by the nitrogen-containing layer 52 to form an inner wall having a concave-convex surface. The inner wall of the trench having a concave-convex surface serves as an electrode of a capacitor, and the addition The internal surface area of the rough slit trench 40 can increase the capacitance value of the capacitor. It is known in the art to transport an etchant having poor fluidity from the opening of the trench to the lower half of the trench to be etched in the lower half of the trench. The tantalum nitride layer, and thus its I insect engraving rate is limited by the pore size of the trench.

I01873.DOC P26164 101873 004585337 -10- I3〇2343 明係利用在該溝渠内之含磷氧化層與水蒸氣反應生成之磷 酸姓刻液去除在該溝渠内壁之含氮層,而將水蒸氣從該溝 渠之開口輸送至下半部並不會受限於該溝渠之孔徑大小, 因此本發明可有效地解決習知技藝因溝渠之孔徑縮小所面 臨之問題。申言之,本發明僅需將該基板放置於一氣相環 境中(例如置於水蒸氣環境中),在此氣相環境下該溝渠内之 含碟氧化層即可轉化成可蝕刻該含氮層之蝕刻液。因此, 本發明並不需要從該溝渠之開口處輸送該含氮層之蝕刻液 至該溝渠之底部,因而可應用於具有較小開口之溝渠的高 集積度動態隨機存取記憶體。 本發明之技術内容及技術特點已揭示如上,然而熟悉本 項技術之人士仍可能基於本發明之教示及揭示而作種種不 背離本發明精神之替換及修飾。因此,本發明之保護範圍 應不限於實施例所揭示者’而應包括各種不背離本發明之 替換及修飾,並為以下之申請專利範圍所涵蓋。 【圖式簡要說明】 圖1至圖5例示習知技藝製備一粗糙化深溝渠之方法·以 及 / ’ Μ 圖6至圖11例示本發明製備一粗糙化溝渠之方法。 【主要元件符號說明】 10 粗糙化深溝渠 12 基板 16 溝渠 18 下電極 20 環狀氧化層 22 遮罩層 24 奈米晶粒 26 微溝渠I01873.DOC P26164 101873 004585337 -10- I3〇2343 The use of a phosphoric acid oxide layer formed by the reaction of a phosphorus-containing oxide layer in the trench with water vapor to remove the nitrogen-containing layer on the inner wall of the trench, and the water vapor is removed from the The opening of the opening of the trench to the lower half is not limited by the size of the aperture of the trench, so the present invention can effectively solve the problems faced by the prior art due to the reduction of the aperture of the trench. In other words, the present invention only needs to place the substrate in a gas phase environment (for example, in a water vapor environment), in which the disk containing oxide layer in the trench can be converted into an etchable nitrogen-containing layer. Layer etchant. Therefore, the present invention does not need to transport the etchant of the nitrogen-containing layer from the opening of the trench to the bottom of the trench, and thus can be applied to a high-concentration dynamic random access memory having a trench having a small opening. The technical contents and technical features of the present invention have been disclosed as above, and those skilled in the art can still make various substitutions and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is not to be construed as limited by the scope of BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 to 5 illustrate a method of preparing a roughened deep trench by a conventional technique, and/or FIG. 6 to FIG. 11 illustrate a method of preparing a roughened trench of the present invention. [Main component symbol description] 10 Roughening deep trench 12 Substrate 16 Ditch 18 Lower electrode 20 Annular oxide layer 22 Mask layer 24 Nano grain 26 Micro trench

IOI873.DOC Ρ26164 101873 -11 - 1302343 40 粗糖化溝渠 42 基板 44 環狀氧化層 46 溝渠 48 下電極 52 含氮層 54 晶粒 56 含填氧化層 58 微溝渠IOI873.DOC Ρ26164 101873 -11 - 1302343 40 Crude saccharification ditch 42 Substrate 44 Annular oxide layer 46 Ditch 48 Lower electrode 52 Nitrogen-containing layer 54 Grain 56 Filled with oxide layer 58 Microchannel

##

Claims (1)

1302343’十、申請專利範圍: 、ι 一種深溝渠之製備方法 •形成至少一溝渠於一 第094121824號專利申請案 申請專利範園替換本(97年5月) b 〔曼)正本 ’包含下列步驟: 基板中; 形成一含氮層於該溝渠之内壁; 形成複數個晶粒,其覆蓋該含氮層之局部表面·, 形成—含磷氧化層於該含氮層及該等晶粒之表面;以 將該含磷氧化層部分轉化為一蝕刻液以去除未被該晶 粒覆蓋之含氮層。 % 2. 根據請求項1之深溝渠之製備方法,其中該晶粒係多晶石夕 晶粒。 3. 根據請求項1之深溝渠之製備方法,其中該晶粒之尺寸係 界於15-30奈米之間。 4·根據請求項1之深溝渠之製備方法,其中該含氮層係一氮 化夕層而该含碟氧化層係一侧填石夕玻璃層。 根據月长項i之殊溝渠之製備方法,其中該含氮層係一氮 化夕層而該含碌氧化層係一鱗石夕玻璃層。 6·根據請求項1之深溝渠之製備方法,其中形成一含填氧化 3 Μ之表面係利用—低壓化學氣相沈積製程。 •=求項1之深溝渠之製備方法,其中將該含構氧化層 舻媸二士蝕刻液係將該基板放置於-水蒸氣環境中。 求項7之深溝渠之製備方法,其中將該含填氧化層 :蝕刻液之反應溫度係界於7〇(M〇〇〇〇C之間。 9 ·根據請求j酉s夕、、穴、装、、f 酸。員8之-溝渠之製備方法,其中侧讓 1302343 1〇.=據請求項1之深溝渠之製備方法,其在去除未被該晶粒 覆盖之含I層後,另包含進行一澄银刻製程,去除該溝渠 内未轉化為银刻液之含磷氧化層。 11·根據請求項10之深溝渠之製備方法,其中該渔蝕刻製程之 蝕刻液係稀釋氫氟酸或緩衝氫氟酸。 12. 根據請求項i之深溝渠之製備方法,其在去除未被該晶粒 覆孤之3氮層後,另包含進行一澄触刻製程,钮刻未被該 含氮層覆蓋之該溝渠内壁,形成凹凸表面。 13. 根據請求項12之深溝渠之製備方法,其中該㈣刻製程之 餘刻液包含氨水。 14. 根據請求項12之深溝準之掣偌 再木之裊備方法,其中該溼蝕刻製程係 使用被該晶粒覆蓋之含氮層為蝕刻遮罩。 ’、 15. 根據請求項12之深溝渠之芻偌士 术衣備方法,其中該溼蝕刻製裎本 除該含氮層上晶粒。 太 16·根據請求項12之深溝準之掣供士、丄u 再木之I備方法,其中該溝渠具凹凸矣 面之内壁係作為一電容器之電極。 表1302343' X. Patent application scope: ι A method for preparing a deep ditch • Forming at least one ditch in a patent application No. 094121824 to apply for a patent garden replacement (June 1997) b [Man] Original 'includes the following steps Forming a nitrogen-containing layer on the inner wall of the trench; forming a plurality of crystal grains covering a partial surface of the nitrogen-containing layer, forming a phosphorus-containing oxide layer on the nitrogen-containing layer and surfaces of the crystal grains And partially converting the phosphorus-containing oxide layer into an etching solution to remove the nitrogen-containing layer not covered by the crystal grains. % 2. The method for preparing a deep trench according to claim 1, wherein the crystallite is a polycrystalline sprite. 3. The method of preparing a deep trench according to claim 1, wherein the size of the crystal grain is between 15 and 30 nm. 4. The method of preparing a deep trench according to claim 1, wherein the nitrogen-containing layer is a nitrile layer and the disk-containing oxide layer is filled with a stone layer on one side. According to the preparation method of the moon-length item i, the nitrogen-containing layer is a nitrile layer and the niobium-containing layer is a scale stone layer. 6. The method for preparing a deep trench according to claim 1, wherein a surface system containing a ruthenium oxide is formed by a low pressure chemical vapor deposition process. • The method of preparing a deep trench of claim 1, wherein the substrate is placed in a water vapor environment. The method for preparing a deep trench of claim 7, wherein the reaction temperature of the oxide-containing layer: the etching solution is between 7 〇 (M〇〇〇〇C. 9) according to the request j酉s 夕, acupoint, The preparation method of the 8th-ditch of the squad, wherein the side is made 1302343 1〇.= According to the preparation method of the deep trench of claim 1, after removing the layer I without being covered by the grain, The method comprises the following steps: preparing a phosphorus-containing oxide layer which is not converted into a silver engraving liquid in the trench. 11. The method for preparing a deep trench according to claim 10, wherein the etching solution of the fish etching process dilutes hydrofluoric acid Or buffering hydrofluoric acid. 12. According to the preparation method of the deep trench of claim i, after removing the nitrogen layer not covered by the crystal grain, the method further comprises performing a one-touch process, and the button is not included in the The inner wall of the trench covered by the nitrogen layer forms a concave-convex surface. 13. The preparation method of the deep trench according to claim 12, wherein the residual liquid of the (four) etching process comprises ammonia water. 14. According to the deep trench of claim 12 a method for preparing a wood, wherein the wet etching process is covered by the die The nitrogen-containing layer is an etch mask. ', 15. According to claim 12, the method of preparing a gentle trench for a deep trench, wherein the wet-etched sputum is except for the grain on the nitrogen-containing layer. Item 12: The deep trench is the electrode of the 掣 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再 再
TW94121824A 2005-04-13 2005-06-29 Method for preparing a deep trench TWI302343B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW94121824A TWI302343B (en) 2005-06-29 2005-06-29 Method for preparing a deep trench
US11/222,966 US20060234441A1 (en) 2005-04-13 2005-09-12 Method for preparing a deep trench

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW94121824A TWI302343B (en) 2005-06-29 2005-06-29 Method for preparing a deep trench

Publications (2)

Publication Number Publication Date
TW200701338A TW200701338A (en) 2007-01-01
TWI302343B true TWI302343B (en) 2008-10-21

Family

ID=45070464

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94121824A TWI302343B (en) 2005-04-13 2005-06-29 Method for preparing a deep trench

Country Status (1)

Country Link
TW (1) TWI302343B (en)

Also Published As

Publication number Publication date
TW200701338A (en) 2007-01-01

Similar Documents

Publication Publication Date Title
TW538497B (en) Method to form a bottle-shaped trench
TW432689B (en) Fabricating method of stacked capacitor
TW457707B (en) Method for forming a crown capacitor having HSG for DRAM memory
JP2005032800A (en) Manufacturing method of semiconductor device
TWI302343B (en) Method for preparing a deep trench
CN207852668U (en) Array of capacitors structure, semiconductor memory
US8524093B2 (en) Method for forming a deep trench
US20030143855A1 (en) Method of forming a bottle-shaped trench in a semiconductor substrate
TW586129B (en) Method of forming bottle-shaped trench capacitors
TW455987B (en) Deep trench structure with large surface area and its manufacturing method
TW521398B (en) Process of integrating capacitance-use groove with removal of black silicon
TWI277176B (en) Method for preparing a deep trench
US20080124935A1 (en) Two-step process for manufacturing deep trench
TW444401B (en) Manufacturing method of deep trench capacitor
US6235604B1 (en) Manufacturing process for a capacitor
CN207265048U (en) Semiconductor memory
TWI260745B (en) Method for fabricating a deep trench capacitor of DRAM
TW442967B (en) Surface tip rounding method of the lower electrode of capacitor
TW385520B (en) Method of manufacturing dynamic RAM access memory
TW382792B (en) Method and structure for making bottom electrode of capacitor
US20040175877A1 (en) Method of forming a bottle-shaped trench
TW423153B (en) Manufacturing method of the bottom electrode of DRAM capacitor
TW315524B (en) Dynamic random access memory cell with roughened polysilicon electrode
TW541653B (en) Method for Forming Bottle-Shape Trench
TW543109B (en) Formation method of bottle-shaped trench using electrochemical etching

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees