CN1875669A - Printed circuit board including track gap-filled resin and fabricating method thereof - Google Patents
Printed circuit board including track gap-filled resin and fabricating method thereof Download PDFInfo
- Publication number
- CN1875669A CN1875669A CNA2004800316579A CN200480031657A CN1875669A CN 1875669 A CN1875669 A CN 1875669A CN A2004800316579 A CNA2004800316579 A CN A2004800316579A CN 200480031657 A CN200480031657 A CN 200480031657A CN 1875669 A CN1875669 A CN 1875669A
- Authority
- CN
- China
- Prior art keywords
- tgfr
- pcb
- trace
- dielectric layer
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/285—Permanent coating compositions
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/012—Flame-retardant; Preventing of inflammation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0209—Inorganic, non-metallic particles
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/025—Abrading, e.g. grinding or sand blasting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0315—Oxidising metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/383—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by microetching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/385—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by conversion of the surface of the metal, e.g. by oxidation, whether or not followed by reaction or removal of the converted layer
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
技术领域technical field
本发明涉及一种印刷电路板(PCB),特别地涉及一种具有走线间隙填充树脂(TGFR)(以下称为TGFR PCB)的印刷电路板及其制造方法,其中,具有特殊组成的TGFR应用在形成于PCB板上的走线间隙中并经平整后,以便走线间的电绝缘和电介质强度得到提高并防止了在PCB板上安装和焊接电子元件时发生的短路现象。The present invention relates to a printed circuit board (PCB), in particular to a printed circuit board with trace gap filling resin (TGFR) (hereinafter referred to as TGFR PCB) and a manufacturing method thereof, wherein the TGFR with a special composition is applied After being formed in the wiring gap on the PCB and flattened, the electrical insulation and dielectric strength between the wiring can be improved and the short circuit phenomenon that occurs when installing and soldering electronic components on the PCB is prevented.
背景技术Background technique
通常,PCB是一种薄板,其上焊接有诸如集成电路,电阻和开关等电子元件。制造PCB时,在由诸如环氧或酚醛塑料电绝缘树脂构成的薄板上贴上铜箔,然后,在被用作电路互连的铜箔某部分上涂覆抗蚀剂。然后,把涂覆了抗蚀剂的板浸泡于能腐蚀铜的腐蚀液中,未被抗蚀剂涂覆的铜箔部分被腐蚀了。然后,当去除所述抗蚀剂时,铜箔的所需电路布图就保留在该板上。在所述具有电路布图的铜箔需要安装电子元件的部分上钻孔,并且在铜箔的其它部分覆盖用于防止被焊料腐蚀的蓝色防焊剂。Generally, a PCB is a thin plate on which electronic components such as integrated circuits, resistors, and switches are soldered. When manufacturing a PCB, copper foil is attached to a thin plate made of an electrical insulating resin such as epoxy or phenolic plastic, and then a resist is applied to a portion of the copper foil that is used for circuit interconnection. Then, the resist-coated board was immersed in an etching solution capable of corroding copper, and the portion of the copper foil not coated with the resist was corroded. Then, when the resist is removed, the desired circuit layout of the copper foil remains on the board. Holes are drilled on the part of the copper foil with circuit layout that needs to be installed with electronic components, and other parts of the copper foil are covered with blue solder resist for preventing corrosion by solder.
图1是现有的PCB结构的剖面示意图。如图1所示,现有的PCB的中间部分是电介质层1。在电介质层1的每个外表面,形成有导电焊盘2和走线3。在导电焊盘2和走线3之间形成特定宽度的走线间隙6。在导电焊盘2和走线3上,是由阻焊层(solder mask)4或表面涂覆层(surface finish)5构成的给定图形。FIG. 1 is a schematic cross-sectional view of an existing PCB structure. As shown in FIG. 1 , the middle part of an existing PCB is a dielectric layer 1 . On each outer surface of the dielectric layer 1, a conductive pad 2 and a wire 3 are formed. A trace gap 6 of a specific width is formed between the conductive pad 2 and the trace 3 . On the conductive pad 2 and the trace 3, there is a given pattern formed by a solder mask 4 or a surface finish 5.
电介质层1又被称为“预浸材料”,它是经过对由纸或玻璃纤维制成的用于PCB的强化的布进行热处理后而得到的,然后对它的表面使用硅烷联结剂进行处理并涂覆各种树脂(或浸泡于树脂中)。The dielectric layer 1 is also called "prepreg material", which is obtained by heat-treating a reinforced cloth made of paper or glass fiber for PCB, and then treating its surface with a silane bonding agent And coated with various resins (or soaked in resin).
预浸材料与铜箔层压并压合形成为铜箔层压电介质板。多个电介质板互相叠加并经过充分的加热和加压处理。在此层压过程中,铜箔层被粘合于一个或二个层压板的表面。The prepreg is laminated with copper foil and pressed to form a copper foil laminated dielectric board. Multiple dielectric plates are stacked on top of each other and subjected to sufficient heat and pressure treatment. In this lamination process, a layer of copper foil is bonded to one or both laminate surfaces.
然后,将被用于电路的铜箔部分涂覆油墨或干膜抗蚀剂,未被涂覆抗蚀剂的部分则被腐蚀。在所述腐蚀过程以后保留的铜箔部分上钻孔,并镀上用于连接金属。然后,各种电子元件被焊接在铜箔层的适当位置。在有些情况下,电子元件也可以使用环氧胶粘贴在铜箔层上。Then, the portion of the copper foil that will be used for the circuit is coated with ink or dry film resist, and the portion that is not coated with resist is etched. Holes are drilled in the portion of copper foil remaining after the etching process and plated with metal for connection. Then, various electronic components are soldered in place on the copper foil layer. In some cases, electronic components can also be attached to the copper foil layer using epoxy glue.
因此,根据现有技术的PCB制造过程,不可能生产出电介质层1厚度比走线厚度小的产品。并且,现有的PCB会受到诸如热,湿度和绝缘的使用环境的显著影响。例如,当其冷却效应降低时,现有PCB会由于温度升高而出现分层(delimination)。而且,当现有PCB安装上电子元件并工作后,产品可靠性会因PCB本身或电子元件产生的热而下降。另外,由于走线间隙6使现有的PCB存在很高的挠性,在PCB板上安装和装配电子元件时会产生很多残次品。Therefore, according to the PCB manufacturing process of the prior art, it is impossible to produce a product in which the thickness of the dielectric layer 1 is smaller than that of the traces. Also, existing PCBs are significantly affected by usage environments such as heat, humidity, and insulation. For example, when its cooling effect is reduced, existing PCBs may experience delimitation due to temperature rise. Moreover, when the existing PCB is mounted with electronic components and operated, product reliability will be reduced due to heat generated by the PCB itself or the electronic components. In addition, due to the high flexibility of the existing PCB due to the wiring gap 6 , many defective products will be produced when installing and assembling electronic components on the PCB.
特别地,在厚铜PCB的情况,构成导电焊盘2的铜箔在焊接时暴露在外部环境中,可能导致短路现象。并且,由于树脂浸透可能不完全,电介质层1必须使用较大厚度。In particular, in the case of a thick copper PCB, the copper foil constituting the conductive pad 2 is exposed to the external environment during soldering, which may cause a short circuit phenomenon. Also, since the impregnation of the resin may not be complete, the dielectric layer 1 must use a greater thickness.
发明内容Contents of the invention
因此,本发明用于克服上述现有技术问题,并且本发明的目的是提供一种具有走线间隙填充树脂(TGFR)的印刷电路板(PCB),该PCB的制造方法包括步骤:对板进行蚀刻和表面清理;对走线表面和壁面进行氧化或微蚀处理;在走线间隙填充TGER;对填充的TGFR进行固化和平整,从而完成走线间隙填充了TGFR的PCB。Therefore, the present invention serves to overcome the above-mentioned prior art problems, and an object of the present invention is to provide a printed circuit board (PCB) with trace gap filling resin (TGFR), the manufacturing method of which comprises the steps of: Etching and surface cleaning; oxidation or micro-etching treatment on the surface and wall of the trace; filling TGER in the trace gap; curing and flattening the filled TGFR to complete the PCB filled with TGFR in the trace gap.
并且,本发明提供了一种多层厚铜PCB板的制造方法,包括:上述目的中的步骤;对内层线路进行氧化处理,敷层及层压的步骤;和对外层线路进行表面清理,涂覆PSF及干燥,曝光,显影,PSR固化和丝网印刷的步骤。And, the present invention provides a kind of manufacturing method of multi-layer thick copper PCB board, comprise: the step in the above-mentioned object; Carry out the step of oxidizing inner layer circuit, cladding and lamination; Carry out surface cleaning with outer layer circuit, Steps of coating PSF and drying, exposing, developing, PSR curing and screen printing.
附图说明Description of drawings
图1是现有的PCB结构的剖面示意图。FIG. 1 is a schematic cross-sectional view of an existing PCB structure.
图2是本发明涉及的TGFR PCB结构的剖面示意图。Fig. 2 is a schematic cross-sectional view of the TGFR PCB structure involved in the present invention.
图3是多个本发明涉及的TGFR PCB叠放后的剖面示意图。Fig. 3 is a schematic cross-sectional view of multiple stacked TGFR PCBs involved in the present invention.
图4是本发明涉及的TGFR PCB的制造过程的流程示意图。Fig. 4 is a schematic flow chart of the manufacturing process of the TGFR PCB involved in the present invention.
具体实施方式Detailed ways
以下是参照附图对本发明的详细描述,其中,图2是一个本发明涉及的TGFR PCB结构的剖面示意图;图3是多个本发明涉及的TGPR PCB叠放后的剖面示意图;图4是本发明涉及的TGFR PCB的制造过程的流程示意图。The following is a detailed description of the present invention with reference to the accompanying drawings, wherein, Fig. 2 is a schematic cross-sectional view of a TGFR PCB structure involved in the present invention; Fig. 3 is a schematic cross-sectional view of a plurality of TGPR PCBs involved in the present invention stacked; Fig. 4 is a schematic cross-sectional view of this invention Schematic diagram of the manufacturing process of the TGFR PCB involved in the invention.
如图2所示,本发明涉及的TGPR PCB在中间部分有电介质层1。在电介质层1的每个外表面,形成有导电焊盘2和走线3,以及走线间隙填充树脂(TGFR)10被填充于导电焊盘2和走线3之间。在导电焊盘2和走线3上,是由阻焊层(solder mask)4或表面涂覆层(surfacefinish)5构成的给定图形。As shown in Figure 2, the TGPR PCB involved in the present invention has a dielectric layer 1 in the middle part. On each outer surface of the dielectric layer 1 , conductive pads 2 and traces 3 are formed, and trace gap filling resin (TGFR) 10 is filled between the conductive pads 2 and the traces 3 . On the conductive pad 2 and the trace 3, there is a given pattern formed by a solder mask 4 or a surface finish 5.
TGFR10是具有增强走线间绝缘和电介质强度的组成的新的合成树脂。在本发明的一种实施方式中,TGFR优选地包括18-23wt%的DGEBPA(双酚A的二环氧甘油醚),3-7wt%的改性环环氧树脂,27-33wt%的DBDO,3-7wt%的三氧化锑,30-35wt%的氢氧化铝和3-7wt%的双氰胺。TGFR10 is a new synthetic resin with a composition that enhances insulation and dielectric strength between traces. In one embodiment of the present invention, TGFR preferably comprises 18-23wt% of DGEBPA (diglycidyl ether of bisphenol A), 3-7wt% of modified epoxy resin, 27-33wt% of DBDO , 3-7wt% antimony trioxide, 30-35wt% aluminum hydroxide and 3-7wt% dicyandiamide.
在另一种实施方式中,TGFR10优选地包括5-10wt%的改性环环氧树脂,40-50wt%的氢氧化铝,20-30wt%的矿质水,和大约10wt%的阻燃剂,固化剂和色素。这种配方具有优良的散热效应。In another embodiment, TGFR10 preferably includes 5-10wt% modified epoxy resin, 40-50wt% aluminum hydroxide, 20-30wt% mineral water, and about 10wt% flame retardant, Hardeners and pigments. This formula has excellent heat dissipation effect.
阻焊层4是PCB的一部分,它是将油墨涂覆在PCB上,用来防止焊料附着到PCB上元件安装层不应该附着的部分并且使PCB表面电路不与外界环境接触。它也被称为“阻焊剂”或“阻焊层”。在本发明中,为便于描述,覆盖有油墨的部分特指阻焊层4。The solder resist layer 4 is a part of the PCB, and it is used to apply ink on the PCB to prevent solder from adhering to parts of the PCB where the component mounting layer should not be attached and to keep the surface circuit of the PCB from contacting the external environment. It is also known as "solder mask" or "solder mask". In the present invention, for the convenience of description, the part covered with ink refers to the solder resist layer 4 .
阻焊层4可以通过根据使用环境和状况适当选择的处理过程而制成。这种处理过程的实例包括:光阻焊剂(PSR)处理过程是将黏度为150-300泊的油墨覆盖于具有电路的整个基板上,曝光并显影;液体光成像(LPI)处理过程,与PSR完全相同但使用黏度小于100泊的油墨;及红外线(IR),掩模(masking)和碳处理过程是在基板表面上透过网板将需要的部分涂覆油墨后印刷而不需要曝光。在本发明的一个实施方式中,阻焊层4是通过PSR处理过程得到的。The solder resist layer 4 can be produced by a process appropriately selected according to the use environment and conditions. Examples of such processes include: Photosolder Resist (PSR) processes, where inks with a viscosity of 150-300 poises are applied over the entire substrate with circuitry, exposed and developed; Liquid Photoimaging (LPI) Exactly the same but using inks with a viscosity less than 100 poise; and Infrared (IR), masking and carbon treatment process is to apply ink on the surface of the substrate through a screen and print without exposure. In one embodiment of the present invention, the solder resist layer 4 is obtained through a PSR process.
此外,本发明中,阻焊层4所在位置比导电焊盘2上的表面涂覆层5高,因此改善了走线间的电绝缘性及防止了由于铜箔曝露于外部环境而发生短路的现象。In addition, in the present invention, the location of the solder resist layer 4 is higher than the surface coating layer 5 on the conductive pad 2, thus improving the electrical insulation between the traces and preventing the occurrence of a short circuit due to the exposure of the copper foil to the external environment. Phenomenon.
同时,TGFR PCB也可以形成多层结构。在本发明的一个实施方式中,图3所示,是一种具有三层结构的多层厚铜PCB。At the same time, TGFR PCB can also form a multi-layer structure. In one embodiment of the present invention, shown in FIG. 3 , is a multi-layer thick copper PCB with a three-layer structure.
如图3所示,本发明涉及的多层厚铜PCB的上部具有一个上电介质层1。在电介质层1的上表面形成了外层线路12,包括导电焊盘2,走线3,和填充于导电焊盘2和走线3之间走线间隙的TGFR10。在导电焊盘2和走线3上,是由阻焊层4或表面涂覆层5构成的给定图形。As shown in FIG. 3 , the upper part of the multilayer thick copper PCB involved in the present invention has an upper dielectric layer 1 . An outer circuit 12 is formed on the upper surface of the dielectric layer 1 , including a conductive pad 2 , a trace 3 , and a TGFR 10 filling the trace gap between the conductive pad 2 and the trace 3 . On the conductive pad 2 and the wiring 3 , there is a given pattern formed by the solder resist layer 4 or the surface coating layer 5 .
此外,在电介质层1的下表面,是由导电焊盘2,走线3,和填充于导电焊盘2和走线3之间走线间隙的TGFR10构成的内层线路11。In addition, on the lower surface of the dielectric layer 1 , there is an inner circuit 11 composed of conductive pads 2 , traces 3 , and TGFR 10 filling the trace gap between the conductive pads 2 and the traces 3 .
内层线路11经过氧化处理以增强它与位于在内层线路11的下表面的中间的电介质层1的附着力。然后,内层线路11与中间电介质层1紧密地黏附。The inner layer wiring 11 is oxidized to enhance its adhesion to the dielectric layer 1 located in the middle of the lower surface of the inner layer wiring 11 . Then, the inner layer wiring 11 is tightly adhered to the intermediate dielectric layer 1 .
在中间的电介质层11的下表面,是由导电焊盘2,走线3,和填充于导电焊盘2和走线3之间走线间隙的TGFR 10构成的内层线路11。在所述的内层线路11的下表面,附着了一个下部的电介质层11。On the lower surface of the dielectric layer 11 in the middle, there is an inner layer circuit 11 composed of a conductive pad 2, a wiring 3, and a TGFR 10 filling the wiring gap between the conductive pad 2 and the wiring 3. On the lower surface of the inner layer circuit 11, a lower dielectric layer 11 is attached.
在下部的电介质层1的下表面,是由导电焊盘2,走线3,和填充于导电焊盘2和走线3之间走线间隙的TGFR10构成的外层线路12。在导电焊盘2和走线3上,是由阻焊层4或表面涂覆层5构成的给定图形。On the lower surface of the lower dielectric layer 1 is an outer circuit 12 composed of conductive pads 2 , traces 3 , and TGFR 10 filling the trace gap between the conductive pads 2 and the traces 3 . On the conductive pad 2 and the wiring 3 , there is a given pattern formed by the solder resist layer 4 or the surface coating layer 5 .
根据以上描述,通过在单层TGFR PCBs的内层线路11之间放置电介质层1,就可以容易地制造出多层厚铜PCB。According to the above description, by placing the dielectric layer 1 between the inner layer lines 11 of single-layer TGFR PCBs, a multi-layer thick copper PCB can be easily fabricated.
在下文中将参照流程图图4描述本发明涉及的TGFR PCB的制造方法的每一步骤。Each step of the TGFR PCB manufacturing method involved in the present invention will be described below with reference to the flow chart FIG. 4 .
按照电路设计图,首先通过钻孔步骤S1在PCB板上钻一些需要的孔。为了在PCB板上形成电路连接,然后在PCB板上进行化学和电镀铜步骤S2。According to the circuit design diagram, first drill some required holes on the PCB board through the drilling step S1. In order to form a circuit connection on the PCB, chemical and electrolytic copper plating step S2 is then performed on the PCB.
对已镀铜PCB板进行蚀刻步骤S3以及步骤S4形成给定宽度的走线间隙6。Etching step S3 and step S4 are performed on the copper-plated PCB to form a trace gap 6 with a given width.
步骤S5主要是对已经具有走线间隙6的PCB基板进行表面清理以去除杂质。在表面处理步骤中,使用微蚀和/或氧化处理对走线间隙的表面和内壁进行处理。Step S5 is mainly to clean the surface of the PCB substrate already having the wiring gap 6 to remove impurities. In the surface treatment step, micro-etching and/or oxidation treatment is used to treat the surface and inner wall of the wiring gap.
完成表面清理步骤S5后,步骤S6是将走线间隙填充树脂10涂覆于走线间隙6。TGFR10是用印刷或辊涂方法涂覆,再通过外部的热风机或加热器迅速固化。After the surface cleaning step S5 is completed, step S6 is to apply the wiring gap filling resin 10 to the wiring gap 6 . TGFR10 is coated by printing or roller coating, and then cured quickly by an external hot air blower or heater.
TCFR10被固化后,步骤S7是通过打磨、刷光、切裁或它们的组合平整TGFR的表面。After TCFR10 is cured, step S7 is to smooth the surface of TGFR by grinding, brushing, cutting or their combination.
随后的步骤是分别对内层线路11和外层线路12进行不同处理。The subsequent steps are to perform different treatments on the inner layer circuit 11 and the outer layer circuit 12 respectively.
对于内层线路11,步骤S11是对内层线路表面进行氧化处理以增强形成电介质层1的树脂和内层线路11的附着力。然后,顺序执行敷层步骤S12和层压步骤S13。随后的步骤与制造多层PCB板的通常过程相同,因此这里省略这些描述。For the inner circuit 11 , step S11 is to oxidize the surface of the inner circuit to enhance the adhesion between the resin forming the dielectric layer 1 and the inner circuit 11 . Then, the cladding step S12 and the lamination step S13 are sequentially performed. Subsequent steps are the same as the usual process of manufacturing a multi-layer PCB board, so these descriptions are omitted here.
对于外层线路12,在涂覆PSR之前先进行表面清理步骤S21。在表面清理步骤S21中,对走线间隙的表面和内壁进行微蚀和/或氧化处理。For the outer circuit 12, the surface cleaning step S21 is performed before coating the PSR. In the surface cleaning step S21 , microetching and/or oxidation treatment is performed on the surface and inner wall of the wiring gap.
对施行了表面清理步骤S21后的PCB板的表面,依次进行涂覆和干燥光阻焊剂(PSR)步骤S22,曝光步骤S23,显影步骤S24,PSR固化步骤S25和丝网印刷步骤S26。这些和随后的步骤与制造多层PCB板的通常过程相同,因此这里就省略这些描述。To the surface of the PCB board after the surface cleaning step S21 is carried out, the step S22 of coating and drying photo-solder resist (PSR), the step S23 of exposure, the step S24 of developing, the step S25 of PSR curing and the step S26 of screen printing are carried out successively. These and subsequent steps are the same as the usual process of manufacturing multi-layer PCB boards, so these descriptions are omitted here.
虽然以上是为达到说明目的,对本发明的优选实施方式的描述,但是可以理解,本领域的技术人员能够对本发明做出多种修改和改变。但是这些修改和改变都应被认为不超出本发明的保护范围。Although the above is a description of preferred embodiments of the present invention for illustrative purposes, it will be appreciated that those skilled in the art can make various modifications and changes to the present invention. However, these modifications and changes should not go beyond the protection scope of the present invention.
工业适用性Industrial applicability
如上所述,在本发明涉及的TGFR PCB中,一种具有特殊组成的新的树脂TGFR被填充于走线间隙6,因此可以防止分层(delamination),从而改善了走线间电绝缘和电介质强度。另外,由于电介质层1上的走线间隙6被填充了TGFR,就可以生产出电介质层1的厚度比走线厚度小的产品。此外,由于使用了合成树脂,PCB或安装其上的电子元件在工作时具有了优良的冷却效果,并且对它们的使用环境(热,湿度和绝缘性)具有优良的可靠性。As mentioned above, in the TGFR PCB involved in the present invention, a new resin TGFR with a special composition is filled in the trace gap 6, so delamination can be prevented, thereby improving the electrical insulation and dielectric between traces strength. In addition, since the trace gap 6 on the dielectric layer 1 is filled with TGFR, it is possible to produce a product in which the thickness of the dielectric layer 1 is smaller than that of the trace. In addition, due to the use of synthetic resin, the PCB or electronic components mounted thereon have an excellent cooling effect during operation and excellent reliability against their usage environment (heat, humidity, and insulation).
另外,由于走线间隙6被TGFR10填充,本发明涉及的PCB具有挠性,因此在PCB板上安装和装配元件时不良发生率明显减少。并且,TGFR10可以防止导电焊盘2的壁上的铜箔部分曝露于外部环境,因此可以防止在PCB上安装和焊接元件时的短路现象。In addition, since the trace gap 6 is filled with TGFR10, the PCB involved in the present invention is flexible, so the occurrence rate of defects when installing and assembling components on the PCB board is significantly reduced. Moreover, the TGFR10 can prevent the copper foil on the wall of the conductive pad 2 from being exposed to the external environment, and thus can prevent short circuits when mounting and soldering components on the PCB.
Claims (6)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/KR2004/000891 WO2005101929A1 (en) | 2004-04-19 | 2004-04-19 | Printed circuit board including track gap-filled resin and fabricating method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1875669A true CN1875669A (en) | 2006-12-06 |
Family
ID=35150382
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2004800316579A Pending CN1875669A (en) | 2004-04-19 | 2004-04-19 | Printed circuit board including track gap-filled resin and fabricating method thereof |
Country Status (3)
| Country | Link |
|---|---|
| CN (1) | CN1875669A (en) |
| TW (1) | TWI303143B (en) |
| WO (1) | WO2005101929A1 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109196963A (en) * | 2016-06-17 | 2019-01-11 | 株式会社村田制作所 | The manufacturing method of resin multilayer substrate |
| CN109845415A (en) * | 2016-10-14 | 2019-06-04 | 德国艾托特克公司 | Method for manufacturing printed circuit board |
| CN109890146A (en) * | 2019-02-14 | 2019-06-14 | 广州京写电路板有限公司 | A kind of production method that printed circuit board is used in small component attachment |
| CN112770541A (en) * | 2020-12-07 | 2021-05-07 | 深圳市隆利科技股份有限公司 | Processing method for improving surface roughness of flexible circuit board and flexible circuit board |
| CN113347777A (en) * | 2020-03-02 | 2021-09-03 | Abb电力电子公司 | Printed circuit board for power supply |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102016215051A1 (en) * | 2016-08-12 | 2018-02-15 | Robert Bosch Gmbh | Device and air conditioning device |
| JP2018041803A (en) | 2016-09-06 | 2018-03-15 | 日本メクトロン株式会社 | Flexible printed circuit board and method for manufacturing flexible printed circuit board |
| CN108990262B (en) * | 2018-03-20 | 2021-07-09 | 东莞市若美电子科技有限公司 | Manufacturing process of double-sided thick copper circuit board |
| CN114340174B (en) * | 2022-01-10 | 2024-04-05 | 鹤山市泰利诺电子有限公司 | Drilling method of single panel and single panel manufactured by drilling method |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5153084A (en) * | 1990-09-10 | 1992-10-06 | General Electric Company | Process for preparing a photo-mask for imaging three-dimensional objects |
| US5906042A (en) * | 1995-10-04 | 1999-05-25 | Prolinx Labs Corporation | Method and structure to interconnect traces of two conductive layers in a printed circuit board |
| JPH09148748A (en) * | 1995-11-20 | 1997-06-06 | Taiyo Ink Mfg Ltd | Multilayer printed wiring board, manufacture thereof and composite for forming resin insulating layer to be used therefor |
| JP2002280741A (en) * | 2001-03-16 | 2002-09-27 | Hitachi Chem Co Ltd | Multilayer printed wiring board and its manufacturing method |
-
2004
- 2004-04-19 WO PCT/KR2004/000891 patent/WO2005101929A1/en not_active Ceased
- 2004-04-19 CN CNA2004800316579A patent/CN1875669A/en active Pending
-
2005
- 2005-04-19 TW TW094112450A patent/TWI303143B/en not_active IP Right Cessation
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109196963A (en) * | 2016-06-17 | 2019-01-11 | 株式会社村田制作所 | The manufacturing method of resin multilayer substrate |
| CN109196963B (en) * | 2016-06-17 | 2020-12-04 | 株式会社村田制作所 | Manufacturing method of resin multilayer substrate |
| CN109845415A (en) * | 2016-10-14 | 2019-06-04 | 德国艾托特克公司 | Method for manufacturing printed circuit board |
| CN109845415B (en) * | 2016-10-14 | 2020-12-08 | 德国艾托特克公司 | Method for manufacturing a printed circuit board |
| CN109890146A (en) * | 2019-02-14 | 2019-06-14 | 广州京写电路板有限公司 | A kind of production method that printed circuit board is used in small component attachment |
| CN113347777A (en) * | 2020-03-02 | 2021-09-03 | Abb电力电子公司 | Printed circuit board for power supply |
| CN112770541A (en) * | 2020-12-07 | 2021-05-07 | 深圳市隆利科技股份有限公司 | Processing method for improving surface roughness of flexible circuit board and flexible circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI303143B (en) | 2008-11-11 |
| WO2005101929A1 (en) | 2005-10-27 |
| TW200536445A (en) | 2005-11-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100598275B1 (en) | Passive element embedded printed circuit board and its manufacturing method | |
| KR100598274B1 (en) | Resistor-embedded printed circuit board and manufacturing method thereof | |
| CN102084731A (en) | Printed wiring board and method for manufacturing same | |
| JP2004363542A (en) | Solder resist pattern formation method | |
| CN101911850B (en) | Manufacturing method of multilayer printed circuit board | |
| CN101534609A (en) | Circuit structure on circuit board and manufacturing method thereof | |
| US6834426B1 (en) | Method of fabricating a laminate circuit structure | |
| CN1875669A (en) | Printed circuit board including track gap-filled resin and fabricating method thereof | |
| JPH1187865A (en) | Printed circuit board and its manufacture | |
| JPH07106728A (en) | Rigid flex printed wiring board and manufacturing method thereof | |
| KR101222828B1 (en) | Method of manufacturing coreless substrate | |
| JP2010016061A (en) | Printed wiring board, and manufacturing method therefor | |
| KR100651422B1 (en) | Manufacturing method of multilayer printed circuit board using batch lamination method | |
| KR100520261B1 (en) | Method for preparing PCB | |
| JP4639733B2 (en) | Method for manufacturing printed wiring board | |
| KR20070034766A (en) | Full Layer Inner Via Printed Circuit Board Using Peel Plating and Its Manufacturing Method | |
| JPS5921095A (en) | Method of producing multilayer printed circuit board | |
| JPH0828576B2 (en) | Manufacturing method of printed wiring board | |
| CN1376018A (en) | Multi-layer printed wiring base plate and mfg. method thereof | |
| KR101231343B1 (en) | The printed circuit board and the method for manufacturing the same | |
| JP7390846B2 (en) | Rigid-flex multilayer printed wiring board and its manufacturing method | |
| KR20120012732A (en) | Printed circuit board and manufacturing method thereof | |
| KR100651342B1 (en) | Manufacturing method of multilayer printed circuit board using conductive liquid photosensitive material | |
| JPH09260849A (en) | Inner layer circuit board manufacturing method and multilayered printed wiring board manufacturing method | |
| JP4433971B2 (en) | Printed wiring board and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| ASS | Succession or assignment of patent right |
Owner name: ZHAO XIANGUI Free format text: FORMER OWNER: RON ELECTRONICS CO., LTD. Effective date: 20080711 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20080711 Address after: Gyeonggi Do, South Korea Applicant after: Zhao Xiangui Address before: Gyeonggi Do, South Korea Applicant before: Youngeun Electronics Co., Ltd. |
|
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Open date: 20061206 |