CN1376018A - Multi-layer printed wiring base plate and mfg. method thereof - Google Patents

Abstract

Multi-layer printed wiring board and manufacturing method therefor are to flatly form a wiring pattern on a connection hole, to make the connection hole finer, and further to make the wiring pattern thin. The manufacturing method of the multi-layer printed wiring board includes the following steps: On a board a 1st wiring pattern is formed and on the board provided with the 1st wiring pattern, a thin-film insulating layer is formed; and a connection hole is formed in the thin-film insulating layer so that the 1st wiring pattern is exposed to the outside, and a metal conductive layer is formed on the thin-film insulating layer having the connection hole and then selectively removed to form metal bumps. An inter-layer insulating layer is formed on the thin-film insulating layer, and a 2nd wiring pattern is formed on the inter-layer insulating layer.

Description

Multilayer printed wiring board and its manufacturing method

technical field

The present invention relates to a composite multilayer printed wiring board in which a conductor layer is formed on an interlayer insulating layer and a method for manufacturing the same.

Background technique

Along with the miniaturization of electronic equipment, printed wiring boards are required to have high-density wiring. In response to this, there is a composite multilayer printed wiring board among printed wiring boards. In such a multilayer printed wiring board, for example, an interlayer insulating layer is formed on the first wiring pattern formed on the substrate, and a connection hole for interlayer connection with the second wiring pattern is formed on the interlayer insulating layer. , and then plate copper on the entire surface of the interlayer insulating layer including the connection holes, and make a pattern to form a second wiring pattern.

The interlayer insulating layer formed on the first wiring pattern is formed by coating ink on the surface of the substrate or laminating a dry film on the surface of the substrate, and the connection holes formed on the interlayer insulating layer use light Engraving, laser, etc. to form.

However, since the second wiring pattern is formed by plating copper on the surface of the interlayer insulating layer including the inner surface of the connection hole and forming a pattern, the part where the connection hole is formed or the surrounding area of this multilayer printed wiring board may be formed. Sag. When depressions are formed on the second wiring pattern, that is, on the outer layer pattern of the multilayer printed wiring board, electronic components cannot be mounted in a stable state.

Therefore, by filling the connection holes with conductive paste and burying the connection holes, depressions can no longer be formed on the second wiring pattern, that is, on the outer layer pattern where the connection holes are formed or around them. However, since the conductive paste must be filled in the connection holes, it is difficult to miniaturize the connection holes.

That is, in order to realize the above-mentioned high-density wiring, it is necessary to form the wiring pattern on the connection hole flatly, and form the connection hole more finely to make the wiring pattern thinner.

In order to meet these three requirements, the original method is to bury connection holes by using this plating when copper plating is performed on the interlayer insulating layer for forming the second wiring pattern. However, in this method, the electroplating treatment must be performed until the thickness that can bury the connection hole is reached. Therefore, the plating layer is too thick on the area where the connection hole is not provided in the interlayer insulating layer, which cannot realize the printed wiring board. thinning. It is very difficult to completely bury the connection hole by copper plating.

As another method, in order to form the second wiring pattern, copper is plated on the entire surface of the interlayer insulating layer including the inner surface of the connection hole, and then the connection hole is buried with ink or the like. A conductor layer is formed on the connection hole, and a cap is plated on the connection hole. However, in this method, it is also difficult to reduce the thickness of the printed wiring board, because the electroplating process must be performed twice, and the plating layer constituting the second wiring pattern becomes thicker. Since the plating treatment must be performed twice, the productivity of the printed wiring board cannot be further improved.

Another other method includes the method shown in FIG. 4 . As shown in FIG. 4(A), first, on both sides of a substrate 101, wiring patterns 102 formed by patterning copper foil are provided. Here, a connection hole 109 is provided on the substrate 101, and plating layers 108 for electrically connecting the wiring pattern 102 provided on both sides of the substrate 101 are provided on the inner surface of the connection hole. In the connection hole 109, conductive Paste or insulating paste 110.

Next, as shown in FIG. 4(B), a conductor layer 103 is formed on the substrate 101 on which the wiring pattern 102 is formed so as to coat the wiring pattern 102 . The conductor layer 103 is formed by nickel-gold alloy, tin-lead alloy series solder alloy, or electroless plating. Here, for the conductor layer 103, a metal having corrosion resistance when etching the metal plating layer 104 described later is selected.

Then, as shown in FIG. 4(C), a metal plating layer 104 is formed on the conductor layer 103 using copper, nickel, or the like. Next, as shown in FIG. 4(D), a mask is formed on the metal plating layer 104, and then a metal block 105 is formed by etching the metal plating layer 104 to be electrically connected to the wiring pattern of the outer layer. The etching here is to etch only the metal plating layer 104, so the conductor layer 103 provided on the substrate 101 remains. That is, the conductor layer 103 functions as an etching stop surface when the metal plating layer 104 is etched.

Next, as shown in FIG. 4(E), a mask is provided, and then etching is performed to remove the conductor layer 103 . Next, as shown in FIG. 4(F), an interlayer insulating layer 106 used as an insulation between the outer layer wiring pattern and the inner layer wiring pattern 102 is formed on the region where the metal block 105 is not provided; and the interlayer insulating layer 106 is ground. The surface of the metal block 105 is made to be in the same plane as the end surface of the metal block 105. Next, as shown in FIG. 4(G), copper is plated on the surface of the interlayer insulating layer 106, and the plated layer is patterned to form a wiring pattern 107 constituting an outer layer.

However, in the method shown in FIG. 4 , the conductor layer 103 must be formed when forming the metal block 105 as an etching stop surface for etching, and the conductor layer 103 must be removed after the metal block 105 is formed. That is: in order to form the metal block 105 in this method, it is necessary to perform two different etching treatments for forming the conductor layer 103 and the metal plating layer 104 and two different etching treatments for removing the conductor layer 103 and the metal plating layer 104, This complicates the manufacturing process of the printed wiring board. In addition, since the connection between the metal block 105 and the wiring pattern 102 is to be carried out through the conductor layer 103, it is necessary to perform interface treatment in order to improve the adhesion between the wiring pattern 102 and the conductor layer 103 and the connection between the conductor layer 103 and the metal block 105. of adhesion.

Contents of the invention

An object of the present invention is to provide a multilayer printed wiring board capable of flatly forming a wiring pattern on a connection hole, forming a finer connection hole, and further thinning the wiring pattern, and a method of manufacturing the same.

Another object of the present invention is to provide a multilayer printed wiring board capable of improving production efficiency while achieving the above object, and a method for manufacturing the same.

A multilayer printed wiring board according to the present invention is provided with a substrate on which a wiring pattern is formed, a thin film insulating layer formed on the substrate for covering the wiring pattern, an interlayer insulating layer provided on the thin film insulating layer, and a thin film insulating layer provided on the wiring pattern. The metal block surrounded by the insulating layer and the interlayer insulating layer and protruding more than the thin film insulating layer, and the wiring pattern arranged on the interlayer insulating layer and connected to the metal block.

The manufacturing method of the above-mentioned kind of multilayer printed wiring board has the following steps: forming a wiring pattern on the substrate; forming a thin film insulating layer on the substrate provided with the wiring pattern to cover the wiring pattern; forming a connection hole on the thin film insulating layer, Make the wiring pattern face the outside; form the metal conductive layer on the thin film insulating layer with the connection hole formed by the first electroplating process; form a metal block that is more protruding than the thin film insulating layer by selectively removing the metal conductive layer; An interlayer insulating layer is formed on the layer so as to surround the metal block; and another wiring pattern is formed on the interlayer insulating layer by the second electroplating treatment of the same kind as the first electroplating treatment.

Description of drawings

Fig. 1 is a sectional view of a multilayer printed wiring board to which the present invention is applied.

FIG. 2 is an explanatory diagram of a manufacturing process of the multilayer printed wiring board shown in FIG. 1 .

FIG. 3 is an explanatory diagram of a manufacturing process of a multilayer printed wiring board constituting a comparative example.

FIG. 4 is an explanatory diagram of a manufacturing process of a conventional multilayer printed wiring board.

Detailed ways

A multilayer printed wiring board to which the present invention is applied and a method for manufacturing the same will be described below with reference to the drawings.

As shown in FIG. 1, a multilayer printed wiring board 1 to which the present invention is applied has a substrate 2, which is an insulating substrate in which glass fibers are impregnated with an insulating resin such as epoxy resin. First wiring patterns 3, 3 constituting inner layers are formed by bonding copper foils on both sides of the substrate 2. On the substrate 2, also be formed with the connection hole 4 that is used as the first wiring pattern 3 on each surface of the substrate 2, and the electrical connection between 3, the inner surface of the connection hole 4 is provided with a plating layer 5 to realize the first wiring pattern. Figure 3, the electrical connection between 3. In order to planarize the substrate 2, the connection hole 4 is permanently filled with a conductive or insulating paste 6.

Thin film insulating layers 7, 7 are formed on both surfaces of the substrate 2 to cover the first wiring patterns 3, 3. The thin-film insulating layers 7, 7 are formed of an insulating material such as an alkali-developable photoresist, insulating ink for photosensitive materials, or the like. The thin film insulating layers 7, 7 are formed to have a thickness of 1 μm to 30 μm. Here, if the thickness of the thin-film insulating layers 7, 7 is made thinner than 1 μm, the adhesion with the first wiring patterns 3, 3 will deteriorate, and when the thin-film insulating layers 7, 7 are reformed, the thin-film insulating layers will be damaged. 7,7 may be peeled off; if the thickness of thin film insulating layer 7,7 is made thicker than 30 μ m, the adhesion of metal conductive layer 13,13 to the first wiring pattern 3,3 in the connection hole 8,8 formed in the next process In other words, the adhesiveness of the plating layer is deteriorated, and even if the surface of the metal conductive layer 13, 13 is ground to form the second wiring pattern 12, 12, it cannot be smoothed. The thickness of the thin-film insulating layers 7, 7 is preferably 5 µm to 20 µm.

On the thin film insulating layers 7, 7, connection holes 8, 8 are formed on the first wiring patterns 3, 3, and metal blocks 9, 9 are formed in the connection holes 8, 8, and the metal blocks 9, 9 are connected to the second A wiring pattern 3, 3 protrudes more than the film insulating layer 7, 7, and is used to electrically connect the first wiring pattern 3, 3 of the inner layer with the second wiring pattern constituting the outer layer. Metal blocks 9, 9 are formed of, for example, ferric chloride or copper chloride.

Interlayer insulating layers 11, 11 for insulating between the first wiring patterns 3, 3 constituting the inner layers and the second wiring patterns constituting the outer layers are formed on the thin film insulating layers 7, 7 around the metal blocks 9, 9. The interlayer insulating layers 11 and 11 are made of thermosetting resins such as epoxy resin, phenolic resin, and urea resin, or thermoplastic resins such as polyether, polyetherketone, polyethersulfone, polyphenylene oxide, polyimide, and polyimideimide. form.

The second wiring pattern 12, 12 constituting the outer layer is formed on the interlayer insulating layer 11, 11, and the second wiring pattern 12, 12 is connected to the end surface of the metal block 9, 9 facing the outside from the interlayer insulating layer 11, 11. Therefore, it is electrically connected with the first wiring patterns 3, 3 of the inner layer.

Next, a method of manufacturing the multilayer printed wiring board 1 as described above will be described with reference to FIG. 2 . As shown in FIG. 2(A), first, first wiring patterns 3, 3 are formed on the substrate 2. As shown in FIG. Specifically, firstly, on a copper-clad laminated board (for example, TLC-W-551 manufactured by Toshiba Chemical Co., Ltd., substrate thickness 0.2 mm, copper foil thickness 1.8 μm) with copper foil bonded on both sides of the substrate 2, a Connection holes 4 for electrically connecting the copper foils constituting the first wiring patterns 3, 3 on each surface. The connection hole 4 is formed using, for example, an NC drill (for example, a drill mounted on H-MARK90J manufactured by Hitachi, Ltd.), and has a diameter of 0.25 mm. Copper plating (thickness: 18 μm) is formed on the copper foil provided on both surfaces of the substrate 2 including the inner surface of the connection hole 4 by electroless copper plating or the like. In this way, a conductive layer is also formed on the inner surface of the connection hole 4 , thereby realizing the electrical connection between the copper foils disposed on both surfaces of the substrate 2 . Thereafter, in order to flatten the surface of the substrate 2, the connection hole 4 provided with copper plating on the inner surface is filled with conductive paste or insulating paste 6, and the connection hole 4 is permanently buried. Thereafter, the conductive layer on the plated substrate 2 provided on the copper foil is treated by mechanical or chemical treatment such as sulfuric acid washing or brush grinding. Then, the surface-treated conductive layer is coated with an etching photoresist (for example, Sunphoto AQ5044 manufactured by Asahi Kasei Co., Ltd.), and then exposed with an exposure device provided with a patterned film (exposure machine HMW-551D manufactured by Oku Corporation). The exposed conductive layer is then developed with 1% sodium carbonate, and then etched with an aqueous ferric chloride or copper chloride solution. Finally, the dry film is peeled off with 3% caustic soda, thereby forming the first wiring pattern 3,3.

Next, as shown in FIG. 2(B), thin-film insulating layers 7, 7 are formed on the substrate 2 on which the first wiring patterns 3, 3 have been formed. Coat an insulating material (for example, PSR-4000 manufactured by Sun Inky Co., Ltd.) such as alkali-developing photosensitive adhesive and insulating ink for photosensitive veils on the substrate 2 on which the first wiring patterns 3 and 3 have been made by screen printing to form a thin film insulation Layers 7, 7, and were dried at 80°C for 30 minutes to cure the board.

Then, connection holes 8, 8 are formed in the thin film insulating layers 7, 7 so that the first wiring patterns 3, 3 face the outside. The connection holes 8, 8 are formed by photoetching the thin-film insulating layers 7, 7. After that, the thin-film insulating layers 7, 7 formed with the connection holes 8, 8 are heated at a temperature of 160°C for 60 minutes to completely cure them. . Here, as described above, the thin film insulating layers 7, 7 have a thickness of 1 µm to 30 µm, preferably 5 µm to 20 µm. If the thickness of the thin-film insulating layers 7, 7 is made thinner than 1 μm, the adhesion with the first wiring patterns 3, 3 will deteriorate, and when the thin-film insulating layers 7, 7 are reformed, the thin-film insulating layers 7, 7 may be peeled off; if the thickness of the film insulating layer 7,7 is made thicker than 30 μm, the adhesion of the metal conductive layer 13,13 to the first wiring pattern 3,3 in the connection hole 8,8 formed in the next process In other words, the adhesiveness of the plated layer is deteriorated. In order to form the second wiring patterns 12, 12, even if the surface of the metal conductive layer 13, 13 is ground, it cannot be smoothed.

Here, although photolithography is used to form the connection holes 8, 8 in the thin film insulating layers 7, 7, the connection holes 8, 8 may also be formed by drilling or laser. That is, first, thin film insulating layers 7, 7 are formed on the substrate 2 on which the first wiring patterns 3, 3 are formed, using thermosetting or thermoplastic insulating ink or film. For example, set a screen plate (T-300N, thickness 8 μm) on a screen printing machine (Printing Machine LS-150 manufactured by New-Long Co., Ltd.) with a thermosetting ink (Asahi Chemical Research Institute CR-150), and place a thin film insulating layer 7, 7 are formed on the substrate 2 on which the first wiring patterns 3, 3 are formed. Next, the substrate 2 on which the thin-film insulating layers 7, 7 were formed was heated in a BOX furnace at 160° C. for 60 minutes, thereby curing the thin-film insulating layers 7, 7 . A laser drilling device (LCO-1A21 manufactured by Hitachi Viamekanix Co., Ltd.) is used to form connection holes 8, 8 at predetermined positions on the cured thin film insulating layers 7, 7, and make the first wiring patterns 3, 3 face the outside.

Next, surface modification treatment is performed on the surfaces of the thin film insulating layers 7, 7 in order to improve the adhesion with the metal conductive layer formed in the next process. This surface modification treatment is carried out using a scratch removal treatment device or the like. First, the substrate 2 on which the thin film insulating layers 7 and 7 are formed is immersed in N-methyl-2 pyrrolidone, sodium permanganate, and hydroxylammonium sulfate. Afterwards wash it with water and then dry it. In addition, potassium permanganate, potassium dichromate, sodium dichromate, concentrated sulfuric acid and other oxidants, sodium hydroxide, potassium hydroxide and other alkali preparations, N, N-dimethylformamide, dimethyl sulfoxide, etc. Such as organic solvents, plasma treatment, ultraviolet radiation treatment, etc. to carry out.

Next, as shown in FIG. 2(C), metal conductive layers 13, 13 are formed on the modified thin film insulating layers 7, 7 to form metal blocks 9, 9. Metal conductive layers 13, 13 are formed to a thickness of about 60 µm by electroless copper plating or the like in order to ensure the adhesion strength of the first wiring patterns 3, 3 made of copper foil. Moreover, in addition to copper, conductive materials such as nickel, aluminum, gold, and silver can also be used for the first wiring patterns 3, 3 .

Next, as shown in FIG. 2(D), predetermined regions of the conductive metal layers 13, 13 are removed to form metal blocks 9, 9 protruding from the thin-film insulating layers 7, 7. Chemical grinding with sulfuric acid, hydrochloric acid, organic acid etc. or physical grinding such as scrubbing, polishing, scrubbing etc. After the metal conductive layer 13, 13 enters the surface material, form a photoresist on the metal conductive layer 13, 13, and then selectively by etching The metal conductive layers 13, 13 are removed so that the metal blocks 9, 9 are formed. At this time, the thin-film insulating layers 7, 7 function as etching stop surfaces when the metal blocks 9, 9 are formed. Specifically, with a dry film with a thickness of 30 μm (NIT-230 manufactured by Nichigo Motor-ton Co., Ltd.) after grinding, the dry film is bonded on the metal conductive layer 13, 13 with a laminating device; then use an exposure device (Ono Exposure was performed using NT-800 manufactured by Sekki Co., Ltd.). Thereafter, the dry film is peeled off from the metal conductive layer 13,13, thereby forming the metal blocks 9,9.

The photoresist can also be formed by screen-printing photoresist ink on the metal conductive layer 13, 13 while using electrodeposition coating method. In addition, the material of the metal conductive layer 13 and 13 and the photoresist are selected for etching. For example, when the metal conductive layers 13 and 13 are ferric chloride or copper chloride, the photoresist is removed by using chemicals such as strong alkali solvent or brushing and grinding.

As shown in Fig. 2 (E), on film insulating layer 7, 7, form the interlayer insulating layer 11, 11 that makes first wiring pattern 3, 3 of inner layer and the second wiring pattern 12, 12 of outer layer electrically insulate . The interlayer insulating layers 11 and 11 are made of epoxy resin, melamine resin, phenolic resin, urea resin and other thermosetting resins or polyether, polyetherketone, polyethersulfone, polyphenylene ether, polyimide, polyimide It is formed of thermoplastic resin such as amine, and its height is the same as the metal blocks 9,9 or higher than the metal blocks 9,9. The dry films were vacuum laminated using a lamination device (manufactured by Meiki Co., Ltd.) to form interlayer insulating layers 11, 11. It is also possible to coat the above-mentioned materials with a curtain coater while using screen printing to form the interlayer insulating layers 11, 11.

Thereafter, the interlayer insulating layers 11, 11 are ground in order to smoothen the metal blocks 9, 9 as they emerge. Here, physical grinding such as a belt grinder with a large grinding force and buff grinding is performed. Here, since the above-mentioned thin film insulating layers 7, 7 are formed to be as thin as 1 μm to 30 μm, by polishing the end surfaces of the functional metal blocks 9, 9 or the surfaces of the interlayer insulating layers 11, 11 connected to the end surfaces to be smooth, the first When the two wiring patterns 12, 12 are used, it is possible to prevent depressions from being formed on the connection holes 8, 8 or their peripheral portions as before.

The surface of the smoothed interlayer insulating layers 11, 11 is roughened in order to improve the adhesion (adhesion) of the second wiring patterns 12, 12 formed therein. Specifically, this roughening treatment is carried out by dipping in N-methyl-2-pyrrolidone, sodium permanganate, and hydroxylamine sulfate using a horizontal scratch removal device, and then the interlayer insulating layers 11, 11 are washed with water and dried. This kind of roughening treatment can also use oxidants such as potassium permanganate, potassium dichromate, sodium dichromate, concentrated sulfuric acid, alkali preparations such as sodium hydroxide and potassium hydroxide, N-methyl-dipyrrolidone, N, N -Organic solvents such as dimethylformamide, dimethyl sulfoxide, and dipyrrolidone.

As shown in FIG. 1 above, the second wiring patterns 12, 12 are formed on the interlayer insulating layers 11, 11, specifically, the second wiring patterns 12, 12 as fine patterns are formed on the interlayer insulating layers 11, 11. In this case, at least a substantially continuous thickness, the copper plating layer with a thickness of 30 μm or less, here, the copper plating layer with a thickness of 18 μm is formed by electroless copper plating or the like. This is because when the copper plating layer is thicker than 30 µm, formation of fine patterns is disadvantageous. Thereafter, in order to improve the adhesion between the copper plating layer and the interlayer insulating layers 11, 11, the substrate 2 provided with the copper plating layer is subjected to heat treatment at a temperature of 120° C. to 200° C. for 10 to 120 minutes. This is because if the temperature is lower than 120° C. for 10 minutes, the adhesiveness cannot be improved, and if it exceeds 200° C. for 120 minutes, the substrate 2 itself will be oxidized and the reliability of the substrate 2 will be lowered.

Next, use a horizontal desmia device to immerse in N-methyl-2-pyrrolidone, sodium permanganate, and hydroxylammonium sulfate to perform a descratch treatment. Then, the copper plating layer is etched after exposure and development, thereby forming the second wiring pattern 12,12.

On the printed wiring board 1 as above, a solder photosensitive adhesive layer (PSR-4000 series manufactured by Sun Ink Co., Ltd.) is formed on the surface on which the second wiring patterns 12, 12 are formed. After that, the second wiring patterns 12, 12 are formed. Pre-melt treatment, and the formation of Ni / Au layer.

The above multilayer printed wiring board 1 forms the thin film insulating layers 7, 7 after the first wiring patterns 3, 3 are formed; the metal conductive layer 13 is formed after forming the connection holes 8, 8 on the thin film insulating layers 7, 7, 13. The thin film insulating layer 7, 7 is used as an etching stop surface and etches the metal conductive layer 13, 13 to form a metal block 9, 9; thereby the metal block 9, 9 directly connected to the first wiring pattern 3, 3 can be formed, which can improve connection reliability. That is, since the adhesion between the first wiring patterns 3, 3 and the metal blocks 9, 9 is improved, the connection holes 8, 8 can be miniaturized, that is, the metal blocks 9, 9 can be miniaturized.

Since the electroplating process for forming the metal blocks 9, 9 and the electroplating process for forming the second wiring patterns 12, 12 are performed separately, the thickness of the second wiring patterns 12, 12 can be made thinner, and the second wiring patterns 12, 12 are thinner. Simultaneously with linearization, the periphery of the metal blocks 9 and 9 can also be flattened.

Since the metal conductive layer 13, 13 is formed for forming the metal blocks 9, 9 and the copper plating layer for forming the second wiring pattern 12, 12 is subjected to the same electroplating process, the same electroplating device can be used, and it can also be used during etching. The same etchant can be used to simplify the manufacturing process.

In addition, when etching in order to form the metal blocks 9, 9, since the thin film insulating layer 7, 7 is formed as the etching stop surface, the etching amount of the metal conductive layer 13, 13 can be reduced, and the etching precision can be improved. form fine graphics.

When the conductor impedance between the first wiring patterns 3, 3 and the second wiring patterns 12, 12 of the multilayer printed wiring board 1 formed as above was measured, the impedance value was 0.4Ω, and good continuity was obtained.

Ten such multilayer printed wiring boards 1 were subjected to a 20-cycle thermal shock test in accordance with JISC50, repeated rapid heating and rapid cooling, to check the peeling state of the second wiring patterns 12, 12, etc. As a result, the first wiring pattern 3, The conductor impedance between 3 and the second wiring patterns 12, 12 is 0.6Ω, which is good.

A conventional multilayer printed wiring board was manufactured as shown in FIG. 3, and the formation of fine patterns of the multilayer printed wiring board 1 to which the present invention was applied was compared. As shown in FIG. 3(A), when the multilayer printed wiring board 21 is manufactured, the first wiring patterns 23, 23 are formed on the substrate 22 first. The first wiring patterns 23, 23 are formed in the same manner as the first wiring patterns 3, 3 formed on the substrate 2 described above. Here, a connection hole 32 is provided on the substrate 22, and the inner surface of the connection hole 32 is provided with a plated layer 31 for electrical connection between the first wiring patterns 23 and 23 arranged on both sides of the substrate 22. Sexual paste 33 fills such connection holes 32 .

Next, as shown in FIG. 3(B), a resin-coated copper foil (RCC, Sumitomo Bakelite APL-4001) is laminated on the substrate 22 on which the first wiring patterns 23, 23 are formed. That is, interlayer insulating layers 24, 24 are formed on the substrate 22 on which the first wiring patterns 23, 23 are provided, and copper foils 25, 25 are laminated on the interlayer insulating layers 24, 24.

Next, as shown in FIG. 3(C), the copper foils 25, 25 are etched away, and then the connection holes 26, 26 are formed at specified positions on the interlayer insulating layers 24, 24 with a laser drilling device, so that the first A wiring pattern 23, 23 faces the outside. Next, the interlayer insulating layers 24, 24 formed with the connection holes 26, 26 are subjected to a scratch removal treatment to remove resin residues on the surface.

Then, as shown in FIG. 3(D), on the interlayer insulating layer 24, 24, a method such as electroless copper plating is used to form a copper plating layer 27, 27 with a thickness of 18 μm. The copper plating layer 27, 27 is the second wiring that constitutes the outer layer. The patterned copper layer, in addition to the surfaces of the interlayer insulating layers 24, 24, copper plating layers 27, 27 are also arranged on the inner surfaces of the connection holes 26, 26 for electrical connection with the first wiring patterns 23, 23. Thereafter, as shown in FIG. 3(E), ink 28, 28 (Asahi Chemical Research Institute, FP-R120) for filling holes is filled in the connection holes 26, 26 in which the copper plating layer 27, 27 is provided on the inner surface, and at 120 Dry at 100°C for 100 minutes, then heat at 180°C for 30 minutes to cure.

As shown in FIG. 3(F), copper plating layers 29, 29 are formed on the copper plating layers 27, 27 by electroless copper plating. Then, the copper plating layers 27, 29 are exposed, developed, and etched to form second wiring patterns 30, 30. Since the second wiring pattern 30, 30 is formed by laminating copper plating layers 27, 29, its thickness is 36 µm.

In the multilayer printed wiring substrate 1 applicable to the above-mentioned present invention, the second wiring patterns 12, 12 can be formed so that the width of the pattern/the space between the patterns reaches 50 μm/50 μm. For this, the multilayer printing shown in FIG. 3 In the wiring substrate 21, although the pattern width/space width between patterns can reach 70 μm/70 μm, when it reaches 50 μm/50 μm, the second wiring patterns 30, 30 are disconnected. This is because the second wiring patterns 30, 30 are composed of two plating layers 27, 29, which are 36 µm thicker than the second wiring patterns 12, 12 of the printed wiring board 1 having a thickness of 18 µm. Therefore, in the multilayer printed wiring board 1 to which the present invention is applied, it is possible to form a thinner and thinner wiring pattern than that of the printed wiring board 21 constituting the comparative example.

The printed wiring board 1 having two conductive layers was exemplified above, but the present invention does not limit the number of conductive layers.

According to the present invention, a thin-film insulating layer is formed after the wiring pattern is formed on the substrate, and a metal conductive layer is formed after forming a connection hole on the thin-film insulating layer, and the metal conductive layer is etched with the thin-film insulating layer as an etching stop surface to form a metal block. Therefore, It is possible to form a metal block directly connected to a wiring pattern on a substrate, thereby improving connection reliability. That is, since the adhesion between the wiring pattern on the substrate and the metal block is improved, the connection hole can be miniaturized, that is, the metal block can be miniaturized.

Since the first electroplating process for forming the metal block and the second electroplating process for forming the wiring pattern on the interlayer insulating layer are carried out separately, the film thickness of the wiring pattern on the outer layer can be made thin, and the wiring pattern on the interlayer insulating layer can be realized. At the same time, it is possible to flatten the periphery of the metal block. Therefore, electronic components can be mounted in a stable state.

Since the metal conductive layer forming the metal block and the plating layer used to form the wiring pattern on the interlayer insulating layer are subjected to the same electroplating treatment, the same electroplating device can be used, and the same etching solution can be used when etching, and the realization can be realized. The device is simplified, and the adhesiveness can be improved at the same time.

In addition, when etching is performed to form a metal block, since a thin-film insulating layer is formed as an etching stopper, the amount of etching of the metal conductive layer can be reduced, the etching precision can be improved, and as a result, fine patterns can be formed.

Claims (7)

1. A multilayer printed wiring substrate provided with: A substrate forming a wiring pattern; a thin film insulating layer formed by covering the wiring pattern on the substrate; an interlayer insulating layer disposed on the thin film insulating layer; a metal block disposed on the wiring pattern surrounded by the thin film insulating layer and the interlayer insulating layer so as to protrude more than the thin film insulating layer; and A wiring pattern arranged on the interlayer insulating layer and connected to the metal block. 2. The multilayer printed wiring board according to claim 1, wherein the thin film insulating layer has a thickness of 1 μm to 30 μm. 3. A method for manufacturing a multilayer printed wiring substrate, comprising the steps of: forming a wiring pattern on the substrate; Covering the wiring pattern on the substrate provided with the wiring pattern to form a thin film insulating layer; forming a connection hole on the thin film insulating layer so that the wiring pattern faces the outside; Forming a metal conductive layer on the thin film insulating layer on which the connection hole is formed by adopting the first electroplating treatment method; selectively removing the metal conductive layer to form a metal block that protrudes more than the thin film insulating layer; forming an interlayer insulating layer on the thin film insulating layer to surround the metal block; and Another wiring pattern is formed on the interlayer insulating layer by the second plating treatment which is the same as the first plating treatment. 4. The method of manufacturing a multilayer printed wiring board according to claim 3, wherein the thin film insulating layer is used as a mask when removing the metal conductive layer. 5. The method of manufacturing a multilayer printed wiring board according to claim 3, wherein said connection hole is formed on said thin film insulating layer by any method of photolithography, drilling or laser. 6. The method of manufacturing a multilayer printed wiring board according to claim 3, wherein the surface of the thin-film insulating layer is modified before forming the metal conductive layer on the thin-film insulating layer. 7. The method for manufacturing a multilayer printed wiring board according to claim 6, characterized in that at least one of the following treatment methods is used to modify the surface of the thin film insulating layer, that is: treating with an oxidizing agent, using Alkali preparation treatment, treatment with organic solvent, plasma treatment, ultraviolet irradiation treatment.

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