CN1713364A - Thin-film test fixture and test method - Google Patents
Thin-film test fixture and test method Download PDFInfo
- Publication number
- CN1713364A CN1713364A CN 200410048741 CN200410048741A CN1713364A CN 1713364 A CN1713364 A CN 1713364A CN 200410048741 CN200410048741 CN 200410048741 CN 200410048741 A CN200410048741 A CN 200410048741A CN 1713364 A CN1713364 A CN 1713364A
- Authority
- CN
- China
- Prior art keywords
- test
- film
- tested
- electronic component
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 183
- 239000010409 thin film Substances 0.000 title claims abstract description 24
- 238000010998 test method Methods 0.000 title claims abstract description 20
- 239000010408 film Substances 0.000 claims abstract description 44
- 230000007246 mechanism Effects 0.000 claims description 12
- 229910000679 solder Inorganic materials 0.000 claims description 3
- 238000003466 welding Methods 0.000 abstract description 19
- 238000012423 maintenance Methods 0.000 abstract description 6
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 239000000523 sample Substances 0.000 description 11
- 238000000034 method Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 238000001459 lithography Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000002861 polymer material Substances 0.000 description 1
- 238000007790 scraping Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Images
Landscapes
- Measuring Leads Or Probes (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
Description
技术领域technical field
本发明是关于一种测试卡具及测试方法,特别是关于一种测试内存模块等电子元件的电性的薄膜式测试卡具及测试方法。The invention relates to a test fixture and a test method, in particular to a thin-film test fixture and a test method for testing the electrical properties of electronic components such as memory modules.
背景技术Background technique
对目前已大量用于半导体产品的内存模块或其它电子元件来说,为确保其功效,常会在生产过程中进行多次测试,以检测其优良率与电性,从而废弃不良产品。例如,芯片产业进行的内存芯片测试,完成封装后的封装可靠度测试,或模块化后的卡式内存模块测试等,都是产品制成前必须进行的检测步骤。For memory modules or other electronic components that have been widely used in semiconductor products, in order to ensure their efficacy, multiple tests are often carried out during the production process to check their good rate and electrical properties, so that defective products are discarded. For example, memory chip testing in the chip industry, packaging reliability testing after packaging, or card-type memory module testing after modularization are all testing steps that must be carried out before the product is manufactured.
在内存模块的测试技术中,一般是将待测内存模块电性连接在测试卡具上,借该测试卡具将内存模块上的信号传送至例如印刷电路板等测试板上,通过该测试板与该内存模块的电性导通关系,测试该内存模块的导电性能;同时,该测试板还外接有识别装置,显示该测试板与内存模块的电性导通状况,供操作者识别该内存模块的测试结果。In the testing technology of the memory module, the memory module to be tested is generally electrically connected to the test fixture, and the signal on the memory module is transmitted to a test board such as a printed circuit board by the test fixture, and the test board passes through the test board. The electrical conduction relationship with the memory module is used to test the conductivity of the memory module; at the same time, the test board is also connected with an identification device to display the electrical conduction between the test board and the memory module for the operator to identify the memory module. Module test results.
现有测试卡具是通过自动化的探针,电性连接待测内存模块,如图4所示,通过两排测试用的探针40(Probe)分别接触卡式内存模块41侧边的金质焊指部42(Golden Finger,俗称金手指),以检查该金质焊指部42与内存芯片之间线路的电性连接,完成其优良率的测试。然而,探针测试最大的限制在于探针40本身占有一定的空间,相邻探针40的间距难以缩小,所以无法测试焊指部42间距过小的内存模块41。随着内存模块线路的复杂化,必须提高其表面电性连接端或焊指部的密度,因此日益缩小的布设间距使探针测试不能满足产业的需要。再者,探针40测试还会导致焊指部42表面的损伤(例如刮伤)、信号失真、测试接触压力难以精确控制;且此类测试卡具由于还有各元件配合精度、润滑或探针经测试而变形等缺点,更使得卡具的制造品质难以控制且成本难以降低,维修更新也不方便,需要用更新的测试方法取代。Existing test fixtures are electrically connected to the memory module to be tested through automated probes. As shown in FIG. Welding finger 42 (Golden Finger, commonly known as gold finger), to check the electrical connection between the
因此,出现了其它类型的测试卡具,如图5A所示的插接式测试方法,其提供例如主机板的测试板50,该测试板50上设有与其电性连接的测试插座51,每一测试插座51均具有一个插槽56,以配置双排间隔并列的多个电性连接端子52。测试者可将待测的内存模块53上焊指部54的一侧朝向该插槽56插置,再借该插槽56两端的扣合件55扣合,如图5B般将该内存模块53插接定位的该插槽56中,使该插槽56中的每一电性连接端子52分别与该内存模块53上的焊指部54接触而电性连接,进而进行该焊指部54与内存芯片的电性测试;包括美国专利第6,357,022号案、台湾专利公告第492619号案、第561263号案与第564945号案等专利,都已揭示了这种现有插接式测试方法。Therefore, other types of test fixtures have appeared, such as the plug-in test method shown in FIG. Each of the test sockets 51 has a slot 56 for disposing a plurality of electrical connection terminals 52 spaced and paralleled in double rows. The tester can insert one side of the welding finger portion 54 on the memory module 53 to be tested toward the slot 56, and then fasten the memory module 53 with the fastening parts 55 at both ends of the slot 56, as shown in FIG. 5B . In this slot 56 of inserting position, make each electrical connection terminal 52 in this slot 56 contact with the welding finger portion 54 on this memory module 53 respectively and electrically connect, and then carry out this welding finger portion 54 and Electrical testing of memory chips; patents including US Patent No. 6,357,022, Taiwan Patent Publication No. 492619, No. 561263 and No. 564945 have all disclosed this existing plug-in testing method.
这种插接式测试方法可根据内存模块53的尺寸与线路布局,变更该测试插座51的设计与该电性连接端子52的密度,还可精密定位该内存模块53,大幅改善了探针式测试的限制与信号失真等问题。然而,对插接式测试而言,其最大缺点在于该测试插座51与插槽56的使用寿命过短,进行数百次的插接动作后,该插槽56内的电性连接端子52即可能受损而需整个更换;且该内存模块53的插拔过程,更可能导致其焊指部54的刮削,使其受到损坏。再者,此测试方法由于必须以人工方式进行插接动作,所以不易采用精确的自动化测试,测试速度难以大幅提升,且也有测试接触压力无法控制均匀等操作限制,难以满足量产测试的需求。This plug-in test method can change the design of the test socket 51 and the density of the electrical connection terminals 52 according to the size and circuit layout of the memory module 53, and can also precisely position the memory module 53, greatly improving the probe method. Test limitations and issues such as signal distortion. However, for plug-in testing, its biggest disadvantage is that the service life of the test socket 51 and the slot 56 is too short. After hundreds of times of plugging operations, the electrical connection terminals 52 in the slot 56 It may be damaged and need to be completely replaced; and the plugging and unplugging process of the memory module 53 is more likely to cause scraping of its welding finger portion 54 and damage it. Furthermore, since this test method must manually perform the plugging action, it is difficult to adopt accurate automated testing, and it is difficult to greatly increase the test speed. There are also operational limitations such as the unbalanced test contact pressure, which is difficult to meet the needs of mass production testing.
因此,如何开发一种新的测试卡具及测试方法,使其能够连接包括印刷电路板与现有识别装置的测试设备,以便进行快速测试,同时测试过程中还不会伤及待测电子元件,并可兼顾维修、使用寿命与接触压力均匀等需求,已成为相关领域需迫切待解的课题。Therefore, how to develop a new test fixture and test method, so that it can connect test equipment including printed circuit boards and existing identification devices, so as to perform rapid testing, and at the same time, the electronic components under test will not be damaged during the test , and can take into account the needs of maintenance, service life and uniform contact pressure, etc., which has become an urgent subject to be solved in related fields.
发明内容Contents of the invention
为克服上述现有技术的缺点,本发明的主要目的在于提供一种不会在测试过程中伤及待测电子元件的薄膜式测试卡具及测试方法。In order to overcome the above-mentioned shortcomings of the prior art, the main purpose of the present invention is to provide a thin-film test fixture and a test method that will not damage the electronic components to be tested during the test.
本发明的还一目的在于提供一种自动化且可进行快速测试的薄膜式测试卡具及测试方法。Another object of the present invention is to provide an automatic and rapid test film-type test fixture and test method.
本发明的另一目的在于提供一种便于更替维修的薄膜式测试卡具及测试方法。Another object of the present invention is to provide a thin-film test fixture and a test method that are convenient for replacement and maintenance.
本发明的再一目的在于提供一种可使测试时的接触压力均匀的薄膜式测试卡具及测试方法。Another object of the present invention is to provide a thin-film test fixture and a test method that can make the contact pressure uniform during the test.
本发明的又一目的在于提供一种具有极长使用寿命的薄膜式测试卡具及测试方法。Another object of the present invention is to provide a thin-film test fixture and a test method with an extremely long service life.
为达上述及其它目的,本发明的薄膜式测试卡具用于电性连接具有电性接点的待测电子元件与测试板,该薄膜式测试卡具包括:具有至少一个定位部的基座,定位该待测电子元件;至少一个可动件,表面设置具有导电线路的测试薄膜,通过该可动件的运动,令该测试薄膜上的导电线路接触到该待测电子元件上的电性接点,同时,该测试薄膜上的导电线路电性连接至该测试板上;以及驱动该可动件运动的驱动单元。In order to achieve the above and other purposes, the film-type test fixture of the present invention is used to electrically connect the electronic component to be tested and the test board with electrical contacts. The film-type test fixture includes: a base with at least one positioning portion, Positioning the electronic component to be tested; at least one movable part, the surface of which is provided with a test film with a conductive circuit, through the movement of the movable part, the conductive circuit on the test film is brought into contact with the electrical contact on the electronic component to be tested , at the same time, the conductive circuit on the test film is electrically connected to the test board; and the driving unit that drives the movable part to move.
同时,本发明提出的薄膜式测试方法的步骤包括:提供待测电子元件,该待测电子元件上具有电性接点;提供至少一个可动件,表面设置具有导电线路的测试薄膜,同时,该测试薄膜上的导电线路电性连接到测试板上;定位该待测电子元件,通过该可动件的运动,令该测试薄膜上的导电线路接触到该待测电子元件上的电性接点;以及通过该测试板判别该待测电子元件的测试结果。At the same time, the steps of the thin-film test method proposed by the present invention include: providing an electronic component to be tested, with electrical contacts on the electronic component to be tested; providing at least one movable part, and a test film with a conductive circuit is provided on the surface, and at the same time, the The conductive circuit on the test film is electrically connected to the test board; the electronic component to be tested is positioned, and through the movement of the movable part, the conductive circuit on the test film contacts the electrical contact on the electronic component to be tested; And judge the test result of the electronic component under test through the test board.
上述测试薄膜采用高分子聚合物材料制成,且该导电线路包括铜质导电凸块(Bump)与导电迹线,其均以半导体微影技术制成,同时,每一导电迹线分别与一个导电凸块连接,并相互平行地排列在该测试薄膜的表面,进而电性连接至该测试板上的测试电路与外接的识别装置。The above-mentioned test film is made of high molecular polymer material, and the conductive circuit includes copper conductive bumps (Bump) and conductive traces, which are all made by semiconductor lithography technology. At the same time, each conductive trace is connected to a The conductive bumps are connected and arranged parallel to each other on the surface of the test film, and then electrically connected to the test circuit on the test board and the external identification device.
综上所述,当测试该待测电子元件时,即可利用该待测电子元件的电性接点(例如焊指部)与测试薄膜的接触导通关系,形成电性接点-薄膜导电凸块-薄膜导电迹线-测试板测试电路的电性连接关系,进而借此电性连接关系完成电性测试,判别该电子元件上的短路、断路及功能特性状况。因此,本发明的薄膜式设计可避免如探针式或插接式等现有测试卡具,损伤待测电子元件表面焊指部的问题,也可达到自动化且快速测试的功效,同时,由于这些导电薄膜上的导电线路仅需利用现有的半导体微影技术,通过一道黄光制程完成,更大幅降低了测试成本与制造难度;此外,本发明的测试原理即便长期使用也不会损伤卡具本身,仅需定期更换该低成本的测试薄膜即可,兼有维修容易与使用寿命高等优点;再者,由于本发明是借由气压、油压与摇臂机构34的控制方式驱动该可动件,所以更可利用该两个驱动单元20的控制,维持该可动件与待测电子元件间的均匀接触压力,不会因其接触的不完全而降低测试品质,这是现有测试方法无法达到的功效。To sum up, when testing the electronic component to be tested, the contact conduction relationship between the electrical contact (such as the welding finger) of the electronic component to be tested and the test film can be used to form an electrical contact-film conductive bump -Thin film conductive traces-test board to test the electrical connection relationship of the circuit, and then complete the electrical test based on the electrical connection relationship, and judge the short circuit, open circuit and functional characteristic status of the electronic component. Therefore, the thin-film design of the present invention can avoid the problem that the existing test fixtures such as probe type or plug-in type damage the welding finger on the surface of the electronic component to be tested, and can also achieve the effect of automatic and rapid testing. At the same time, due to The conductive lines on these conductive films only need to use the existing semiconductor lithography technology to complete through a yellow light process, which greatly reduces the test cost and manufacturing difficulty; in addition, the test principle of the present invention will not damage the card even if it is used for a long time. The tool itself only needs to replace the low-cost test film regularly, which has the advantages of easy maintenance and high service life; moreover, because the present invention is driven by the control mode of air pressure, oil pressure and
附图说明Description of drawings
图1A是本发明的测试卡具未设置测试薄膜的示意图;Fig. 1A is the schematic diagram that test fixture of the present invention is not provided with test film;
图1B是本发明的测试卡具设置测试薄膜过程的示意图;Fig. 1B is a schematic diagram of the process of setting the test film in the test fixture of the present invention;
图1C是本发明的测试卡具已设置测试薄膜的示意图;Fig. 1C is a schematic diagram of a test film set on the test fixture of the present invention;
图2是本发明的测试薄膜的示意图;Fig. 2 is the schematic diagram of test film of the present invention;
图3A及图3B是本发明的测试卡具进行测试的示意图;Fig. 3A and Fig. 3B are the schematic diagrams that the test fixture of the present invention is tested;
图3C是本发明的测试卡具进行测试的侧视图;3C is a side view of the test fixture of the present invention for testing;
图4是现有探针接触式测试卡具的测试示意图;以及Fig. 4 is a test schematic diagram of an existing probe contact test fixture; and
图5A及图5B是现有插接接触式测试卡具的测试示意图。5A and 5B are test schematic diagrams of the conventional plug-in contact test fixture.
具体实施方式Detailed ways
实施例Example
以下通过特定的具体实施例说明本发明的实施方式。The implementation of the present invention will be described below through specific specific examples.
以下实施例均以内存模块作为本发明的待测电子元件范例,但本发明提出的测试卡具与测试方法也适用于其它具有电性接点的待测电子元件中;同时,本发明的测试卡具同样可外接至包括测试板与识别装置的现有测试设备上,现有测试设备不再说明。The following embodiments all use the memory module as an example of the electronic component to be tested in the present invention, but the test fixture and testing method proposed by the present invention are also applicable to other electronic components to be tested with electrical contacts; meanwhile, the test card of the present invention The tool can also be externally connected to the existing test equipment including the test board and the identification device, and the existing test equipment will not be described again.
如图1A、图1B所示,本发明的薄膜式测试卡具的较佳实施例包括基座10、可动件11与位于该基座10两端的驱动单元20。该基座10两侧靠近驱动单元20的位置包括两个例如定位槽的定位部31,该驱动单元20外接具有电磁阀的驱动开关21;且该基座10上还设置有两个例如可摆动夹固件的可动件11,其位于该两定位部31中间并与该驱动单元20轴接,借该驱动单元20的驱动而摆动,进而通过其摆动形成槽状间隙12;同时,该测试卡具的基座10下方另设置有作为测试板的印刷电路板30,该印刷电路板30上则设计有外接至识别装置(图未标)的测试电路,以进行内存模块的测试与结果识别,此印刷电路板30与识别装置,与现有测试卡具所采用的外接测试设备相同,此处不再详述。As shown in FIG. 1A and FIG. 1B , a preferred embodiment of the thin-film test fixture of the present invention includes a
本发明的特点如图1B所示,在两个可动件11上分别粘贴设置测试薄膜15,以令该两个测试薄膜15分别包覆的该两个可动件11的表面,该测试薄膜15是高分子聚合物(Polymer)材料,其表面如图2所示,形成有多组排成一列的导电线路,每一导电线路均包括一个导电凸块16(Bump)与一个导电迹线17,令该多条导电迹线17呈平行排列且相互之间有间隔。其中,该导电凸块16与导电迹线17均为表面镀有镍合金层(Ni Alloy)的铜材料;此时,当该两个可动件11受驱动而摆动并形成该槽状间隙12时,该测试薄膜15将如图1C所示,部分位于该槽状间隙12的内壁,而该多个导电凸块16与导电迹线17将分别突出于该槽状间隙12中,并通过该导电迹线17与该基座10下方的印刷电路板30的电性连接,使该测试薄膜15电性连接至该印刷电路板30上的测试电路。Features of the present invention as shown in Figure 1B, on two
因此,当进行内存模块的电性测试时,如图3A、图3B所示,将待测内存模块25同时置于该基座10两侧的定位部31的槽中,此时由于该两个可动件11设的该两个定位部31之间,所以该待测内存模块25也将容设在该两个可动件11之间;此处的内存模块25是以双倍速率同步动态随机存储器(DDR DRAM)为例,其是具有多个内存芯片26的卡式模块,且该内存模块25的一边形成有整排与该内存芯片26连接的电性接点,例如金质焊指部27(Golden Finger)。所以,当该内存模块25以其具有焊指部27的一侧置入该两个可动件11之间时,测试者可激活外接驱动开关21,该两个驱动单元20驱动该两个可动件11摆动,令该两个可动件11摆动形成该槽状间隙12并夹固接触该待测内存模块25,使该测试薄膜15上的多个导电凸块16分别接触该内存模块25上的对应焊指部27(如图3C所示的侧视图),此时,该测试薄膜15上的导电迹线17即与该内存模块25导通,进而可通过该导电迹线17导通该印刷电路板30上的测试线路与外接的识别装置(图未标),完成电性测试,并通过该印刷电路板30与识别装置判定该内存模块25及焊指部27的优良率。Therefore, when performing the electrical test of the memory module, as shown in Fig. 3A and Fig. 3B, the memory module 25 to be tested is placed in the grooves of the
本实施例的驱动单元20可包括驱动源33与运动机构34,该运动机构34如图所示是一摇臂机构,该驱动源33则是气压缸,所以当测试者激活该驱动开关21时,该气压缸33将驱动该摇臂机构34摆动,进而使轴接在该驱动单元20上的两个可动件11进行摆动,以夹固接触待测的内存模块25,但是该驱动源33也可改用其它例如油压缸的驱动源,该摇臂机构34也可替换成其它具有相同效果的机构。The
上述设计在基座10两侧的定位部31是以可收纳定位待测内存模块25的定位槽为例,但是该定位部31的数量与定位方式并非仅限于此,任何可令该待测内存模块25定位在该基座10上、受该可动件11夹固接触的定位部31都适用;同时,该可动件11的装设数量也可随待测内存模块25而变,例如,若该待测内存模块25的待测焊指部27均位于同一侧,则也可在定位该内存模块25后,摆动单一可动件11而令其测试薄膜15上的导电凸块16接触这些焊指部27,这可根据测试者的需求而定。The above-mentioned
因此,本发明的薄膜式设计可避免如探针式或插接式等现有测试卡具,损伤内存模块25表面焊指部27的问题,也可达到自动化且快速测试的功效,同时,由于这些导电薄膜15上的导电线路仅需利用现有的半导体微影技术,通过一道黄光制程完成,更大幅降低了测试成本与制造难度;此外,本发明的测试原理即便长期使用也不会损伤卡具本身,仅需定期更换该低成本的测试薄膜15即可,兼有维修容易与使用寿命高等优点;再者,由于本发明是借由气压、油压与摇臂机构34的控制方式驱动该可动件11,所以更可利用该两个驱动单元20的控制,维持该可动件11与内存模块25间的均匀接触压力,不会因其接触的不完全而降低测试品质,这是现有测试方法无法达到的功效。Therefore, the thin-film design of the present invention can avoid the problem of damage to the
利用本发明揭示的薄膜式测试原理,本发明的薄膜式测试方法的步骤是:准备多个具有焊指部27的待测内存模块25,并提供至少一个可动件11,该可动件11表面设置具有导电凸块16与导电迹线17的测试薄膜15,同时,该测试薄膜15上的导电迹线17电性连接至印刷电路板30上;接着,定位该待测内存模块25,以通过该可动件11的运动,令该测试薄膜15上的导电凸块16接触该待测内存模块25上对应的焊指部27;最后,利用该印刷电路板30与该测试薄膜15、内存模块25的电性导通关系,借该印刷电路板30与外接识别装置判定该内存模块25的测试结果,判断该内存模块25上每一焊指部27的电性优良率,以了解该内存模块25的短路、断路与功能特性状况。Utilizing the thin-film testing principle disclosed by the present invention, the steps of the thin-film testing method of the present invention are: prepare a plurality of memory modules 25 to be tested with
因此,通过上述实施例可知,本发明提出的薄膜式测试卡具及测试方法,是借由该测试薄膜与导电凸块、导电线路的设计,舍弃了常用的探针或插槽接触,进而保护了待测电子元件的焊指部,同时,本发明还具有快速测试、维修容易、使用寿命高与均匀控制接触压力等优点。Therefore, it can be seen from the above-mentioned embodiments that the film-type test fixture and test method proposed by the present invention are based on the design of the test film and conductive bumps and conductive lines, and abandon the commonly used probe or slot contact, thereby protecting At the same time, the invention also has the advantages of rapid testing, easy maintenance, long service life and uniform control of contact pressure.
Claims (12)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410048741 CN1713364A (en) | 2004-06-15 | 2004-06-15 | Thin-film test fixture and test method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410048741 CN1713364A (en) | 2004-06-15 | 2004-06-15 | Thin-film test fixture and test method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1713364A true CN1713364A (en) | 2005-12-28 |
Family
ID=35718911
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200410048741 Pending CN1713364A (en) | 2004-06-15 | 2004-06-15 | Thin-film test fixture and test method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1713364A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101430354B (en) * | 2007-11-08 | 2011-01-05 | 环旭电子股份有限公司 | Method and device for testing pin components |
-
2004
- 2004-06-15 CN CN 200410048741 patent/CN1713364A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101430354B (en) * | 2007-11-08 | 2011-01-05 | 环旭电子股份有限公司 | Method and device for testing pin components |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4765127B1 (en) | Tray unit and semiconductor device inspection device | |
| CN204989229U (en) | Chip test fixture and test system | |
| US20080309363A1 (en) | Probe assembly with wire probes | |
| CN101154609B (en) | Bump testing unit, device and testing method | |
| US6774662B2 (en) | In-line D.C. testing of multiple memory modules in a panel before panel separation | |
| CN1294422C (en) | Device for testing chip with the help of printed circuit board | |
| CN111579956B (en) | Adjustable surface-mounted packaged semiconductor device clamp and testing method | |
| CN1713364A (en) | Thin-film test fixture and test method | |
| JP4209696B2 (en) | Electrical connection device | |
| TWI243905B (en) | Thin-film testing tooling and testing method | |
| CN1797002A (en) | Device for debugging circuit board, and method for debugging circuit board | |
| CN113504455A (en) | Package testing device, package testing method and preparation method of adapter plate | |
| KR102672947B1 (en) | Wafer test system | |
| CN2760568Y (en) | Circuit board debugging device using dual in-line package chip | |
| US20060043989A1 (en) | Film-type testing jig and testing method | |
| CN2528108Y (en) | Test equipment for semiconductor package components | |
| JP2008309540A (en) | Method for inspecting semiconductor chip and inspection-use jig therefor | |
| CN2826440Y (en) | IC Test Module | |
| US20140159760A1 (en) | Connector for actuator of camera | |
| CN2496035Y (en) | Test Fixture for Ball Grid Array Metal Ball Package Components | |
| CN220913293U (en) | Universal test circuit device for integrated circuit | |
| JP2011237446A (en) | Method for collectively moving ic | |
| CN1437239A (en) | Semiconductor Package Component Testing Equipment | |
| CN222913803U (en) | Fixture holder, electrical test fixture assembly and assembly plate | |
| CN1847858A (en) | Test riser card and its test equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |