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CN1794075B - Liquid crystal display device and method for forming the same - Google Patents

Liquid crystal display device and method for forming the same Download PDF

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CN1794075B
CN1794075B CN 200510023091 CN200510023091A CN1794075B CN 1794075 B CN1794075 B CN 1794075B CN 200510023091 CN200510023091 CN 200510023091 CN 200510023091 A CN200510023091 A CN 200510023091A CN 1794075 B CN1794075 B CN 1794075B
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gate line
line
gate
active layer
drain
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CN1794075A (en
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姚启文
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AUO Corp
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AU Optronics Corp
Quanta Display Inc
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Abstract

A liquid crystal display device and a method of forming the same, the device includes a gate line formed on an insulating substrate; first and second active layers formed on the first and second portions of the gate line, respectively; first and second pixel electrodes formed on the insulating substrate, respectively; a source line crossing the overlapping region of the first active layer and the first part and the overlapping region of the second active layer and the second part, wherein the distance between the edge of the source line and the edge of the overlapping region in the gate line direction is larger than the precision variation of the exposure machine in the gate line direction; and the first and the second drain lines are respectively coupled with the first and the second pixel electrodes, respectively cross over and extend beyond the overlapping areas of the first and the second active layers and the first and the second parts, respectively, and the distances between the edges of the first and the second drain lines and the edges of the overlapping areas in the direction of the gate line and the direction vertical to the gate line are respectively greater than the precision variation of the exposure machine in the direction of the gate line and in the direction vertical to the gate line.

Description

液晶显示装置及其形成方法Liquid crystal display device and method for forming the same

技术领域 technical field

本发明是有关于液晶显示器(Liquid Crystal Display;LCD),且特别有关于一种可避免栅极-漏极电容偏差的薄膜晶体管(Thin Film Transistor;TFT)-液晶显示器装置的结构。  The present invention relates to a liquid crystal display (Liquid Crystal Display; LCD), and particularly relates to a structure of a thin film transistor (Thin Film Transistor; TFT)-LCD device that can avoid gate-drain capacitance deviation. the

背景技术 Background technique

近年来,平面显示器发展迅速,已逐渐取代传统的显像管显示器,尤其是液晶显示器,应用范围由手机涵盖至大尺寸屏幕。在液晶显示器当中,使用薄膜晶体管的主动矩阵液晶显示器占了绝大比例,原因是由于其显示效果较被动矩阵液晶显示器更好。因此主动矩阵液晶显示器是当前液晶显示器的研发重点。  In recent years, flat-panel displays have developed rapidly and have gradually replaced traditional picture tube displays, especially liquid crystal displays. The range of applications ranges from mobile phones to large-size screens. Among liquid crystal displays, active matrix liquid crystal displays using thin film transistors account for the vast majority, because their display effect is better than that of passive matrix liquid crystal displays. Therefore, the active matrix liquid crystal display is the current research and development focus of the liquid crystal display. the

图1是显示一典型薄膜晶体管-液晶显示装置(TFT-LCD)当中一画素单元的平面图。此TFT-LCD装置的画素单元10包括一栅极线11沿水平方向设置于一绝缘基板上,并且该栅极线11具有一突出区域作为一栅极12。一主动层13形成于所述栅极12上,举例而言,是由非晶硅(amorphous silicon)构成。一源极线14以垂直方向延伸并跨越所述栅极线11,并具有一突出区域以作为一源极15。一漏极线16耦接一画素电极18并沿所述栅极线11的延伸方向横跨栅极12,并具有一漏极17。画素电极18通常是由一透明且具有良好传导力的导电材料构成,譬如是氧化铟锡(indium-tin-oxide;ITO)或氧化铟锌(indium-zinc-oxide;IZO)。  FIG. 1 is a plan view showing a pixel unit in a typical thin film transistor-liquid crystal display (TFT-LCD). The pixel unit 10 of the TFT-LCD device includes a gate line 11 disposed on an insulating substrate along the horizontal direction, and the gate line 11 has a protruding area as a gate 12 . An active layer 13 is formed on the gate 12, for example, made of amorphous silicon. A source line 14 extends vertically across the gate line 11 and has a protruding region serving as a source 15 . A drain line 16 is coupled to a pixel electrode 18 and crosses the gate 12 along the extending direction of the gate line 11 , and has a drain 17 . The pixel electrode 18 is usually made of a transparent conductive material with good conductivity, such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO). the

微影(photolithography)制作工艺中,机台变异以致于光罩在TFT的形成过程发生偏移时,源极15/漏极17与栅极12之间的重叠区域会发生变化。图2是显示曝光发生偏差,而使TFT-LCD装置10的画素单元内源极15/漏极17向右偏移的平面图。相较图1而言,图2内源极15与栅极12间的 重叠区域增大,而漏极17与栅极12间的重叠区域缩小。因此,栅极-源极电容(以下简称为CGS)增加,而栅极-漏极电容(CGD)减少。反之,当曝光过程发生偏差而使源极15及漏极17向左偏移(未显示)时,CGS减少,而CGD增加。  In the photolithography manufacturing process, the variation of the machine makes the overlapping area between the source 15 /drain 17 and the gate 12 change when the mask is shifted during the TFT formation process. FIG. 2 is a plan view showing that the source 15 /drain 17 in the pixel unit of the TFT-LCD device 10 is shifted to the right due to exposure deviation. Compared with FIG. 1 , the overlapping area between the source 15 and the gate 12 in FIG. 2 is enlarged, while the overlapping area between the drain 17 and the gate 12 is reduced. Therefore, the gate-source capacitance (hereinafter abbreviated as C GS ) increases, while the gate-drain capacitance (C GD ) decreases. Conversely, when the exposure process deviates and the source 15 and drain 17 are shifted to the left (not shown), C GS decreases and C GD increases.

图3是一TFT-LCD当中一画素单元的等效电路图,用以说明CGD对于亮度的影响。图中G表示栅极,S表示源极,D代表漏极,CLC是液晶电容,CS是储存电容,并且这两个电容都是并连于一画素电极P及一共享电极C之间。当TFT-LCD打开时,栅极电压等于一相对高电压VGH,而TFT-LCD内总电荷Q1与画素电极电压VP1之间的关系式可表示为:  FIG. 3 is an equivalent circuit diagram of a pixel unit in a TFT-LCD to illustrate the influence of C GD on brightness. In the figure, G represents the gate, S represents the source, D represents the drain, C LC is the liquid crystal capacitor, C S is the storage capacitor, and these two capacitors are connected in parallel between a pixel electrode P and a shared electrode C . When the TFT-LCD is turned on, the gate voltage is equal to a relatively high voltage V GH , and the relationship between the total charge Q 1 in the TFT-LCD and the pixel electrode voltage V P1 can be expressed as:

Q1=CGD(VP1-VGH)+(CLC+CS)(VP1-VCOM)            ...(1)  Q 1 =C GD (V P1 -V GH )+(C LC +C S )(V P1 -V COM ) ...(1)

其中VCOM是共享电极的电压。  where V COM is the voltage of the common electrode.

反之,当TFT-LCD关闭时,栅极电压等于一相对低电压VGL,而TFT-LCD内总电荷Q2与画素电极电压VP2之间的关系式可表示为:  Conversely, when the TFT-LCD is turned off, the gate voltage is equal to a relatively low voltage V GL , and the relationship between the total charge Q 2 in the TFT-LCD and the pixel electrode voltage V P2 can be expressed as:

Q2=CGD(VP2-VGL)+(CLC+CS)(VP2-VCOM)            ...(2)  Q 2 =C GD (V P2 -V GL )+(C LC +C S )(V P2 -V COM ) ...(2)

由于总电荷守恒,即Q1=Q2,因此由(1)(2)可知:  Since the total charge is conserved, that is, Q1=Q2, it can be known from (1)(2):

ΔVP=VP1-VP2=(VGH-VGL)(CGD/(CCL+CCS+CGD))    ...(3)  ΔV P =V P1 -V P2 =(V GH -V GL )(C GD /(C CL +C CS +C GD )) ...(3)

由(3)可知,ΔVP(即所谓的回扣(Kickback)电压),是受CGD影响。由于LCD的亮度是由画素电极电压加以控制,因此若当微影制作工艺中机台变异以致不同区域TFT的CGD发生偏差时,结果液晶显示器各处就会出现亮度不均匀的现象,严重的话,就产生所谓的「Mura」。然而,由于曝光机的曝光精度受限于一定范围以致无法百分百精确,液晶显示器普遍地出现各处亮度不均匀的现象。  It can be seen from (3) that ΔV P (the so-called kickback voltage) is affected by C GD . Since the brightness of the LCD is controlled by the voltage of the pixel electrode, if the CGD of the TFT in different regions is deviated due to the variation of the machine in the lithography manufacturing process, the phenomenon of uneven brightness will appear in all parts of the liquid crystal display. In severe cases , the so-called "Mura" is produced. However, because the exposure accuracy of the exposure machine is limited to a certain range and cannot be 100% accurate, the liquid crystal display generally has uneven brightness everywhere.

发明内容 Contents of the invention

有鉴于此,一种可避免栅极-漏极电容偏差的薄膜晶体管-液晶显示器(TFT-LCD)装置是本领域技术人员所向往的。  In view of this, a thin-film transistor-liquid crystal display (TFT-LCD) device that can avoid gate-drain capacitance deviation is desired by those skilled in the art. the

本发明是提供一种液晶显示装置,其包括一栅极线、一主动层、一画素电极一源极线,以及一漏极线。所述栅极线形成于一绝缘基板上,并且其中一区段的一边凸出而形成一凸出区域,以及该区段具有一内陷区域正对于所述凸出区域。所述主动层形成于所述区段上。所述画素电极形成于所述栅极线的凸出侧。所述源极线依大体上垂直于所述栅极线的延伸方向,横跨所述主动层与所述栅极线的重叠区域,而延伸超出所述主动层的边界,该源极线与所述重叠区域的边缘在栅极线方向的距离大于曝光机在栅极线方向的精度变化量。所述漏极线耦接所述画素电极,并依大体上平行于所述源极线的延伸方向,横跨并延伸超出所述主动层与所述栅极线的重叠区域,该漏极线与所述重叠区域在栅极线方向、垂直于栅极线方向的距离分别大于曝光机在栅极线方向、垂直于栅极线方向的精度变化量。 The invention provides a liquid crystal display device, which includes a gate line, an active layer, a pixel electrode, a source line, and a drain line. The gate line is formed on an insulating substrate, and one side of a segment protrudes to form a protruding area, and the segment has a sunken area facing the protruding area. The active layer is formed on the segment. The pixel electrode is formed on the protruding side of the gate line. The source line is substantially perpendicular to the extending direction of the gate line, crosses the overlapping area of the active layer and the gate line, and extends beyond the boundary of the active layer, and the source line and the gate line extend beyond the boundary of the active layer. The distance between the edges of the overlapping area in the direction of the gate lines is greater than the variation of the precision of the exposure machine in the direction of the gate lines. The drain line is coupled to the pixel electrode, and is substantially parallel to the extending direction of the source line, crossing and extending beyond the overlapping area of the active layer and the gate line, the drain line The distances from the overlapping area in the direction of the gate lines and in the direction perpendicular to the gate lines are respectively greater than the precision variation of the exposure machine in the direction of the gate lines and in the direction perpendicular to the gate lines.

本发明是提供一种液晶显示装置,包括:一栅极线、一第一及一第二主动层、一第一及一第二画素电极、一源极线,以及一第一及一第二漏极线。所述栅极线形成于一绝缘基板上,其中该栅极线当中一区段的两边凸出而分别形成第一及第二凸出区域,并且具有一空洞区域于该第一及第二凸出区域中间,而将该区段分隔成第一部分及第二部分。所述第一及第二主动层分别形成于所述栅极线的第一部分及第二部分上。所述第一及第二画素电极分别形成于所述栅极线其中一侧。所述源极线依大体上垂直于所述栅极线的延伸方向来横跨所述主动层与所述第一部分的重叠区域以及所述主动层与所述第二部分的重叠区域,该源极线的边缘与所述重叠区域的边缘在栅极线方向的距离大于曝光机在栅极线方向的精度变化量。所述第一及第二漏极线分别耦接所述第一及第二画素电极,并依大体上平行于所述源极线的延伸方向来横跨并延伸超出所述第一及第二主动层分别与所述第一及第二部分的重叠区域,该第一及第二漏极线的边缘与所述重叠区域的边缘在栅极线方向、垂直于栅极线方向的距离分别大于曝光机在栅极线方向、垂直于栅极线方向的精度变化量。  The present invention provides a liquid crystal display device, comprising: a gate line, a first and a second active layer, a first and a second pixel electrode, a source line, and a first and a second drain line. The gate line is formed on an insulating substrate, wherein two sides of a section of the gate line protrude to form first and second protruding areas respectively, and a hollow area is formed on the first and second protruding areas. out of the middle of the area, and divide the section into a first part and a second part. The first and second active layers are respectively formed on the first part and the second part of the gate line. The first and second pixel electrodes are respectively formed on one side of the gate line. The source line spans the overlapping area of the active layer and the first portion and the overlapping area of the active layer and the second portion substantially perpendicular to the extending direction of the gate line, the source line The distance between the edge of the polar line and the edge of the overlapping area in the direction of the gate line is greater than the variation of the precision of the exposure machine in the direction of the gate line. The first and second drain lines are respectively coupled to the first and second pixel electrodes, and extend across and extend beyond the first and second pixel electrodes in a direction substantially parallel to the extending direction of the source lines. In the overlapping regions of the active layer and the first and second parts respectively, the distances between the edges of the first and second drain lines and the edges of the overlapping regions in the direction of the gate lines and perpendicular to the direction of the gate lines are respectively greater than The accuracy variation of the exposure machine in the direction of the gate line and the direction perpendicular to the gate line. the

本发明是提供一种液晶显示装置的形成方法,包括:在一绝缘基板上形 成一栅极线,其中所述栅极线当中一区段的一边凸出而形成一凸出区域,以及具有一内陷区域正对于所述凸出区域;在所述区段上形成一主动层;在所述主动层及绝缘基板上定义一源极线与一漏极线,以令所述源极线依大体上垂直于所述栅极线的延伸方向来横跨所述主动层与所述栅极线的重叠区域而延伸超出所述主动层的边界,该源极线与所述重叠区域的边缘在栅极线方向的距离大于曝光机在栅极线方向的精度变化量;以及令所述漏极线依大体上平行于所述源极线的延伸方向,由所述栅极线凸出侧一预定形成一画素电极的区域来横跨并延伸超出所述主动层与所述栅极线的重叠区域,该漏极线与所述重叠区域在栅极线方向、垂直于栅极线方向的距离分别大于曝光机在栅极线方向、垂直于栅极线方向的精度变化量;以及形成所述画素电极。  The present invention provides a method for forming a liquid crystal display device, comprising: forming a gate line on an insulating substrate, wherein one side of a section of the gate line protrudes to form a protruding area, and has a The recessed area is facing the protruding area; an active layer is formed on the section; a source line and a drain line are defined on the active layer and the insulating substrate, so that the source line is in accordance with substantially perpendicular to the extending direction of the gate line to extend across the overlapping region of the active layer and the gate line beyond the boundary of the active layer, the edge of the source line and the overlapping region at The distance in the direction of the gate line is greater than the precision variation of the exposure machine in the direction of the gate line; The region where a pixel electrode is predetermined to be formed spans and extends beyond the overlapping region of the active layer and the gate line, the distance between the drain line and the overlapping region in the direction of the gate line and perpendicular to the direction of the gate line respectively greater than the precision variation of the exposure machine in the direction of the grid line and the direction perpendicular to the grid line; and forming the pixel electrode. the

本发明是提供一种液晶显示装置的形成方法,包括:在一绝缘基板上形成一栅极线,其中所述栅极线当中一区段的两边凸出而分别形成第一及第二凸出区域,并且具有一空洞区域于所述第一及第二凸出区域中间而将该区段分隔成第一部分及第二部分;在所述栅极线的第一部分及第二部分上分别形成一第一及第二主动层;在所述第一、第二主动层及绝缘基板上定义一源极线,以及分别在所述第一及第二主动层与绝缘基板上定义第一及第二漏极线,以令所述源极线依大体上垂直于所述栅极线的延伸方向来横跨所述主动层与所述第一部分的重叠区域以及所述主动层与所述第二部分的重叠区域,该源极线的边缘与所述重叠区域的边缘在栅极线方向的距离大于曝光机在栅极线方向的精度变化量;以及令所述第一及第二漏极线依大体上平行于所述源极线的延伸方向,分别由所述绝缘基板上预定形成一第一及第二画素电极的区域来横跨所述第一及第二主动层分别与所述第一及第二部分的重叠区域,该第一及第二漏极线的边缘与所述重叠区域的边缘在栅极线方向、垂直于栅极线方向的距离分别大于曝光机在栅极线方向、垂直于栅极线方向的精度变化量;以及形成所述第一及第二画素电极。  The present invention provides a method for forming a liquid crystal display device, comprising: forming a gate line on an insulating substrate, wherein the two sides of a section of the gate line protrude to form first and second protrusions respectively region, and has a hollow region in the middle of the first and second protruding regions to separate the region into a first part and a second part; a gate line is respectively formed on the first part and the second part First and second active layers; define a source line on the first and second active layers and the insulating substrate, and define first and second active layers on the first and second active layers and the insulating substrate respectively a drain line, such that the source line spans the overlapping region of the active layer and the first portion and the active layer and the second portion substantially perpendicular to the extending direction of the gate line In the overlapping area, the distance between the edge of the source line and the edge of the overlapping area in the direction of the gate line is greater than the accuracy variation of the exposure machine in the direction of the gate line; and the first and second drain lines are made according to substantially parallel to the extending direction of the source line, respectively across the first and second active layers and the first and the overlapping area of the second part, the distance between the edge of the first and second drain lines and the edge of the overlapping area in the direction of the gate line and perpendicular to the direction of the gate line is greater than that of the exposure machine in the direction of the gate line, the variation of accuracy in the direction perpendicular to the gate lines; and forming the first and second pixel electrodes. the

通过本发明所揭露的薄膜晶体管液晶显示(TFT-LCD)装置及其形成方法,可避免栅极-漏极电容在机台对位不准时发生偏差,因而可防范LCD不同区域亮度不均匀的现象。  Through the thin film transistor liquid crystal display (TFT-LCD) device and its forming method disclosed in the present invention, it is possible to avoid the deviation of the gate-drain capacitance when the alignment of the machine is not accurate, so that the phenomenon of uneven brightness in different areas of the LCD can be prevented . the

然而,本发明的结构与其形成方法,连同其额外的目的与优点,需通过以下特定实施例的描述,并且阅读时参考附加图标,以能获得最佳的理解。  However, the structure and method of forming the present invention, together with additional objects and advantages thereof, may be best understood through the following description of specific embodiments and when read with reference to the accompanying figures. the

附图说明 Description of drawings

图1是一传统TFT-LCD装置当中一画素单元的平面图;  Fig. 1 is a plan view of a pixel unit in a conventional TFT-LCD device;

图2是图1的传统TFT-LCD装置当中一画素单元在曝光时源极/漏极向右偏移的平面图;  Figure 2 is a plan view of a pixel unit in the traditional TFT-LCD device of Figure 1 when the source/drain is shifted to the right during exposure;

图3是一TFT-LCD当中一画素单元的等效电路图;  Fig. 3 is an equivalent circuit diagram of a pixel unit in a TFT-LCD;

图4A及图4B是显示本发明的一LCD装置当中一画素单元的实施例的平面图,并在TFT附近具有不同的栅极线宽度而具有不同的内陷区域;  4A and FIG. 4B are plan views showing an embodiment of a pixel unit in an LCD device of the present invention, and have different gate line widths and different sunken regions near the TFT;

图5A至图5E是呈现图4A的LCD装置当中一画素单元形成过程的剖面图;  5A to 5E are cross-sectional views showing the formation process of a pixel unit in the LCD device of FIG. 4A;

图6A至图6E是呈现图4A的LCD装置当中一画素单元形成过程的平面图;  6A to 6E are plan views showing the formation process of a pixel unit in the LCD device of FIG. 4A;

图7是显示本发明另一LCD装置当中一画素单元的实施例的平面图;以及  7 is a plan view showing an embodiment of a pixel unit in another LCD device of the present invention; and

图8A至图8E是呈现图7的LCD装置当中一画素单元形成过程的平面图。  8A to 8E are plan views showing a process of forming a pixel unit in the LCD device of FIG. 7 . the

符号说明:  Symbol Description:

10~传统薄膜晶体管-液晶显示装置的一画素单元  10~Traditional thin film transistor-one pixel unit of liquid crystal display device

11~栅极线  11~Gate line

12~栅极          13~主动层  12~gate 13~active layer

14~源极线        15~源极  14~source line 15~source

16~漏极线        17~漏极  16~drain line 17~drain

18~画素电极  18~Pixel electrodes

40、40’~本发明的LCD装置的一画素单元  40, 40'~a pixel unit of the LCD device of the present invention

41~栅极线/导电薄膜            41a~凸出区域  41~gate line/conductive film 41a~protruding area

41b~内陷区域                  42~栅极  41b~indented area 42~gate

43~半导体层/主动层            44~源极线  43~semiconductor layer/active layer 44~source line

45~源极                       46~漏极线  45~source 46~drain line

47~漏极                       48~画素电极  47~Drain 48~Pixel Electrode

52~栅极绝缘薄膜               55~钝化薄膜  52~Gate insulation film 55~Passivation film

66~接触孔                     70~本发明LCD装置的一画素单元  66~contact hole 70~one pixel unit of the LCD device of the present invention

71~栅极线                     71a1~第一凸出区域  71~gate line 71a1~the first protruding area

71a2~第二凸出区域             71b~内陷区域  71a2~the second protruding area 71b~indented area

721~第一栅极                  722~第二栅极  721~the first grid 722~the second grid

731~第一主动层                732~第二主动层  731~First active layer 732~Second active layer

741~第一源极                  742~第二源极  741~the first source 742~the second source

761~第一漏极线                762~第二漏极线  761~the first drain line 762~the second drain line

771~第一漏极                  772~第二漏极  771~the first drain 772~the second drain

781~第一画素电极              782~第二画素电极  781~First pixel electrode 782~Second pixel electrode

861~第一接触孔                862~第二接触孔  861~the first contact hole 862~the second contact hole

具体实施方式 Detailed ways

此处所参考的图标并未以等比例来作缩减。图中所描绘不同组件的相对尺寸并非用以表示这些组件实际尺寸的比例特性,而仅用以辅佐本领域的普通技术人员,使其能清楚地得知如何制造与使用本发明,以及明白蕴含于本发明内的创造性概念。  The icons referenced herein are not scaled down to scale. The relative sizes of the different components depicted in the drawings are not intended to represent the proportional characteristics of the actual sizes of these components, but are only used to assist those of ordinary skill in the art to clearly understand how to make and use the present invention, as well as understand the implications Inventive concepts within the present invention. the

参考图4A,其是显示本发明的一LCD装置当中一画素单元的实施例的平面图。如图所示,在一画素单元40内,一栅极线41形成于一绝缘基板(图中未显示)上,其中该栅极线当中一区段的一边凸出而形成一凸出区域41a, 以及另一侧内凹而形成一内陷区域41b,其正对于所述凸出区域41a。该区段是用作一栅极42。一主动层43形成于栅极42上。一源极线44依大体上垂直于所述栅极线41的延伸方向,横跨所述主动层43与所述栅极线41的重叠区域而具有一源极45于主动层43上,并延伸超出所述主动层43的边界。一漏极线46耦接一画素电极48,并依大体上平行于所述源极线44的延伸方向,由所述栅极线41的凸出区域41a往内陷区域41b来横跨所述主动层43与所述栅极线41的重叠区域,而具有一漏极47于主动层43上。在所述主动层43内所述源极45与漏极47之间定义出通道区域。请注意,源极线44在TFT上略弯向漏极线46,然而源极线也可为直线,或以其它大体上垂直于所述栅极线41的延伸方向来延伸即可。  Referring to FIG. 4A , it is a plan view showing an embodiment of a pixel unit in an LCD device of the present invention. As shown in the figure, in a pixel unit 40, a gate line 41 is formed on an insulating substrate (not shown in the figure), wherein one side of a section of the gate line protrudes to form a protruding region 41a , and the other side is recessed to form a recessed area 41b, which is directly opposite to the protruding area 41a. This section is used as a gate 42 . An active layer 43 is formed on the gate 42 . A source line 44 has a source electrode 45 on the active layer 43 across the overlapping region of the active layer 43 and the gate line 41 according to the extending direction substantially perpendicular to the gate line 41, and extending beyond the boundaries of the active layer 43 . A drain line 46 is coupled to a pixel electrode 48, and is substantially parallel to the extending direction of the source line 44, from the protruding region 41a of the gate line 41 to the recessed region 41b to cross the The active layer 43 overlaps with the gate line 41 , and has a drain 47 on the active layer 43 . A channel region is defined between the source electrode 45 and the drain electrode 47 in the active layer 43 . Please note that the source line 44 slightly bends toward the drain line 46 on the TFT, however, the source line can also be a straight line, or extend in other directions substantially perpendicular to the gate line 41 . the

明显可知,在结构尺寸配合制作工艺精度变化下,CGD不会因为制作工艺精度变化而随之改变。如图所示,平行栅极线41的延伸方向称为X方向,垂直栅极线41的延伸方向称为Y方向。若曝光机在X方向有±DX的精度变化量,而源极线44与主动层43与栅极线41的重叠区域的边缘在X方向的距离为LX1,漏极线46与主动层43与栅极线41的重叠区域的边缘在X方向的距离为LX2,因此LX1与LX2必须设计为大于DX。同理,若曝光机在Y方向有±DY的精度变化量,漏极线46与主动层43与栅极线41的重叠区域的边缘在Y方向的距离为LY,因此LY必须设计为大于DY。当达到此设计要求时,若曝光机的曝光精度发生偏差,源极45/漏极47与栅极42的重叠面积都保持固定,从而CGD的变动不大。  It is obvious that, under the change of the structural size and the manufacturing process precision, the C GD will not change due to the change of the manufacturing process precision. As shown in the figure, the extending direction of the parallel gate lines 41 is called the X direction, and the extending direction of the vertical gate lines 41 is called the Y direction. If the exposure machine has a precision variation of ±D X in the X direction, and the distance between the source line 44 and the overlapping area of the active layer 43 and the gate line 41 in the X direction is L X1 , the drain line 46 and the active layer The distance between the edge of the overlapping area of 43 and the gate line 41 in the X direction is L X2 , so L X1 and L X2 must be designed to be larger than D X . Similarly, if the exposure machine has an accuracy variation of ±D Y in the Y direction, the distance in the Y direction from the edge of the overlapping area between the drain line 46 and the active layer 43 and the gate line 41 is LY , so LY must be designed is greater than D Y . When this design requirement is met, if the exposure accuracy of the exposure machine deviates, the overlapping area of the source 45 /drain 47 and the gate 42 remains constant, so that C GD does not change much.

另外,为了达到栅极线41低电阻的要求,可如图4B所示的画素单元40’,栅极线是增加线宽,而具有一空洞空间41b正对所述突出区域41a。  In addition, in order to meet the requirement of low resistance of the gate line 41, the pixel unit 40' as shown in FIG. 4B can be used. The gate line is increased in line width, and has a hollow space 41b facing the protruding region 41a. the

图5A至图5E是以图4A的LCD装置为例,来呈现本发明的LCD装置当中一画素单元形成过程的剖面图。图6A至图6E是以图4A的LCD装置为例,来呈现本发明的LCD装置当中一画素单元形成过程的平面图,而图5A至图5E分别显示图6A至图6E中沿直线AA’的剖面图。  5A to 5E take the LCD device of FIG. 4A as an example to present cross-sectional views of a formation process of a pixel unit in the LCD device of the present invention. 6A to 6E take the LCD device of FIG. 4A as an example to present a plan view of the formation process of a pixel unit in the LCD device of the present invention, and FIG. 5A to FIG. Sectional view. the

首先,参见图5A,形成一导电薄膜41于一绝缘基板50(譬如一玻璃基板)上,其中所述导电薄膜41的材质例如是铝(Aluminum;Al)或铬(chromium;Cr)之类的低电阻金属或其合金,以单层或多层结构形成,而形成方法例如是溅渡(sputtering)的传统沉积程序。接着,再利用一曝光显影及蚀刻的程序(photolithography-etching process)为所述导电薄膜41制作图案(patternning),以形成一栅极线41与栅极42于绝缘基板50上。如图6A所示,栅极线41当中一区段的一边凸出而形成一凸出区域41a,以及该区段具有一内陷区域41b正对于所述凸出区域41a,以及所述区段作为栅极42。  First, referring to FIG. 5A, a conductive film 41 is formed on an insulating substrate 50 (such as a glass substrate), wherein the material of the conductive film 41 is, for example, aluminum (Aluminum; Al) or chromium (chromium; Cr) or the like. The low-resistance metal or its alloy is formed in a single-layer or multi-layer structure, and the formation method is a traditional deposition process such as sputtering. Then, a photolithography-etching process is used to pattern the conductive film 41 to form a gate line 41 and a gate 42 on the insulating substrate 50 . As shown in FIG. 6A, one side of a section of the gate line 41 protrudes to form a raised area 41a, and the section has a recessed area 41b facing the raised area 41a, and the section as gate 42 . the

接下来,如图5B及图6B所示,形成一栅极绝缘薄膜(例如是一氮化物层)52,以及一由非晶硅(amorphous silicon)构成的半导体层43(例如是包括一掺杂N型杂质的非晶硅层)于上述步骤所产生结构的表面上,而形成方法例如是利用电浆化学气相(plasma enhanced Chemical Vapor Deposition;PECVD)的传统沉积程序,并随后为所述半导体层43制作图案以形成一主动层43于栅极42(与栅极绝缘薄膜52)上。  Next, as shown in FIG. 5B and FIG. 6B, a gate insulating film (for example, a nitride layer) 52, and a semiconductor layer 43 made of amorphous silicon (for example, including a doped N-type impurity amorphous silicon layer) on the surface of the structure produced in the above steps, and the formation method is, for example, a conventional deposition procedure using plasma enhanced chemical vapor (plasma enhanced chemical vapor deposition; PECVD), and then the semiconductor layer 43 is patterned to form an active layer 43 on the gate 42 (and gate insulating film 52). the

接下来,如图5C及图6C所示,形成一导电薄膜于上述步骤所产生结构的整个表面上,其中所述导电薄膜的材质例如是铝(Aluminum;Al)或铬(chromium;Cr)之类的低电阻金属或其合金,以单层或多层结构形成,而形成方法例如是利用溅渡(sputtering)之类的传统沉积程序,并继而利用曝光显影及蚀刻的程序来为所述导电薄膜制作图案以形成一源极线44及一漏极线46,其中所述源极线44与漏极线46分别具有一源极45与漏极47于该主动层43上。如图5C所示,该制作图案的程序是令源极线44依大体上垂直于所述栅极线41的延伸方向横跨所述主动层43与所述栅极线41的重叠区域,以及所述漏极线46依大体上平行于所述源极线44的延伸方向由所述栅极线41凸出侧一预定形成画素电极的区域,来横跨所述主动层43与所述栅极线41的重叠区域。  Next, as shown in FIG. 5C and FIG. 6C, a conductive film is formed on the entire surface of the structure produced in the above steps, wherein the material of the conductive film is, for example, aluminum (Aluminum; Al) or chromium (chromium; Cr) Low-resistance metals or their alloys are formed in a single-layer or multi-layer structure, and the formation method is, for example, using traditional deposition procedures such as sputtering (sputtering), and then using exposure, development and etching procedures to provide the conductive The thin film is patterned to form a source line 44 and a drain line 46 , wherein the source line 44 and the drain line 46 respectively have a source 45 and a drain 47 on the active layer 43 . As shown in FIG. 5C , the patterning procedure is to make the source line 44 cross the overlapping area of the active layer 43 and the gate line 41 substantially perpendicular to the extending direction of the gate line 41, and The drain line 46 is substantially parallel to the extension direction of the source line 44 from the projected side of the gate line 41 to a predetermined area for forming a pixel electrode, across the active layer 43 and the gate. The overlapping area of polar lines 41. the

接下来,如图5D及图6D所示,形成一钝化薄膜(passivation film)55于上述步骤所产生结构的整个表面上,其中该钝化薄膜55例如是一氮化物薄膜,并且形成方法利用电浆CVD的传统沉积程序,随后在所述钝化薄膜55内利用曝光显影及蚀刻的程序来形成一接触孔(contact hole)61(未显示于图5D,而显示于图6D),以使所述漏极线46的一部分区域曝露于外。  Next, as shown in FIG. 5D and FIG. 6D, a passivation film (passivation film) 55 is formed on the entire surface of the structure produced in the above steps, wherein the passivation film 55 is, for example, a nitride film, and the forming method utilizes The traditional deposition process of plasma CVD, and then utilize the procedure of exposure development and etching in described passivation film 55 to form a contact hole (contact hole) 61 (not shown in Fig. 5D, but shown in Fig. 6D), so that A part of the drain line 46 is exposed to the outside. the

接下来,如图5E及图6E所示,形成一透明导电材料于上述步骤所产生结构的整个表面上,譬如是氧化铟锡或氧化铟锌,并利用一蚀刻程序为所述导电材料制作图案,以使该导电材料连接至所述漏极线46的曝露表面,而形成一画素电极48,其中该画素电极48是形成于漏极线46的一部分区域以及接触孔61之上,以及形成于所述主动层43与TFT的邻近钝化薄膜55上。所述画素电极48是通过钝化薄膜55内的接触孔61来连接至漏极线46。  Next, as shown in FIG. 5E and FIG. 6E, a transparent conductive material, such as indium tin oxide or indium zinc oxide, is formed on the entire surface of the structure produced in the above steps, and an etching process is used to make a pattern for the conductive material so that the conductive material is connected to the exposed surface of the drain line 46 to form a pixel electrode 48, wherein the pixel electrode 48 is formed on a part of the drain line 46 and the contact hole 61, and formed on the The active layer 43 is on the passivation film 55 adjacent to the TFT. The pixel electrode 48 is connected to the drain line 46 through the contact hole 61 in the passivation film 55 . the

值得注意的是,本发明的结构可扩充为一双薄膜晶体管结构,以增加导通电流。图7是显示本发明的另一LCD装置当中一画素单元的实施例的平面图,其是包含两个并联的薄膜晶体管。  It should be noted that the structure of the present invention can be extended to a double thin film transistor structure to increase the conduction current. 7 is a plan view showing an embodiment of a pixel unit in another LCD device of the present invention, which includes two thin film transistors connected in parallel. the

如图7所示,在一画素单元70内,一栅极线71沿水平方向设置于一绝缘基板上。所述栅极线71当中一区段的两边凸出而分别形成第一凸出区域71a1及第二凸出区域71a2,并且具有一空洞区域71b于所述第一凸出区域71a1及第二凸出区域71a2中间,而将该区段分隔成第一部分及第二部分。所述第一部分及第二部分别作为第一栅极721与第二栅极722。一第一主动层731及第二主动层732分别形成于所述第一栅极721与第二栅极722上。一源极线74沿大体上垂直于所述栅极线71的延伸方向,横跨所述第一主动层731与栅极线第一部分的重叠区域以及第二主动层732与栅极线71第二部分的重叠区域,而分别在所述重叠区域上具有一第一源极751及第二源极752。一第一漏极线761依大体上平行于所述源极线74的延伸方向,由一第一画素电极781横跨所述第一主动层731与所述栅极线71第一部分的重叠区域,而在该重叠区域上具有一第一漏极771。类似地,一第二漏极线762依大体上平行于 所述源极线74的延伸方向,由一第二画素电极782横跨所述第二主动层732与所述栅极线71第二部分的重叠区域,而在该重叠区域上具有一第二漏极772。第一源极751与第一漏极771之间,以及第二源极752与第二漏极772之间,是分别在所述第一主动层731及第二主动层732内定义出一通道区域。  As shown in FIG. 7 , in a pixel unit 70 , a gate line 71 is horizontally disposed on an insulating substrate. Both sides of a section of the gate line 71 protrude to respectively form a first protruding area 71a 1 and a second protruding area 71a 2 , and a hollow area 71b is formed in the first protruding area 71a 1 and the second protruding area 71a 2 . The second protruding region 71a2 is in the middle, and the section is divided into a first part and a second part. The first portion and the second portion serve as a first gate 72 1 and a second gate 72 2 respectively. A first active layer 73 1 and a second active layer 73 2 are formed on the first gate 72 1 and the second gate 72 2 respectively. A source line 74 is substantially perpendicular to the extending direction of the gate line 71, across the overlapping region of the first active layer 731 and the first part of the gate line and the second active layer 732 and the gate line 71 in the overlapping area of the second part, and respectively have a first source 75 1 and a second source 75 2 on the overlapping area. A first drain line 761 is substantially parallel to the extending direction of the source line 74, and a first pixel electrode 781 spans the first active layer 731 and the first part of the gate line 71 An overlapping region, and a first drain 77 1 is located on the overlapping region. Similarly, a second drain line 762 is substantially parallel to the extending direction of the source line 74, and a second pixel electrode 782 spans the second active layer 732 and the gate line 71 is the overlapping area of the second part, and there is a second drain 77 2 on the overlapping area. Between the first source 75 1 and the first drain 77 1 , and between the second source 75 2 and the second drain 77 2 , are respectively the first active layer 73 1 and the second active layer 73 2 defines a channel area.

此结构是一双薄膜晶体管结构,其包含两个并联的第一薄膜晶体管及第二薄膜晶体管。第一薄膜晶体管包括第一栅极721,第一主动层731,第一源极751,以及第一漏极771;而第二薄膜晶体管包括第二栅极722,第二主动层732,第二源极752,以及第二漏极772。此外,需注意到,图中源极线74经过第一及第二薄膜晶体管时略弯向第一及第二漏极线761及762,然而源极线74也可为一直线,即沿一大体上垂直于所述栅极线71的延伸方向来延伸即可。  The structure is a double thin film transistor structure, which includes two parallel first thin film transistors and second thin film transistors. The first thin film transistor includes a first gate 72 1 , a first active layer 73 1 , a first source 75 1 , and a first drain 77 1 ; while the second thin film transistor includes a second gate 72 2 , a second active layer 73 2 , second source 75 2 , and second drain 77 2 . In addition, it should be noted that in the figure, the source line 74 slightly bends toward the first and second drain lines 76 1 and 76 2 when passing through the first and second thin film transistors, but the source line 74 can also be a straight line, that is, It only needs to extend along a direction substantially perpendicular to the extending direction of the gate lines 71 .

此实施例的LCD装置在结构尺寸与制作工艺精度变化相配合下,CGD即不会因为制作工艺精度变化而随之改变。如图所示,源极线74的边缘与两主动层731/732与栅极线71的重叠区域的边缘在X方向的距离分别为LX11及LX12,以及两漏极线761及762的边缘分别与两主动层731、732与栅极线71的重叠区域的边缘在X方向的距离为LX21及LX22,而在Y方向的距离为LY1及LY2。倘若曝光机在X及Y方向分别有±DX及±DY的精度变化量,则当LX11、LX12、LX21、LX22设计为大于DX,以及LY1与LY2设计为大于DY时,即使曝光机的曝光精度发生偏差,源极线74、第一漏极线761与栅极线71的重叠面积,以及源极线74、第二漏极线762与栅极线71的重叠面积都能保持固定,从而第一及第二薄膜晶体管的CGD的变动都不大。  In the LCD device of this embodiment, when the structural size and the manufacturing process precision change, the C GD will not change accordingly due to the manufacturing process precision change. As shown in the figure, the distances between the edge of the source line 74 and the edge of the overlapping area of the two active layers 73 1 /73 2 and the gate line 71 in the X direction are L X11 and L X12 respectively, and the two drain lines 76 1 The distances between the edges of the two active layers 73 1 , 73 2 and the overlapping areas of the gate line 71 in the X direction are L X21 and L X22 , and the distances in the Y direction are LY1 and LY2 . If the exposure machine has the accuracy variation of ±D X and ±D Y in the X and Y directions respectively, then when L X11 , L X12 , L X21 , and L X22 are designed to be greater than D X , and LY1 and LY2 are designed to be greater than When D Y , even if the exposure accuracy of the exposure machine deviates, the overlapping area of the source line 74, the first drain line 761 and the gate line 71, and the overlapping area between the source line 74, the second drain line 762 and the gate line The overlapping area of the line 71 can be kept constant, so that the C GD of the first and second thin film transistors have little variation.

这种双薄膜晶体管的LCD装置的形成过程是与图4A内具单薄膜晶体管结构的LCD装置的形成过程类似。为简略起见,在图8A至图8E呈现图7的LCD装置当中一画素单元形成过程的平面图,而省略剖面图的绘示及相关说明。形成过程包括以下步骤。  The formation process of this dual TFT LCD device is similar to the formation process of the LCD device with a single TFT structure in FIG. 4A . For the sake of brevity, FIGS. 8A to 8E present plan views of the formation process of a pixel unit in the LCD device of FIG. 7 , and the drawing and related description of the cross-sectional views are omitted. The forming process includes the following steps. the

首先,形成一导电薄膜于一绝缘基板(譬如一玻璃基板)上,其中所述 导电薄膜的材质例如是铝或铬之类的低电阻金属或其合金,以单层或多层结构形成,而形成方法例如是溅渡的传统沉积程序。继而,再利用一曝光显影及蚀刻的程序为所述导电薄膜制作图案,以形成一栅极线71于该绝缘基板上。如图8A所示,所述栅极线71当中一区段的两边凸出而分别形成第一凸出区域71a1及第二凸出区域71a2,并且具有一空洞区域71b而将所述区段分隔成第一栅极721与第二栅极722。  First, a conductive film is formed on an insulating substrate (such as a glass substrate), wherein the material of the conductive film is, for example, a low-resistance metal such as aluminum or chromium or an alloy thereof, formed in a single-layer or multi-layer structure, and Formation methods are, for example, conventional deposition procedures of sputtering. Then, a process of exposure, development and etching is used to pattern the conductive film, so as to form a gate line 71 on the insulating substrate. As shown in FIG. 8A , the two sides of a section of the gate line 71 protrude to form a first protruding area 71a 1 and a second protruding area 71a 2 , and have a hollow area 71b to separate the area. The segments are separated into a first gate 72 1 and a second gate 72 2 .

接下来,在上述步骤所产生结构的表面上,形成一栅极绝缘薄膜(例如是一氮化物层),以及一非晶硅构成的半导体层(比方是包括一掺杂N型杂质的非晶硅层)。而形成方法比方是利用电浆化学气相的传统沉积程序。之后,再为所述非晶硅制作图案以在所述第一栅极721(与其邻近的栅极绝缘薄膜)上,以及第二栅极722(与其邻近的栅极绝缘薄膜)上,分别形成一第一主动层731及第二主动层732,如图8B所示。  Next, on the surface of the structure produced in the above steps, a gate insulating film (such as a nitride layer) and a semiconductor layer made of amorphous silicon (such as an amorphous silicon layer doped with N-type impurities) are formed. silicon layer). Formation methods are, for example, conventional deposition procedures using plasma chemical vapor phase. Afterwards, the amorphous silicon is patterned so that on the first gate 72 1 (the gate insulating film adjacent thereto), and the second gate 72 2 (the gate insulating film adjacent thereto), A first active layer 73 1 and a second active layer 73 2 are respectively formed, as shown in FIG. 8B .

接下来,形成一导电薄膜于上述步骤所产生结构的整个表面上。该导电薄膜的材质举例而言,是铝或铬之类的低电阻金属或其合金,以单层或多层结构形成,而形成方法例如是利用溅渡的传统沉积程序。接着,再利用一曝光显影及蚀刻的程序来为所述导电薄膜制作图案,以形成一源极线74、第一漏极线761,以及第二漏极线762。参见图8C,该制作图案的程序是令源极线74依大体上垂直于栅极线71的延伸方向横跨第一主动层731及第二主动层732与所述栅极线71的重叠区域,以及令第一漏极线761及第二漏极线762依大体上平行于所述源极线74的延伸方向,分别由所述栅极线其中一侧一预定形成一第一及第二电极的区域来横跨第一主动层731及第二主动层732与该栅极线71的重叠区域。  Next, a conductive film is formed on the entire surface of the structure produced in the above steps. The material of the conductive film is, for example, a low-resistance metal such as aluminum or chromium or an alloy thereof, and is formed in a single-layer or multi-layer structure, and the forming method is, for example, a traditional deposition process using sputtering. Then, a process of exposure, development and etching is used to pattern the conductive film to form a source line 74 , a first drain line 76 1 , and a second drain line 76 2 . Referring to FIG. 8C, the patterning procedure is to make the source line 74 cross the first active layer 731, the second active layer 732 and the gate line 71 according to the extending direction substantially perpendicular to the gate line 71. The overlapping region, and making the first drain line 761 and the second drain line 762 substantially parallel to the extending direction of the source line 74, are respectively predetermined to form a first drain line from one side of the gate line. The area of the first and second electrodes spans the overlapping area of the first active layer 73 1 and the second active layer 73 2 with the gate line 71 .

接下来,形成一钝化薄膜于上述步骤所产生结构的整个表面上。该钝化薄膜譬如是一氮化物薄膜。而形成方法譬如是电浆CVD的传统沉积程序。随后,在所述钝化薄膜内实行一曝光显影及蚀刻的程序,以形成一第一接触孔861及第二接触孔862,而使第一漏极线761及第二漏极线762的一部分区 域曝露于外,如图8D所示。  Next, a passivation film is formed on the entire surface of the structure produced in the above steps. The passivation film is, for example, a nitride film. The forming method is, for example, a conventional deposition process of plasma CVD. Subsequently, a process of exposure, development and etching is carried out in the passivation film to form a first contact hole 86 1 and a second contact hole 86 2 , so that the first drain line 76 1 and the second drain line A portion of the region 762 is exposed, as shown in Figure 8D.

接下来,形成一透明导电材料于上述步骤所产生结构的整个表面上,譬如是氧化铟锡或氧化铟锌,并利用一蚀刻程序来为所述导电材料制作图案,以使所述导电材料连接至第一漏极线761及第二漏极线762的曝露表面,而形成第一画素电极781及第二画素电极782。参见图8E,制作图案的过程是使第一画素电极781形成于第一漏极线761的一部分区域与第一接触孔861上以及第一薄膜晶体管的邻近钝化薄膜上;以及使第二画素电极782形成于第二漏极线762的一部分区域与第二接触孔862上以及第二薄膜晶体管的邻近钝化薄膜上。如此一来,第一画素电极781可通过第一接触孔861来连接至第一漏极线761,而第二画素电极782可通过第二接触孔862来连接至第二漏极线762。  Next, form a transparent conductive material, such as indium tin oxide or indium zinc oxide, on the entire surface of the structure produced in the above steps, and use an etching process to pattern the conductive material so that the conductive material is connected To the exposed surfaces of the first drain line 76 1 and the second drain line 76 2 , a first pixel electrode 78 1 and a second pixel electrode 78 2 are formed. Referring to FIG. 8E , the patterning process is to form the first pixel electrode 781 on a part of the first drain line 761 , the first contact hole 861 and the adjacent passivation film of the first thin film transistor; The second pixel electrode 78 2 is formed on a part of the second drain line 76 2 , on the second contact hole 86 2 and on the adjacent passivation film of the second thin film transistor. In this way, the first pixel electrode 781 can be connected to the first drain line 761 through the first contact hole 861 , and the second pixel electrode 782 can be connected to the second drain line through the second contact hole 862. polar line 76 2 .

虽然本发明已以较佳实施例揭露如上,然其并非用以限定本发明,任何熟习此技艺的人,在不脱离本发明的精神和范围内,当可作些许的更动与润饰,因此本发明的保护范围当视申请专利范围所界定的为准。  Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Anyone skilled in this art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore The scope of protection of the present invention should be as defined by the scope of the patent application. the

Claims (2)

1.一种液晶显示装置,其特征在于包括:1. A liquid crystal display device, characterized in that comprising: 一栅极线,形成于一绝缘基板上,a gate line formed on an insulating substrate, 其中该栅极线当中一区段的两边凸出而分别形成第一及第二凸出区域,并且具有一空洞区域于所述第一及第二凸出区域中间而将所述区段分隔成第一部分及第二部分;Wherein the two sides of a segment in the gate line protrude to form first and second protruding areas respectively, and there is a hollow area in the middle of the first and second protruding areas to separate the segment into Part I and Part II; 一第一及一第二主动层,分别形成于所述栅极线的第一部分及第二部分上;A first and a second active layer are respectively formed on the first part and the second part of the gate line; 一第一及一第二画素电极,分别形成于所述绝缘基板上;A first pixel electrode and a second pixel electrode are respectively formed on the insulating substrate; 一源极线,依大体上垂直于所述栅极线的延伸方向,横跨所述第一主动层与所述第一部分的重叠区域以及所述第二主动层与所述第二部分的重叠区域,该源极线的边缘与所述重叠区域的边缘在栅极线方向的距离大于曝光机在栅极线方向的精度变化量;以及a source line, substantially perpendicular to the extending direction of the gate line, spanning the overlapping region of the first active layer and the first portion and the overlapping area of the second active layer and the second portion In the area, the distance between the edge of the source line and the edge of the overlapping area in the gate line direction is greater than the accuracy variation of the exposure machine in the gate line direction; and 一第一及一第二漏极线,分别耦接所述第一及第二画素电极,并依大体上平行于所述源极线的延伸方向,分别横跨并延伸超出所述第一及第二主动层分别与所述第一及第二部分的重叠区域,该第一及第二漏极线的边缘与所述重叠区域的边缘在栅极线方向、垂直于栅极线方向的距离分别大于曝光机在栅极线方向、垂直于栅极线方向的精度变化量。a first and a second drain line, respectively coupled to the first and second pixel electrodes, and extending across and extending beyond the first and second pixel electrodes respectively in a direction substantially parallel to the extending direction of the source line In the overlapping regions of the second active layer and the first and second parts respectively, the distance between the edges of the first and second drain lines and the edges of the overlapping regions in the direction of the gate lines and perpendicular to the direction of the gate lines They are respectively greater than the precision variation of the exposure machine in the direction of the gate lines and in the direction perpendicular to the gate lines. 2.一种液晶显示装置的形成方法,其特征在于包括:2. A method for forming a liquid crystal display device, characterized in that it comprises: 在一绝缘基板上形成一栅极线,forming a gate line on an insulating substrate, 其中所述栅极线当中一区段的两边凸出而分别形成第一及第二凸出区域,并且具有一空洞区域于所述第一及第二凸出区域中间而将该区段分隔成第一部分及第二部分;Wherein the two sides of a segment in the gate line protrude to form first and second protruding areas respectively, and there is a hollow area in the middle of the first and second protruding areas to separate the segment into Part I and Part II; 在所述栅极线的第一部分及第二部分上分别形成一第一及第二主动层;forming a first and a second active layer on the first part and the second part of the gate line; 在所述第一、第二主动层及绝缘基板上定义一源极线,以及分别在所述第一及第二主动层与绝缘基板上定义第一及第二漏极线,以令所述源极线依大体上垂直于所述栅极线的延伸方向横跨所述第一主动层与所述第一部分的重叠区域以及所述第二主动层与所述第二部分的重叠区域,该源极线的边缘与所述重叠区域的边缘在栅极线方向的距离大于曝光机在栅极线方向的精度变化量;以及令所述第一及第二漏极线依大体上平行于所述源极线的延伸方向,分别由所述栅极线其中一侧一预定形成一第一及第二电极的区域来横跨并延伸超出所述第一及第二主动层分别与所述第一及第二部分的重叠区域,该第一及第二漏极线的边缘与所述重叠区域的边缘在栅极线方向、垂直于栅极线方向的距离分别大于曝光机在栅极线方向、垂直于栅极线方向的精度变化量;以及A source line is defined on the first and second active layers and the insulating substrate, and first and second drain lines are respectively defined on the first and second active layers and the insulating substrate, so that the The source line crosses the overlapping area of the first active layer and the first part and the overlapping area of the second active layer and the second part in a direction substantially perpendicular to the extending direction of the gate line, the The distance between the edge of the source line and the edge of the overlapping area in the direction of the gate line is greater than the accuracy variation of the exposure machine in the direction of the gate line; and the first and second drain lines are substantially parallel to the The extending direction of the source line is to cross and extend beyond the first and second active layers respectively and the first In the overlapping area of the first and second parts, the distance between the edge of the first and second drain lines and the edge of the overlapping area in the direction of the gate line and perpendicular to the direction of the gate line is greater than that of the exposure machine in the direction of the gate line , the variation of accuracy perpendicular to the gate line direction; and 形成所述第一及第二画素电极,分别与所述第一及第二漏极线电性连接。The first and second pixel electrodes are formed to be electrically connected to the first and second drain lines respectively.
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