CN1779964A - Substrate with through-via and wiring connected to through-via and manufacturing method thereof - Google Patents

Abstract

A substrate includes a base member having a through-hole, and a conductive metal filling in the through-hole so as to form a penetrating via. The penetrating via contains a conductive core member that is substantially at the central axis of the through-hole.

Description

Substrate with through-via and wiring connected to through-via and manufacturing method thereof

technical field

The present invention generally relates to a substrate and a method of manufacturing the same, and more particularly to a substrate having a through-via passing through a base member and wiring connected to the through-via and a method of manufacturing the same.

Background technique

In recent years, using fine processing technology of semiconductors, packages of so-called MEMS (Micro Electromechanical Systems) of micromachines and substrates such as packages in which semiconductor devices are mounted have been developed. The above-mentioned substrate adopts a configuration in which through-vias are formed in through-holes penetrating the base member to electrically connect wirings formed on respective sides of the base member.

Fig. 1 is a cross-sectional view of a substrate. As shown in FIG. 1 , a substrate 10 includes a silicon component 11 , an insulating layer 13 , a through via 15 , wirings 17 and 21 , and solder resists 19 and 24 . In the silicon component 11 , a via hole 12 penetrating through the silicon component 11 is formed. The insulating layer 13 is formed to cover the surface of the silicon member 11 in which the via hole 12 is formed. An insulating layer 13 is provided to insulate the through via 15 and the wirings 17 and 21 from the silicon component.

The through channel 15 is provided in the via hole 12 in which the insulating layer 13 is formed. The through channel 15 has a cylindrical shape, and the end 15a of the through channel 15 is coplanar with the surface 13a of the insulating layer 13 , and the other end 15b of the through channel 15 is also coplanar with the other surface 13b of the insulating layer 13 . The through vias 15 are connected to wirings 17 and 21 provided on respective sides of the silicon component 11 . Through vias 15 are provided to electrically connect wirings 17 and 21 formed on respective sides of silicon component 11 .

The through channel 15 is provided with the following steps: a seed layer is formed on the upper surface of the silicon member 11 on which the insulating layer 13 is formed by a sputtering method, and a conductive metal layer is deposited on the seed layer by an electrolytic plating method (for example, see Patent Document 1).

The wiring 17 connected to the end 15 a of the penetrating channel 15 includes an external connection terminal 18 . The external connection terminal 18 is connected to another substrate such as a motherboard 26 . A solder resist layer 19 exposing the external connection terminal 18 is formed on the upper surface of the base member 11 so as to cover the wiring 17 except for the external connection terminal 18 .

The wiring 21 connected to the end portion 15 b of the penetrating channel 15 includes an external connection terminal 22 . MEMS or semiconductor devices 25 are mounted on the external connection terminals 22 . Solder resist 24 exposing external connection terminals 22 is provided on the lower surface of silicon component 11 so as to cover wiring 21 other than external connection terminals 22 .

However, the shape of the conventional through-channel 15 is cylindrical, so that water penetrates into the gap between the insulating layer 13 facing the through-channel 15 and the through-channel 15, thereby degrading the through-channel 15 and reducing the connection between the wiring 17 and 21 and the through-channel. 15 electrical connection reliability between.

Moreover, according to the conventional method of forming the through-hole 15, a discrete conductive metal layer on the surface of the seed layer is formed on the inner end of the through-hole 12, and the conductive metal layer grows along the inner end of the through-hole 12, so that A void (cavity) remains near the center of the channel 15 . Therefore, the electrical connection reliability of the through-via 15 connected to the wirings 17 and 21 degrades.

Contents of the invention

The present invention provides a substrate having through-vias and wiring connected to the through-vias that substantially avoids one or more of the problems described above.

Features and advantages of embodiments of the invention are set forth in the following description, and in part will be apparent from the description and drawings, or may be learned by practice of the invention by means of the teachings presented in the description. These objects and objectives of the present invention can be realized and obtained by utilizing the substrate having through-vias and wiring connected to the through-vias that are fully, clearly, concisely and accurately specified in the description to enable those skilled in the art to implement the present invention. Other features and advantages.

To achieve these and other advantages in accordance with the objects of the present invention, one embodiment of the present invention provides a substrate comprising a base member having a through hole and a conductive metal filling the through hole to form a through via, wherein the through The channel contains a conductive core feature therein, and the conductive core feature is aligned substantially at a central axis of the via.

According to one embodiment of the present invention, the conductive core member is arranged substantially at the central axis of the through-hole, wherein the conductive core member serves as an electrode, and the conductive metal grows from the conductive core member to the surface of the base member forming the through-hole; thus Holes (cavities) are prevented from remaining in the through channel.

According to an aspect of the present invention, there is provided a substrate consisting of a base member having a through hole and a conductive metal filling the through hole to form a through channel, wherein the through channel includes a through portion provided in the through hole and a protrusion protruding from the base member, the protrusion being connected to a corresponding side of the through portion, wherein the through portion contains the conductive core member therein, and the conductive core member is arranged substantially at the central axis of the through hole.

According to at least one embodiment of the present invention, conductive core members arranged substantially at the central axis of the through-hole are used as electrodes, and conductive metal is thus grown from the conductive core member toward the surface of the base member forming the through-hole. Holes (cavities) are then prevented from remaining in the through passage. Also, protrusions larger in diameter than the penetration portion are arranged on both ends of the penetration portion, thereby preventing water from permeating into a gap between the base member facing the penetration portion and the penetration portion. Degradation of the through passage is thus prevented.

According to another aspect of the present invention, there is provided a method of manufacturing a substrate comprising a base member having a through-hole, a conductive metal filled in the through-hole, and a through-via including a conductive core member therein, The conductive core member is arranged substantially at the central axis of the through hole, the method comprising the steps of arranging the conductive core member substantially at the central axis of the through hole, and using the conductive member as an electrode according to an electrolytic plating method, using a conductive metal Steps to fill vias.

According to at least one embodiment of the present invention, by means of an electrolytic plating method with a conductive core part used as an electrode, a conductive metal is segregated from the conductive core part and grows to the surface of the base part forming the through hole, so as to prevent voids (cavities) from remaining in the through the channel.

Description of drawings

Other objects and further features of the present invention will be apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

Figure 1 is a cross-sectional view of a conventional substrate;

Figure 2 is a cross-sectional view of a substrate according to a first embodiment of the present invention;

Fig. 3 is a sectional view of the substrate shown in Fig. 2 along the C-C line;

Figure 4 is a plan view of a base member for making a substrate according to the present invention;

Figures 5-32 illustrate the various steps of manufacturing a substrate according to a first embodiment;

Figure 33 shows the growth process of conductive metal; and

Fig. 34 is a sectional view of a substrate according to a second embodiment of the present invention.

Detailed ways

Various embodiments of the present invention are described below with reference to the accompanying drawings.

(first embodiment)

First, the configuration of a substrate 50 according to a first embodiment of the present invention will be described with reference to FIGS. 2 and 3 . 2 is a sectional view of a substrate according to a first embodiment of the present invention, and FIG. 3 is a sectional view of the substrate shown in FIG. 2 along line C-C. It should be noted that, as shown in FIG. 2 , the Y←→Y direction is the lengthwise direction of the conductive core member 58 , and the X←→X direction perpendicular to the Y←→Y direction is the lateral direction of the base member 51 .

Substrate 50 is composed of base member 51 , insulating layers 53 and 65 , through via 55 , wiring 68 , diffusion protection layers 61 and 71 , and solder resist layer 75 . The substrate 50 is a kind of insert. As shown in FIG. 2 , for example, MEMS (micro-electromechanical systems) and semiconductor devices in which fine processing technology for manufacturing semiconductors is used, are mounted on the lower surface of a substrate 50, and another substrate such as a motherboard is mounted on the lower surface of the substrate 50. Mounted on the upper surface of the substrate 50 (on the side on which the wiring 68 is formed).

The base member 51 includes a silicon member composed of silicon. The thickness M1 of the base member 51 is, for example, 100-200 micrometers. A plurality of through holes 52 are formed in the base member 51 . The diameter R2 of the through hole 52 is, for example, 80 micrometers or more. It should be noted that components other than silicon components such as glass components may also be used. When an insulating member such as a glass member is used, it is not necessary to form the insulating layer 53 .

The insulating layer 53 is formed to cover the surface of the base member 51 including the through hole 52 . An insulating layer 53 is provided to insulate the base part composed of silicon from the through-via 55 .

The through channel 55 is composed of a through portion 57 , a first protrusion, that is, a connection pad 59 , a second protrusion, that is, a wiring connection portion 56 , and a conductive core part 58 . The through channel 55 is formed by isolating a conductive metal and growing the through channel using the conductive core member 58 as an electrode. For example Ni-Co alloy can be used as the conductive metal. The composition of the Ni—Co alloy is, for example, Ni:Co=6:4˜7:3.

A penetrating portion 57 having a columnar shape is formed in the via hole 52 in which the insulating layer 53 is formed. The diameter of the penetrating portion 57 is R1 (hereinafter, the diameter of the penetrating portion 57 is referred to as “diameter R1”). The diameter R1 of the penetrating portion 57 is substantially equal to the diameter R2 of the through hole 52 .

A wiring connection portion 56 is provided on an upper end portion of the penetrating portion 57 . The wiring connection portion 56 protruding from the upper surface 51 a of the base member 51 is wider than the diameter R1 of the penetrating portion 57 . In other words, the width W1 of the wiring connection portion 56 is larger than the diameter R1 of the penetrating portion 57 ( W1 > R1 ). The wiring connection portion 56 is integrated with the penetrating portion 57 . Also, the wiring connection portion 56 is connected to a wiring 68 having an external connection terminal 69 .

A connection pad 59 is formed on the lower end portion of the penetrating portion 57 . The connection pad 59 protruding from the lower surface 51 b of the base member 51 is wider than the diameter R1 of the penetrating portion 57 . In other words, the width W2 of the connection pad 59 is greater than the diameter R1 of the through portion 57 (W2>R1). A connection portion 59 is provided for mounting MEMS and semiconductor devices. The conductive metal unifies the penetration portion 57 , the wiring connection portion 56 , and the connection pad 59 .

Therefore, the wiring connection portion 56 wider than the penetration portion 57 and protruding from the surface 51a of the base member 51 is arranged on one end of the penetration portion 57 and wider than the diameter R1 of the penetration portion 57 and extends from the base member 51. The connecting pads 59 protruding from the surface 51b are arranged on the other end of the penetrating portion 57, thereby forming an insulating layer 53 that prevents water from penetrating into a gap between the base member 51 facing the penetrating portion 57 and the penetrating portion 57. , thus preventing degradation of the penetrating passage 55 (particularly the penetrating portion 57).

The conductive core member 58 is an electrically conductive linear material. The conductive core member 58 is supported substantially coincident with the central axis D of the through hole 52 by the diffusion protection layer 61 which is a conductive member. For example, a gold wire formed by a wire bonding method may be used as the conductive core member 58 . When gold wire is used as the conductive core member 58, the diameter of the gold wire is, for example, 20-30 microns (preferably 25 microns). The wire bonding method can be applied, for example, to the case where the diameter R2 of the through hole 52 is greater than 80 microns, and the depth of the through hole 52 is 100-200 microns. It should be noted that the shape of the through hole 52 to which the wire bonding method can be applied depends on the shape of the capillary tip of the wire bonder.

The length L2 of the conductive core part 58 should be shorter than the length L1 of the through channel 55 (L2<L1). Therefore, when the wiring 68 is arranged on the wiring connection portion 56, by setting the length L2 of the conductive core member 58 to be shorter than the length L1 of the penetrating via 55, it is possible to connect the wiring 68 to the wiring connection portion 56 without interfered by the conductive core member 58 . It should be noted that the length L1 of the penetrating via 55 is the length from the end of the wiring connection portion 56 connected to the wiring 68 to the end of the connection pad 59 connected to the diffusion protection layer 61 .

Moreover, the length L2 of the conductive core part 58 can be greater than the length L3 of the through part 57, and the length L2 of the conductive core part 58 can be less than the length L1 of the through passage 55 (L3<L2<R1), and the conductive core part 58 can be arranged as through the through portion 57 . Therefore, when the through passage 55 is formed, the conductive core part 58 passing through the through part 57 is formed to serve as an electrode, and the conductive metal grows from the conductive core part 58 to the surface of the base part 51 having the through hole 52, thereby preventing Holes remain in the through channel 55 (in particular in the through portion 57).

The diffusion protection layer 61 is a conductive member formed on the end of the connection pad 59 . Diffusion protection layer 61 is provided to improve solder wettability and prevent Cu contained in through channel 55 from diffusing into solder (not shown) connected to connection pad 59 . The conductive core component 58 is connected to the diffusion protection layer 61 . Accordingly, the conductive core feature 58 is connected to the diffusion protection layer 61 so as to support the conductive core feature 58 remaining substantially coincident with the central axis D of the via 52 . Furthermore, the diffusion protection layer 61 is used as a conductive member so that the through via 55 can be connected to semiconductors and other substrates via the diffusion protection layer 61 . For example, an Au/Ni/Au layer composed of the Au layer 62 , the Ni layer 63 , and the Au layer 64 can be used as the diffusion protection layer 61 . The Au layer 64 is the layer used to connect the conductive core member 58 . When gold wire is used as the conductive core member 58, Au layer 64 is formed on a portion to be connected to the conductive core member 58 in order to obtain sufficient bonding strength between the diffusion protection layer 61 and the gold wire. It should be noted that the thickness of the Au layers 62 and 64 is, for example, 0.2-0.5 micrometers, while the thickness of the Ni layer 63 is, for example, 2-5 micrometers. Also, other than the Au/Ni/Au layer, for example, a Pd/Ni/Pd layer and an Au/Pd/Ni/Pd/Au layer may also be used as the diffusion protection layer 61 .

An insulating layer 65 is formed on the upper surface 51 a of the base member 51 so as to expose the wiring connection portion 56 . For example, a resin containing diffused metal particles and a resin containing diffused metal compound particles may be used as the insulating layer 65 . In this case, for example, epoxy resin and polyimide resin can be used as the resin. Palladium and platinum, for example, can be used as metals for electroplating catalysts. Palladium is particularly preferred. Also, palladium chloride and palladium sulfide, for example, can be used as this metal compound. It should be noted that, in the present invention, epoxy resin containing diffused palladium particles is used as the insulating layer 65 . Utilizing epoxy resin containing diffused palladium particles as the insulating layer 65, when an electroless plating layer (seed layer 66 to be described below) is formed, it is not necessary to perform desmear treatment and activation treatment of palladium in advance, and it is possible to perform An electroless plating layer (seed layer 66 described below) is formed directly on the insulating layer 65 (see FIG. 19). Therefore, the manufacturing steps of the substrate 50 can be simplified. The thickness M2 of the insulating layer 65 is, for example, 5 micrometers.

A wiring 68 is formed on the insulating layer 65 so as to be connected to the wiring connection portion 56 . A wiring 68 having an external connection terminal 69 is composed of a conductive metal portion 67 and a seed layer 66 . External connection terminals 69 are provided for connection to a substrate such as a motherboard. Therefore, by providing the external connection terminal 69 on the wiring 68, the external connection terminal 69 can be arranged corresponding to the external connection terminal arranged on a substrate such as a motherboard. For example, Cu may be used as the conductive metal portion 67 . When Cu is used as the conductive metal portion 67, the thickness M3 of the conductive metal portion 67 is, for example, 3-10 micrometers. For example, a Ni layer may be used as the seed layer 66 . The thickness of the seed layer 66 is, for example, about 0.1 microns.

A solder resist layer 75 exposing the external connection terminal 69 is formed to cover the wiring 68 and the insulating layer 65 except for the external connection terminal 69 . This solder resist layer 75 has a window portion 76 exposing the external connection terminal 69 . A solder resist layer 75 is provided to protect the wiring 68 .

The diffusion protection layer 71 is formed on the external connection terminal 69 . The diffusion protection layer 71 is provided to improve the wettability of the solder and prevent Cu contained in the wiring 68 from diffusing into the solder (not shown) connected to the external connection terminal 69 . Diffusion protection layer 71 may consist of, for example, a laminate including Ni layer 72 and Au layer 73 . The thickness of the Ni layer 72 is, for example, 2-5 micrometers, and the thickness of the Au layer 73 is, for example, 0.2-0.5 micrometers.

It should be noted that a Ni/Pd layer and a Ni/Pd/Au layer (the Ni layer is the side to be connected to the external connection terminal) may be used as the diffusion protection layer 71 .

FIG. 4 is a plan view of a base member 51 used to manufacture the substrate according to the present embodiment. It should be noted that "A" shown in FIG. 4 shows a region where the substrate 50 is formed (hereinafter "A" is referred to as "substrate formation region A"). As shown in FIG. 4 , in the present embodiment, when the substrate 50 is formed, a columnar silicon member having a plurality of substrate formation regions A is used as the base member 51 . Therefore, a silicon member having a substrate forming region A is used, a substrate 50 according to a manufacturing method described below is manufactured, and a base member 51 is cut to provide a plurality of substrates 50 at the same time; therefore, the substrate 50 can be improved. manufacturing yield.

Next, a method for manufacturing the substrate 50 according to the first embodiment will be described with reference to FIGS. 5-32. It should be noted that a silicon member shown in FIG. 4 was used as the base member 51 .

First, as shown in FIG. 5 , the adhesive tape 92 is fixed on the support plate 91 . The support plate 91 is provided to support the base member 51 so as to prevent the base member 51 from bending. For example, glass parts and silicon parts (more specifically, silicon wafers) can be used as the support plate 91 . When a silicon member is used as the support plate 91, the thickness M4 of the support plate is, for example, 725 μm. An adhesive tape 92 is provided to bond a metal foil 93 described below to the support plate 91 . For example, a thermal release tape that loses its adhesiveness when heated may be used as the adhesive tape 92 . A thermal ablative may be used in place of the adhesive tape 92 .

Next, as shown in FIG. 6 , metal foil 93 such as Cu is bonded on support plate 91 via adhesive tape 92 . Then, as shown in FIG. 7 , a dry film resist layer 94 having a window portion 95 is formed on the metal foil 93 . The area where the diffusion protection layer 61 is formed on the metal foil 93 is exposed from the window portion of the dry film resist layer 94 .

Next, as shown in FIG. 8, using the metal foil as an electrode, an Au layer 62, a Ni layer 63, and an Au layer 64 are sequentially formed on the metal foil 93 exposed from the window portion 95, so as to form a diffusion protection layer according to the electrolytic plating method. 61. The thickness of the Au layers 62 and 64 is, for example, 0.2-0.5 micrometers, while the thickness of the Ni layer 63 is, for example, 2-5 micrometers. Therefore, with the electrolytic plating method, it is possible to form a diffusion protection layer superior to a layer formed with the electroless plating method. Then, as shown in FIG. 9, the dry film resist layer 94 is removed with a resist stripper.

Next, as shown in FIG. 10 , a resist layer 96 not in an exposed state is formed so as to cover the diffusion protection layer 61 and the metal foil 93 . The resist layer 96 contains a resist material having adhesiveness, and for example, a photosensitive dry film resist and a liquid resist can be used as the resist layer 96 .

With the resist layer 96 having adhesiveness, the base member 51 in which the through hole 52 is formed can be fixed on the support plate 91 via the resist layer 96 (as shown in FIG. 11 ). It should be noted that the thickness of the resist layer 96 is, for example, 10-15 microns. Also, epoxy resin adhesive and polyimide adhesive may be used instead of resist layer 96 as long as these adhesives can be dissolved by some processing liquid.

Next, as shown in FIG. 11 , a through hole 52 having an aperture R2 is formed in the base member 51, and an insulating layer 53 is formed so as to cover the surface of the base member 51 (including a part of the base member 51 corresponding to the through hole 52), The base member 51 is placed on an adhesive resist layer 96 and is fixed to the support plate 91 via the resist layer 96 . For example, the through hole 52 can be formed by one of drilling processing, laser processing, and anisotropic etching. The diameter R2 of the through hole 52 is, for example, greater than 80 micrometers.

For example, an oxide layer (silicon dioxide) formed by a CVD method and a thermal oxide layer (silicon dioxide) formed by an oxidation furnace can be used as the insulating layer 53 . The thickness M1 of the base member 51 is, for example, 150 micrometers.

Next, as shown in FIG. 12 , by supplying a developer into the inside of the through hole 52 , the resist layer 96 exposed to the through hole 52 is dissolved so that a space 97 is formed. The space 97 is wider than the diameter of the through hole 52; the width W4 of the space 97 is thus larger than the diameter R2 of the through hole 52 (W4>R2). The width W4 of the space 97 is substantially equal to the width W2 of the connection pad 59 . Also, the diffusion protection layer 61 is exposed from the space 97 .

As a method for feeding the developing solution into the through hole 52, for example, immersion development in which the structure shown in FIG. 12 is immersed in the developing solution and spray development in which the The developer solution is sprayed onto the through holes 52 like a shower. Regardless of the developing method, the wetting time of the developer is controlled so that the space 97 is formed. As conditions for forming the space 97 by spray development, for example, the spray pressure is 2.0 kgf per square centimeter, the temperature is 25-30° C., and the spray time is 6 minutes (when the thickness of the resist layer 96 is 10-15 micrometers).

Then, heat treatment is performed on the structure shown in FIG. 12, and a polymerization reaction is performed on the resist layer 96 that is not in an exposed state to harden the resist layer 96 (first resist layer hardening step). Accordingly, the resist layer 96 is hardened so as to be resistant to the plating solution.

Next, as shown in FIG. 13 , a dry film resist layer 101 having a window portion 102 exposing the through hole 52 is formed on the insulating layer 53 provided on the upper surface 51 a of the base member 51 . The aperture W5 of the window portion 102 is larger than the aperture R2 of the through hole 52 ( W5 > R2 ). The aperture W5 of the window portion 102 is substantially equal to the width W1 of the wiring connection portion 56 . Then, as shown in FIG. 14, according to the wire bonding method, a gold wire serving as the conductive core member 58 is connected to the Au layer 64 so as to be located substantially at the central axis D of the via hole 52 (conductive core member placement step).

Figure 33 shows the growth process of conductive metal. It should be noted that the Y←→Y direction is the longitudinal direction of the conductive core member 58 and the X←→X direction is the horizontal direction perpendicular to the Y←→Y direction. The F←→F direction is a direction along which the conductive metal grows (hereinafter, the F←→F direction is referred to as “direction F”). Next, as shown in FIG. 15, a current is passed through the metal foil 93, and using the conductive core member 58 as an electrode, according to the electrolytic plating method, the conductive metal 104 is isolated and grown so as to fill the space 97, the through hole 52, and the window portion 102. (conductive metal filling step). In this case, as shown in FIG. 33, in the through hole 52, the conductive metal grows toward the surface 51c of the base member 51 from the conductive core part 58 corresponding to the through hole 52; In part 57 (equivalent to conventional cylindrical through channel 15). For example a Ni-Co alloy may be used as the conductive metal 104 . The composition of the Ni—Co alloy is, for example, Ni:Co=6:4˜7:3.

Also, as described in the present embodiment, using gold wires as electrodes, a Ni-Co alloy is segregated and grown so as to fill the space 97 , the through hole 52 , and the window portion 102 , thereby forming the through channel 55 . Thus, the through-channel 55 is formed in a shorter time than forming the through-channel 55 by filling the space 97 , the through hole 52 , and the window portion 102 with Cu. Thus, the manufacturing yield of the substrate 50 can be improved.

Moreover, the conductive metal 104 may also be formed by the following steps: In the conductive metal filling step, Ni is electrolytically plated on the surface of the conductive core member 58 so as to cover the surface of the conductive core member 58 and the surface of the diffusion protection layer 61 , and then, Cu is isolated so as to fill the space 97 , the via hole 52 , and the window portion 102 .

Next, as shown in FIG. 16 , the conductive metal 104 protruding from the dry film resist layer 101 is removed by grinding so that the conductive metal 104 is coplanar with the dry film resist layer 101 . The following components are then formed: a connection pad 59 (first protrusion) with a width of W2 in the space 97, a penetration portion 57 with a diameter of R1 in the through hole 52, and a wiring connection portion 56 with a width of W1 in the window portion 102 ( second protrusion); thus forming a through channel 55 containing the conductive core member 58 therein. It should be noted that the width W1 of the wiring connection portion 56 and the width W2 of the connection pad 59 are greater than the diameter R1 of the through portion 57 (W1>R1, W2>R1).

Therefore, the connection pad 59 and the wiring connection portion 56 wider than the diameter R1 of the penetration portion 57 are connected to the penetration portion 57, thereby preventing water from penetrating into the gap between the base member 51 facing the penetration portion 57 and the penetration portion 57. ; Thus preventing the degradation of the through channel 55 .

Next, as shown in FIG. 17, the dry film resist layer 101 is removed by a resist stripper. Then, as shown in FIG. 18 , an insulating layer 65 having a window portion 103 exposing the wiring connection portion 56 is formed on the upper surface 51 a of the base member 51 . For example, a resin material containing palladium may be used as the insulating layer 65 . The thickness M2 of the insulating layer 65 is, for example, 5 micrometers.

Next, as shown in FIG. 19 , according to the electroless plating method, a seed layer 66 is formed on the upper surface 65 a of the insulating layer 65 and on the lateral sides 65 b of the insulating layer 65 . Actually, when forming a seed layer on a resin layer according to the electroless plating method, desmear treatment is generally performed on the surface of the resin (insulation layer) in advance to roughen the surface, and palladium activation treatment is then performed on the resin surface. In this palladium activation treatment, the sample to be plated is immersed in one of the catalytic treatment solution and the accelerated treatment solution, and the palladium to be the core of the electroless plating is separated on the surface of the resin. In this conventional technique, until palladium activation treatment is performed, it is impossible to form a plated layer by an electroless plating method. Therefore, in the conventional technique, the manufacturing steps are very troublesome. In contrast, in the present embodiment, epoxy resin material is applied to the insulating layer 65; thus, it is not necessary to perform desmear treatment and palladium activation treatment on the insulating layer 65 in advance, so that the lead wire can be directly formed on the insulating layer 65 by an electroless plating method. crystal layer 66. Thus, the manufacturing steps of the substrate 50 can be simplified. For example, a Ni layer may be used as the seed layer 66 . Also, when a resin containing palladium is used as the insulating layer 65 as described in the present embodiment, a Ni—B layer can be formed.

Next, as shown in FIG. 20 , a dry film resist layer 105 having a window portion 106 is formed on the seed layer 66 . The window portion 106 corresponds to a region where the wiring 68 is formed. The thickness of the dry film resist layer 105 is, for example, 10-15 microns. Then, as shown in FIG. 21, the wiring connection portion 56 and the seed layer 66 are used as electrodes, and according to the electrolytic plating method, a conductive metal portion 67 is formed so as to fill the window portions 103 and 106. The conductive metal portion 67 and the through-via 55 are thus electrically connected. For example, Cu may be used for the conductive metal portion 67 . After the conductive metal portion 67 is formed, the dry film resist layer 105 is removed with a resist stripper.

Next, as shown in FIG. 22, a dry film resist layer 108 is formed on the structure shown in FIG. 21 so as to expose the conductive metal portion 67 corresponding to the region B in which the external connection terminal is formed. The dry film resist layer 108 has a window portion 109 exposing the conductive metal portion 67 corresponding to the region B. Referring to FIG.

Next, as shown in FIG. 23, the conductive metal portion 67 is used as an electrode. According to the electrolytic plating method, Ni layer 72 and Au layer 73 are sequentially isolated and grown on conductive metal portion 67 exposed from window portion 109 so as to form diffusion protection layer 71 . The thickness of the Ni layer 72 is, for example, 2-5 micrometers, and the thickness of the Au layer 73 is, for example, 0.2-0.5 micrometers. Thus, with the electrolytic plating method, the diffusion protection layer 71 is formed; thus, it is possible to form a diffusion protection layer having a layer superior to that formed with the electroless plating method. After the second diffusion protection layer 71 is formed, the dry film resist layer 108 is removed.

Next, as shown in FIG. 24 , a dry film resist layer 111 is formed so as to cover the conductive metal portion 67 and the diffusion protection layer 71 . Then, as shown in FIG. 25, the exposed seed layer 66 on the insulating layer 65 is removed by etching. Thus, a wiring 68 having an external connection terminal 69, which is composed of the seed layer 66 and the conductive metal portion 67, is formed. As shown in FIG. 26, the dry film resist layer 111 is removed with a resist stripper.

Next, as shown in FIG. 27 , the anti-thermal tape 114 is fixed so as to cover the upper surface 65 a of the insulating layer 65 , the wiring 68 , and the diffusion protection layer 71 . Anti-tropical 114 is resistant to corrosive agents. The anti-heat belt 114 is then provided to cover the upper surface 65a of the insulating layer 65, the wiring 68, and the diffusion protection layer 71, thereby protecting the wiring 68 and the diffusion protection layer 71 in the heat treatment performed when the support plate 91 is removed from the base member 51. (See Figure 28). Furthermore, when the metal foil 93 is removed by etching, the wiring 68 is prevented from being corroded (see FIG. 29). For example flame retardant PET and PEN can be used as heat resistant 114 . It should be noted that the anti-thermal tape 114 is only provided to cover at least the wiring 68 and the diffusion protection layer 71 .

Next, as shown in FIG. 28, the adhesive tape 92 and the support plate 91 are removed from the base member 51 by heating the structure shown in FIG. 27 (heat treatment). In this case, a thermal release tape that loses adhesiveness when heated is used as the adhesive tape 92 . Furthermore, for example, as the conditions of the heat treatment, the heating temperature is 150° C. and the heating time is 30 minutes. Then, as shown in Fig. 29, the metal foil 93 is removed by etching. The resist layer 94 and the diffusion protection layer 61 are thus exposed. Also, as described above, the wiring 68 is covered with the anti-corrosion tape 114 that is resistant to corrosion agents, so that the wiring 68 is not corroded when the metal foil 93 is removed.

Next, as shown in FIG. 30, the resist layer 94 is removed. Then, as shown in Fig. 31, the anti-tropic zone 114 is removed. After removing the resist layer 94 and the anti-hot zone 114, as shown in FIG. The solder resist layer 75 has a window portion 76 exposing the diffusion protection layer 71 . After forming the solder resist layer 75, dicing is performed at the scribe line (the boundary between the respective substrate formation regions A shown in FIG. 50.

As described above, using the conductive core member 58 as an electrode, the conductive metal 104 grows from the conductive core member 58 toward the surface 51 c of the base member 51 having the through hole 52 to become the through-channel 55 . Voids are thereby prevented from remaining in the through-via 55 ; thus, the electrical connection reliability between the wiring 68 and the through-via 55 can be improved. Also, the wiring connection portion 56 wider than the diameter R1 of the penetration portion is connected to one end of the penetration portion 57, and the connection pad 59 wider than the diameter R1 of the penetration portion 57 is connected to the other end of the penetration portion 57, thereby preventing penetration of water into the gap between the base member 51 facing the through portion 57 and the through portion 57; Also, the wiring 68 is connected to the wiring connection portion 56 wider than the diameter R1 of the penetrating portion 57 ; the wiring 68 is then easily connected to the wiring connection portion 56 .

(second embodiment)

Next, a substrate 120 according to a second embodiment of the present invention will be described with reference to FIG. 34 . Fig. 34 is a sectional view showing a substrate 120 according to a second embodiment of the present invention. It should be noted that "G" shown in FIG. 34 is the central axis of the through hole 122 (hereinafter, the central axis is referred to as "central axis G").

Substrate 120 includes base member 51 , insulating layer 53 , diffusion protection layers 61 and 71 , through via 125 , wiring 127 , and solder resist layer 131 . The base member 51 has a plurality of through holes 122 . Also, an insulating layer 53 is formed on the surface of the base member 51 including the through hole 122 . The through channel 125 arranged in the through hole 122 is composed of the conductive metal part 124 and the conductive core part 123 . The shape of the through passage 125 is cylindrical. The conductive core part 123 is arranged at a position substantially coincident with the center axis G of the through hole 122 by means of the diffusion protection layer 61 . The length L4 of the conductive core part 123 is substantially equal to the depth N of the via hole 122 .

The length L4 of the conductive core part is thus set to be substantially equal to the depth N of the through hole 122; grow so as to fill the through hole 122 , thereby preventing voids from remaining in the through channel 125 . The electrical connection reliability between the wiring 127 and the through-via 125 can thus be improved.

Gold wires, for example formed by wire bonding, can be used as the conductive core component. When gold wire is used as the conductive core part 123, the thickness of the gold wire may be, for example, 20-30 microns (preferably 25 microns).

The conductive metal portion 124 is provided to fill the via hole 122 in which the conductive core part 123 is seated. For example, a Ni—Co alloy may be used as the conductive metal portion 124 . The composition of the Ni—Co alloy is, for example, Ni:Co=6:4˜7:3.

A diffusion protection layer 61 is provided on the lower end of the through channel 125 . Diffusion protection layer 61 is composed of Au layer 62 , Ni layer 63 , and Au layer 64 . The conductive metal part 124 and the conductive core part 123 are connected to the Au layer 64 .

The wiring 127 is provided on the surface 51 a of the base member 51 in which the insulating layer 53 is formed. A wiring 127 having an external connection terminal 128 is connected to an upper end of the penetrating channel 125 . The diffusion protection layer 71 is formed on the external connection terminal 128 . Diffusion protection layer 71 is composed of Ni layer 72 and Au layer 73 . The solder resist layer 131 is formed to expose the diffusion protection layer 71 and cover the upper surface 51 a of the base member 51 on which the insulating layer 53 is formed and the wiring 127 . The solder resist layer 131 has a window portion 132 exposing the external connection terminal 128 .

As described above, in the case where the conductive core part 123 is disposed in the columnar through-channel 125, the conductive metal is segregated, and the conductive metal part 124 grows from the conductive core part 123 to the surface of the base part 51 including the through hole 122; Thus, voids are prevented from remaining in the through-via 125 , so that electrical connection reliability between the wiring 127 and the through-via 125 can be improved.

Also, the present invention is not limited to these embodiments, and various changes and modifications can be made without departing from the scope of the present invention.

The present invention can be applied to a substrate in which voids are prevented from remaining in the through via, thereby preventing degradation of the through via, and thus can improve electrical connection reliability of the through via connected to wiring; and can also be applied to a manufacturing method thereof.

According to at least one embodiment of the present invention, the conductive core feature is supported by the diffusion protection layer so as to set the conductive core feature substantially at the central axis of the via.

Also, the length of the conductive core part is substantially equal to the depth of the through hole, and the through hole is filled with conductive metal so as to prevent voids (cavities) from remaining in the through via.

The substrate includes external connection terminals connected to ends of the through vias.

The wiring is connected to the through-via, wherein the void is prevented from remaining inside the through-via, so that electrical connection reliability between the wiring and the through-via can be improved.

Furthermore, the length of the conductive core part is smaller than the length of the through-channel; wiring is then easily connected to the through-channel without being hindered by the conductive core part.

Furthermore, a conductive part is provided to support the conductive core part so as to set the conductive core part substantially at the central axis of the through hole.

Furthermore, the diffusion protection layer is used as a conductive member, so that semiconductor devices and other substrates can be connected to the through vias through the diffusion protection layer.

According to another aspect of the embodiment of the present invention, the second protrusion is connected to a wiring having an external connection terminal.

According to the above aspects of the embodiments, the wiring is connected to the through-via, wherein the void is prevented from remaining in the through-via, and thus the electrical connection reliability between the wiring and the through-via can be improved.

Claims (10)

1. A substrate characterized in that it comprises: a base member having a through hole; and filling the via hole to form a conductive metal through the via; Wherein, the through channel includes a conductive core part therein, and the conductive core part is arranged substantially at the central axis of the through hole. 2. The substrate of claim 1, further comprising a diffusion protection layer formed on an end of the through channel. 3. The substrate of claim 1, wherein the length of the conductive core feature is substantially equal to the depth of the via. 4. The substrate of claim 1, further comprising a wiring having an external connection terminal connected to an end of the through via. 5. A substrate characterized in that it comprises: a base member having a through hole; and filling the via hole to form a conductive metal through the via; Wherein, the through channel includes providing a through portion in the through hole; and a protrusion protruding from the base member, the protrusion being connected to each end of the through portion, Wherein, the penetrating portion includes a conductive core part therein, and the conductive core part is substantially arranged at the central axis of the through hole. 6. The substrate of claim 5, wherein the length of the conductive core member is less than the length of the through via. 7. The substrate of claim 5, wherein the protrusion comprises a first protrusion and a second protrusion, Wherein a conductive part is provided at the end of the first protrusion, the conductive part being connected to the conductive core part. 8. The substrate of claim 7, wherein a diffusion protection layer is used as the conductive member. 9. The substrate of claim 7, wherein the second protrusion is connected to a wiring having an external connection terminal. 10. A method of manufacturing a substrate comprising a base member having a through-hole; a conductive metal filled in said through-hole; and a through-via comprising a conductive core member therein, The method is characterized in comprising the following steps: disposing the conductive core component substantially at the central axis of the through hole; and According to an electrolytic plating method, the through hole is filled with the conductive metal using the conductive core member as an electrode.

Images