CN1728353A - Method of manufacturing circuit device - Google Patents

Abstract

A method for manufacturing a circuit device with high reliability, which realizes miniaturization, thinning and light weight of the circuit device. In the method of manufacturing a circuit device according to the present invention, after forming a resin sealing body (31) constituting the circuit device on the upper surface of a supporting substrate (11), the resin sealing body (31) is separated from the supporting substrate (11). Accordingly, a circuit arrangement without a substrate can be produced. Thereby, reduction in thickness, miniaturization, weight reduction, and improvement in heat dissipation of the circuit device can be achieved. In addition, since the sealing resin (28) can be used for sealing on the supporting substrate (11), thermal expansion of the sealing resin (28) and the conductive pattern (20), and the sealing resin (28) and the circuit element (25) can be prevented. The deflection caused by the difference in coefficients. Therefore, since peeling of the conductive pattern (20) or poor connection between the conductive pattern (20) and the thin metal wire (27) can be suppressed, a highly reliable circuit device (10A) can be manufactured.

Description

Method for manufacturing a circuit device

technical field

The present invention relates to a method for manufacturing a circuit device, and more particularly to a method for manufacturing a circuit device that realizes a thin circuit device.

Background technique

Along with miniaturization and higher functionality of electronic equipment, miniaturization and higher density are also required in circuit devices used therein. An example of a conventional method of manufacturing a circuit device will be described with reference to FIG. 9 (see Patent Document 1).

First, referring to FIG. 9(A), a contact hole 103 is formed on a substrate 101 made of an insulating material such as resin by using a laser or the like. Then, plating films 102 are formed on both surfaces of the substrate 101 including the inside of the contact hole 103 .

Next, referring to FIG. 9(B), by etching the plating film 102, a first conductive pattern 102A is formed on the surface of the substrate 101, and a second conductive pattern 102B is formed on the back surface.

Referring to FIG. 9(C), the semiconductor element 104 is placed on the first conductive pattern 102A, and the first conductive pattern 102A and the semiconductor element 104 are electrically connected by thin metal wires 105 . Then, it is sealed with a sealing resin 107 so as to cover the semiconductor element 104, the thin metal wires 105, and the first conductive pattern 102A. Finally, the second conductive pattern 102B is covered with a solder resist 109, and external electrodes 108 are formed at predetermined positions. In this way, the circuit device 100 is manufactured.

Patent Document 1: JP-A-2002-26198

However, in the above-mentioned method of manufacturing a circuit device, a glass epoxy substrate is used on the substrate 101 to support wiring during the manufacturing process. Therefore, an increase in manufacturing cost, or the thickness of the substrate 101 restricts the miniaturization, thinning, and weight reduction of the circuit device. Also, it has been pointed out that the use of a glass epoxy substrate causes deterioration of heat dissipation.

When the sealing resin 107 is cured, deflection occurs due to differences in coefficients of thermal expansion between the substrate 101 and the sealing resin 107 and between the semiconductor element 104 and the sealing resin 107 . As a result, there are problems such as peeling of the conductive pattern 102 from the substrate 101 or poor connection between the first conductive pattern 102B and the thin metal wire 105 .

When a glass-epoxy resin substrate is used for the substrate 101, it is necessary to form a contact hole 103 for electrically connecting electrodes on both surfaces, and there is a problem that the manufacturing process is long.

In addition, when forming a conductive pattern through which a large current flows, the electric capacity is ensured by increasing the area of the conductive pattern. Therefore, it is difficult to miniaturize the circuit device.

Contents of the invention

The present invention was made in view of the above problems. A main object of the present invention is to provide a method for manufacturing a highly reliable circuit device, which realizes miniaturization, thinning, and weight reduction of the circuit device.

The present invention provides a method for manufacturing a circuit device, which includes: forming a wiring layer composed of a first conductive pattern and a second conductive pattern formed thicker than the first conductive pattern on the surface of a supporting substrate; A step of electrically connecting the wiring layer and the circuit element; a step of sealing the upper surface of the supporting substrate with a sealing resin so as to cover the circuit element; separating the wiring layer and the sealing resin from the supporting substrate process on the back. Therefore, since a circuit device without a substrate can be manufactured, it is possible to reduce the manufacturing cost, or to reduce the thickness and weight of the circuit device, and to improve heat dissipation. In addition, since conductive patterns having different thicknesses can be formed in the same circuit device, the circuit device can be miniaturized by separately forming conductive patterns corresponding to required current amounts.

The present invention provides a method of manufacturing a circuit device, comprising: forming a corresponding wiring layer having a protrusion protruding in the thickness direction on the surface of a supporting substrate; and laminating the first wiring layer with a conductive film through an insulating layer. The process above; the process of forming the connection portion that makes the protrusion and the conductive film conductive; the process of forming the second wiring layer by patterning the conductive film; electrically connecting the second wiring layer and the circuit element the step of sealing the upper surface of the support substrate with a sealing resin so as to cover the circuit elements; the step of separating the first wiring layer, the insulating layer, and the back surface of the sealing resin from the support substrate . Therefore, in addition to the above-mentioned effects, multilayer wiring can be performed, and the density of the circuit device can be increased.

According to the method of manufacturing a circuit device of the present invention, a circuit device without a substrate can be manufactured. Therefore, reduction in thickness and weight and improvement in heat dissipation of the circuit device can be achieved.

According to the method of manufacturing a circuit device of the present invention, since the sealing resin can be used to seal the support substrate, warpage due to differences in thermal expansion coefficients between the sealing resin and the conductive foil, and between the sealing resin and the circuit element can be prevented. Therefore, since peeling of the conductive pattern or poor connection between the conductive pattern and the thin metal wire can be suppressed, a highly reliable circuit device can be manufactured.

According to the manufacturing method of the circuit device of the present invention, since the formation of necessary contact holes on the glass epoxy resin substrate can be omitted, the manufacturing process can be greatly reduced.

According to the method of manufacturing a circuit device of the present invention, since the conductive pattern through which a large current flows can be formed thick, the circuit device can be miniaturized.

According to the manufacturing method of the circuit device of the present invention, the through hole can be provided in the insulating layer formed thinly by embedding the protrusion. Therefore, via holes can be easily formed on the insulating layer. In addition, since the through hole can be formed shallowly, a plated film can be easily formed on the through hole. Also, even when a plurality of wiring layers are laminated via an insulating layer mixed with a filler, the insulating layer can be penetrated to form a connection portion that conducts the wiring layers to each other.

Description of drawings

Fig. 1 (A) ~ Fig. 1 (C) are the sectional views illustrating the manufacturing method of circuit device of the present invention;

Fig. 2 (A)～Fig. 2 (C) are the sectional views illustrating the manufacturing method of circuit device of the present invention;

Fig. 3 (A)～Fig. 3 (C) are the sectional views illustrating the manufacturing method of the circuit device of the present invention;

Fig. 4 (A)～Fig. 4 (C) are the sectional views illustrating the manufacturing method of the circuit device of the present invention;

5(A) to 5(C) are cross-sectional views illustrating a method for manufacturing a circuit device of the present invention;

Fig. 6 (A)～Fig. 6 (C) are the sectional views illustrating the manufacturing method of the circuit device of the present invention;

7(A) to 7(C) are cross-sectional views illustrating a method for manufacturing a circuit device of the present invention;

8(A) to 8(B) are cross-sectional views illustrating a method of manufacturing a circuit device of the present invention; and

9(A) to (C) are cross-sectional views illustrating a conventional method of manufacturing a circuit device.

Detailed ways

first embodiment

A method of manufacturing the circuit device according to the first embodiment will be described with reference to FIGS. 1 and 2 .

First, referring to FIG. 1(A), conductive foil 13 is pasted on support substrate 11 via adhesive 12 . The material of the conductive foil 13 is selected in consideration of solder adhesion, bonding, and plating properties. As a specific material, a conductive foil made of Cu as a main raw material, a conductive foil made of Al as a main raw material, or a conductive foil made of an alloy such as Fe—Ni, or the like is used. In addition, other conductive materials are also possible, and etchable conductive materials are particularly preferred. The thickness of the conductive foil 13 is about 10 μm to 300 μm. However, a conductive foil of 10 μm or less or 300 μm or more may be used.

As the adhesive 12, a thermoplastic resin, a UV sheet (substance that loses adhesiveness by irradiating ultraviolet rays), or the like is used. In addition, the adhesive agent 12 may be any material as long as it can be dissolved in a solvent, become liquid by heating, and can reduce the adhesiveness by ultraviolet irradiation.

The support substrate 11 is made of metal such as Cu or Al, or a material such as resin, and has such strength and thickness that it can support the conductive foil 13 flatly. In addition, when a UV sheet is used as the adhesive 12, it is preferable to use a transparent substrate such as glass or plastic.

Referring to FIG. 1(B), a resist 14 is patterned on the conductive foil 13 . Then, using the resist 14 as a mask, wet etching is performed to etch the main surface on which the resist 14 is not formed. By performing this etching, two kinds of protrusions 18 and a thin conductive foil are formed. After this etching is completed, the resist 14 is removed.

Referring to FIG. 1(C), by etching the conductive foil 13, conductive patterns 20A, 20B are formed. First, the resist 14 is patterned so as to cover the predetermined area where the conductive pattern is to be formed. At this time, the resist 14 is patterned so as to cover a thicker formed region wider than the convex portion 18 . This is because the conductive foil 13 needs to be patterned by one etching, and it is only necessary to etch a thin portion. For example, by performing patterning in consideration of mask errors and forming only a slight edge, the conductive foil 13 can be completely separated. Also, if patterning is performed on a thin part, etching is performed only once. On the contrary, if patterning is performed on the thickness portion of the convex portion 18, the thin conductive film is over-etched to narrow the pattern width.

In this way, by patterning conductive patterns with different thicknesses on the thin conductive foil side at one time, thick and thin patterns can be formed at one time, and patterns such as power patterns and small signal patterns can be formed by etching twice.

In addition, widening the area of the conductive pattern cannot handle large currents, but can be done by increasing the thickness of the conductive pattern, which can reduce the planar size of the circuit device.

Heat dissipation can be improved by arranging circuit elements that generate a large amount of heat on a conductive pattern formed thickly.

Referring to FIG. 2(A), the circuit element 25 is mounted on the conductive pattern 20 to form a resin sealing body 31 sealed by the sealing resin 28 . Here, the first circuit element 25A is placed on the first conductive pattern 20A, and the second circuit element 25B is placed on the second conductive pattern 20B. As shown in the figure, the circuit element 25 is electrically connected to the conductive pattern 20 through the thin metal wire 27 . Of course, it can also be performed by the flip-chip bonding method.

In this embodiment, the first circuit element 25A through which a small current flows and the second circuit element 25B through which a large current flows are placed.

A chip capacitor is exemplified as the first circuit element 25A, but a transistor, an LSI chip, a chip resistor, a cylindrical coil, or the like may also be used.

As the second circuit element 25B, a power transistor through which a large current flows may be used, such as a power metal oxide transistor, GTBT, IGBT, thyristor, and the like. In addition, power ICs can also be used. In recent years, since chips have been reduced in size, thinner, and more functional, a larger amount of heat is generated than before. Therefore, heat dissipation can be improved by also mounting circuit elements that require heat dissipation on the second conductive pattern 20B.

Furthermore, the connection between the circuit element 25 and the conductive pattern is performed with thin metal wires, solder, conductive paste, or the like by front bonding or flip chip bonding. Then, the circuit element 25 is sealed with a sealing resin 28 . Here, resin sealing may be performed by transfer film molding, injection film molding, dipping, or coating. As the resin material, thermosetting resins such as epoxy resins or thermoplastic resins such as polyimide resins can be used.

Here, since the resin sealing body 31 is integrated with the support substrate 11 having a flat surface until the sealing resin 28 is cured, its flatness can be maintained.

Referring to FIG. 2(B), the resin sealing body 31 is separated from the support substrate 11 . Here, when a thermoplastic resin is used as the adhesive 12, it can be separated by heating and melting the thermoplastic resin. In addition, the adhesive 12 may be selectively melted with a chemical such as an organic solvent.

When a UV sheet is used as the adhesive 12, it can be separated by irradiating ultraviolet rays. At this time, by using a material that allows ultraviolet light to pass through, such as glass, as the support substrate 11, rapid and efficient separation can be performed.

After separation from the support substrate 11 , a part of the adhesive 12 may remain on the back surface of the resin sealing body 31 . This will be resolved by melting and removing chemicals such as organic solvents again.

Referring to FIG. 2(C), the resin sealing body 31 is subjected to backside treatment, dicing, and separation, thereby completing the circuit device 10A. Here, the solder resist 29 is patterned on the back surface of the resin sealing body 31 to expose the conductive pattern, and the external electrodes 30 such as solder are formed at the positions. However, it is also possible to make the conductive pattern 20 exposed from the back surface of the resin sealing body 31 function as an external electrode.

With the above structure, thin conductive patterns and thick conductive patterns can be formed, and power/small signal components can be housed in one package. For example, when packaging six power components and a control IC into one as an inverter module, as long as the source/drain of the six power components is electrically connected to a thick conductive pattern, the IC of the control gate or power transistor and the The thin conductive patterns are electrically connected to form a SIP consisting of one package.

second embodiment

A method of manufacturing the circuit device according to the second embodiment will be described with reference to FIGS. 3 to 5 . The basic steps of the manufacturing method of the circuit device of this embodiment are the same as those of the first embodiment. Therefore, a description will be given here centering on the differences.

First, referring to FIG. 3(A), protrusions 18 are formed on first conductive film 33 bonded with adhesive 12 on support substrate 11 . The first conductive film 33 is half-etched using the resist 14 as a mask to form the protruding portion 18 which is a thick portion and a thin portion. After the protrusions 18 are formed, the resist 14 is removed.

Referring to FIG. 3(B), as in the previous embodiment, the thin portion is etched to form a thick conductive pattern and a thin conductive pattern. Here, the resist 14 is patterned so as to cover a region wider than the region of the convex portion 18 . Then, wet etching is performed using the resist 14 as a mask to form the first wiring layer 40 composed of the first conductive pattern 40A and the second conductive pattern 40B formed thicker than the first conductive pattern 40A.

Referring to FIG. 3(C), the second conductive film 34 is laminated on the first wiring layer 40 via the insulating layer 41 . This is constituted by sealing the second conductive film 34 and the first wiring layer 40 provided with an insulating layer 41 such as an adhesive layer on the surface. Alternatively, the second conductive film 34 may be laminated after applying the insulating layer 41 to the first wiring layer.

Here, the convex portion 18 is buried in the insulating layer 41 so as to be sealed. By performing this sealing by vacuum pressure, a void generated by air between the first insulating layer 40 and the insulating layer 41 can be prevented. In addition, the side surfaces of the protrusions 18 formed by isotropic etching are formed into smooth curved surfaces. Therefore, when embedding the first wiring layer 40 in the insulating layer 41, the resin is impregnated along the curved surface to eliminate the unfilled portion. Thus, the generation of voids can be suppressed by the side shape of the convex portion 18 . In addition, the sealing strength between the first wiring layer 40 and the insulating layer 41 can be improved by embedding the convex portion 18 in the insulating layer 41 .

In this embodiment, in order to improve heat dissipation, fillers are mixed into an insulating resin such as epoxy resin as the insulating layer 41 . Here, the filler to be mixed is SiO ₂ , AlO ₃ , SiC, AlN or the like. Of course, a resin that does not mix fillers into the insulating layer 41 may also be used.

4(A) to 4(C) will describe a step of forming a connection portion for conducting the first wiring layer 40 and the second conductive film 34 . First, by using the resist 14 as a mask, a predetermined region where the connection portion 43 is to be formed is etched to form a via hole 42 to expose the surface of the insulating layer 41 . Then, the convex portion 18 is exposed from the lower portion of the via hole 42 by irradiating laser light with the second conductive film 34 as a mask. Then, by forming a plating layer in the through hole 42, the connection portion 43 is formed. By forming the connection portion 43, the first wiring layer 40 and the second conductive film 34 can be electrically connected.

The steps of forming the connecting portion 43 will be described in detail with reference to FIGS. 6 to 9 .

Referring to FIG. 5(A), by patterning the second conductive film 34, a second wiring layer 45 is formed. After the circuit element 25 is electrically connected to the second wiring layer 45 , it is sealed with a sealing resin 28 .

Here, the first wiring layer 40 and the second wiring layer 45 may be formed so as to intersect in planes. Furthermore, the first wiring layer 40 and the second wiring layer 45 are connected at desired positions by the connecting portion 43 . Therefore, even in the case where the circuit element 25 has a plurality of electrodes, the multilayer wiring structure of this embodiment can bridge and lead the wiring freely. Of course, it can also be increased to three layers, four layers, five layers or more according to the number of electrodes of circuit components, the mounting density of components, and the like.

In addition, in this embodiment, the second wiring layer 45 is formed of patterns having the same thickness, but as described with reference to FIG. 1 , wiring layers having patterns having different thicknesses may also be formed. Therefore, by forming the conductive pattern formed thickly, the electric capacity can be ensured, and at the same time, it can function as a heat sink. In addition, the connecting portion 43 may function as a heat passage.

Referring to FIG. 5(B), the resin sealing body 31 is separated from the support substrate 11 . The separation method can be carried out by the method mentioned above. Then, by subjecting the resin sealing body 31 to backside treatment, dicing, and individual separation, the circuit element 10B shown in FIG. 5(C) is completed.

A method of forming the connecting portion 43 will be described with reference to FIGS. 6 to 8 .

In FIG. 6(A), the second conductive film 34 is laminated on the first wiring layer 40 via an insulating layer. Here, in the second conductive film 34 , a predetermined region where the connection portion 43 is to be formed is removed. The surface of the insulating layer 41 is exposed from the lower portion of the through hole 42 . In addition, a filler is mixed in the insulating layer 41 in consideration of heat dissipation. Here, first, FIG. 6(B) and FIG. 6(C) show enlarged views of the connection portion forming region 44 surrounded by dotted lines, and the method of forming the through hole 42 will be described in detail.

Referring to FIG. 6(B), in this form, the thickness of the insulating layer 41 below the via hole 42 is reduced by embedding the convex portion 18 . Then, by removing the insulating layer 41 in a thin region using a laser 39 , the upper surface of the concave portion 18 is exposed at the lower portion of the via hole 42 . In most regions, the thickness T2 of the insulating layer 41 is, for example, about 50 μm. In contrast, the thickness T1 of the insulating layer 41 corresponding to the region below the via hole 42 is as thin as 10 μm to 25 μm, for example.

When the connecting portion 43 is formed by plating in a subsequent step, it is necessary to form the via hole 42 having a low aspect ratio. This is because, when the aspect ratio is high, the fluidity of the plating solution inside the via hole 42 deteriorates or the supply of the plating solution becomes insufficient, making it difficult to form the connection portion 43 .

Here, since it was confirmed that the aspect ratio of the via hole 42 that can form the highly reliable connection portion 43 by plating is 1 or less, the via hole 42 of this embodiment is formed so that the aspect ratio is 1 or less. Here, the aspect ratio is a value represented by L/D when the diameter of the through hole 42 is D and the depth of the through hole 42 is L. FIG.

In addition, when a filler for ensuring heat dissipation is mixed in the insulating layer 41 , it is somewhat difficult to form the via hole 42 with a laser. In such a case, it makes sense to thin the insulating layer 41 forming the via hole 42 .

FIG. 6(C) shows a cross section after forming the via hole 42 by the above method. The upper surface of the protrusion 18 is exposed from the lower side of the through hole 42 . The filler mixed in the insulating layer 41 is exposed from the sidewall of the via hole 42 formed by laser processing. The insulating layer 41 of this embodiment is mixed with a filler having a wide diameter in order to improve heat dissipation. Therefore, the side wall of the through hole 42 is formed in a shape having concavities and convexities. In addition, when a residue remains on the bottom of the through hole 42 due to the above-mentioned laser processing, cleaning for removing the residue is performed.

The plane size of the protrusion 18 is formed larger than the through hole 42 formed thereon. In other words, since the plane shapes of the through hole 42 and the convex portion 18 are, for example, circular, the diameter of the convex portion 18 is formed larger than the diameter of the through hole 42 . As an example, when the diameter W1 of the through hole 42 is about 100 μm, the diameter W2 of the convex portion 18 is formed to be about 150 μm to 200 μm. In addition, when the diameter W1 of the through hole 42 is about 30 μm to 50 μm, the diameter W2 of the convex portion 18 is adjusted to be about 50 μm to 70 μm. Thus, by increasing the plane size of the convex portion 18 to be larger than the through hole 42 , the through hole 42 can be located above the convex portion 18 even when the through hole 42 is formed with a slight error in position. Therefore, it is possible to prevent the decrease in connection reliability caused by the above-mentioned position error. In addition, as the planar shape of the convex portion 18, a shape other than a circle may be employed.

In addition, although not shown in the figure, the through hole 42 can be easily formed by forming the insulating layer 41 from the first resin film and the second resin film. Specifically, the lower layer of the insulating layer 41 is formed using a first resin film. Here, the upper surface of the first resin film and the upper surface of the convex portion 18 are at the same height. Furthermore, a second resin film is formed on the first resin film. Here, the filling rate of the filler is increased in the first resin film to maintain sufficient heat dissipation, and the filling rate of the second resin film is decreased so that the through hole 42 can be easily formed by laser. Thereby, clogging of the through hole 42 due to the residue of the filler inside the through hole or the filler peeled off from the side surface of the through hole 42 can be suppressed. Therefore, a highly reliable connection portion can be formed. In addition, it is also possible to reduce the diameter of the filler mixed into the second resin film. In addition, the filler may not be mixed into the second resin film.

In the above description, the via hole 42 is formed after the insulating layer 41 is covered with the second conductive film 34 , but the via hole 42 may be formed by another method. Specifically, before covering the second conductive film 34, the insulating layer 41 is removed to form the via hole 42, and the upper surface of the protrusion 18 can be exposed from the lower portion of the via hole 42. Here, as a method of removing the resin, YAG laser or wet etching can be used. Furthermore, the connecting portion 43 and the second conductive film 34 may also be formed by performing electroless plating. By performing electrolytic plating using the second conductive film 34 formed by electroless plating as a cathode, a conductive film having a certain thickness can be formed.

Next, a process of forming a plated film in the through hole 42 to form the connecting portion 43 and conducting conduction between the first wiring layer 40 and the second conductive film 34 will be described with reference to FIGS. 7 and 8 . Two methods are considered for the formation of this plated film. The first method is a method of forming a plated film again by electrolytic plating after forming a plated film by electroless plating. The second method is a method of forming a plated film by performing only electrolytic plating treatment.

The above-mentioned first method of forming a plated film will be described with reference to FIG. 7 . First, referring to FIG. 7(A), a first plated film 46 is formed on the surface of the second conductive film 34 including the side walls of the through hole 42 by electroless plating. The thickness of the first plating film 46 only needs to be about 3 μm to 5 μm.

Next, referring to FIG. 7(B), a new second plating film 47 is formed on the first plating film 46 by electrolytic plating. Specifically, using the second conductive film 34 formed with the first plating film 46 as a cathode electrode, the second plating film 47 is formed by electrolytic plating. The first plating film 46 is formed on the inner wall of the through hole 42 by the above-mentioned electroless plating method. Therefore, the second plated film 47 formed here also has the same thickness including the inner wall of the through hole 42 . In this way, the connection portion 43 is formed by the plated film. Specifically, the thickness of the second plating film 47 is, for example, about 20 μm. The above-mentioned first plating film 46 and second plating film 47 can be made of the same material as that of the second conductive film 34 , that is, copper. In addition, a metal other than copper may be used as the material of the first plating film 46 and the second plating film 47 .

Referring to FIG. 7(C), here, through-hole 42 is buried with second plating film 47 by performing loaded plating. By performing this loaded plating, the mechanical strength of the connecting portion 43 can be improved.

Next, a method of forming the connection portion 43 using the electrolytic plating method will be described with reference to FIG. 8 .

Referring to FIG. 8(A), first, a solution containing metal ions is brought into contact with the via hole 42 . Here, copper, gold, silver, palladium, etc. can be used as the material of the plating film 48 . Then, when a current is passed through the second conductive film 34 as a cathode electrode, metal is deposited on the second conductive film 34 as a cathode electrode to form a plated film. Here, 48A and 48B represent the state of plating film growth. In the electrolytic plating method, a plated film is preferentially formed at a position where the electric field is strong. In this form, the electric field becomes stronger on the portion of the second conductive film 34 facing the peripheral portion of the through hole 42 . Therefore, as shown in the figure, the plating film grows preferentially from the second conductive film 34 at the portion facing the peripheral portion of the via hole 42 . When the formed plating film is in contact with the protrusion, the first wiring layer 40 and the second conductive film 34 are electrically connected. Then, a plated film is similarly formed inside the through hole 42 . Thus, the connection portion 43 integrated with the second conductive film 34 is formed inside the through hole 42 .

Next, another method of forming the connecting portion 43 will be described with reference to FIG. 8(B). Here, by providing the visor 50 on the peripheral portion of the through hole 42 , the connecting portion 43 can be easily formed by electrolytic plating. Here, the “overeave” is a portion formed by the second conductive film 34 protruding so as to cover the peripheral portion of the through hole 42 . A specific manufacturing method of the overhang 50 can be performed by increasing the output of the laser when forming the through hole 42 with a laser. By increasing the output of the laser light, the removal of the second conductive film 34 by the laser light advances in the lateral direction, and the resin in the area under the eaves 50 is removed. By performing the electrolytic plating process using the second conductive film 34 as a cathode electrode under the conditions described above, the plating film is preferentially grown from the portion of the eaves 50 . By growing the plating film from the eaves 50, the plating film can be grown preferentially in the downward direction as compared with the case of FIG. 8(A). Therefore, the through hole 42 can be accurately buried with the plated film.

As described above, the side wall of the through hole 42 in this embodiment is formed in a shape having concavities and convexities. In addition, the filler mixed in the insulating layer 41 is exposed on the side wall of the via hole 42 . This makes it difficult to form a plated film on the side wall of the through hole 42 . In general, it is difficult to adhere a plating film on the surface of a filler that is an inorganic filler. In particular, when AlN is exposed on the side wall of the via hole 42, it is difficult to form a plated film. Therefore, in this form, the connection part 43 can be formed by the method using the above-mentioned electrolytic plating method.

In addition, even when the through hole 42 is buried by performing the load plating, as described above, since the through hole 42 is formed shallowly, the load plating can be easily performed.

In this embodiment, the position where the above-mentioned convex portion 18 and the connection portion 43 are brought into contact is located in the middle portion in the thickness direction of the insulating layer 41 . Here, the middle portion refers to the upper side of the first wiring layer 40 , that is, the lower side of the second wiring layer 45 . Therefore, on the paper, the position where the convex portion 18 contacts the connection portion 43 is near the center portion in the thickness direction of the insulating layer 41 . Also, the position may vary within the range of the above-mentioned intermediate portion. In consideration of forming connection portion 43 by plating, the contact portion of protrusion 18 and connection portion 43 is preferably located above the middle position between the upper surface of first wiring layer 40 and the lower surface of second wiring layer 45 . Thereby, there is an advantage that the connection portion 43 made of the plated film can be easily formed. That is, the through hole 42 is formed to form the connection portion 43 , but the depth of the through hole 42 may be formed relatively shallow. In addition, the diameter of the through hole 42 may also be reduced by a shallow amount. In addition, the distance between the through holes 42 may be narrowed so that the diameter of the through holes 42 is small. Therefore, a fine pattern can be realized as a whole, and the circuit device can be miniaturized.

Claims (8)

1, a kind of manufacture method of circuit arrangement is characterized in that, comprising:

Form on the surface of support substrate by first conductive pattern and forms the operation of the wiring layer that constitutes of second conductive pattern thicker than described first conductive pattern;

Operation with described wiring layer and circuit element electrical connection;

By sealing resin seal described support substrate above, make it cover the operation of described circuit element;

And the operation of separating the back side of described wiring layer and described sealing resin from described support substrate.

2, a kind of manufacture method of circuit arrangement is characterized in that, comprising:

Form the operation that has along first wiring layer of the outstanding protuberance of thickness direction on the support substrate surface;

Jie makes the operation of conducting film lamination on described first wiring layer by insulating barrier;

Formation makes the operation of the connecting portion of described protuberance and described conducting film conducting;

By the described conducting film of composition, form the operation of second wiring layer;

Operation with described second wiring layer and circuit element electrical connection;

By sealing resin seal described support substrate above, make it cover the operation of described circuit element; And

The operation of separating the back side of described first wiring layer, insulating barrier and described sealing resin from described support substrate.

3, the manufacture method of circuit arrangement as claimed in claim 2 is characterized in that, the following formation of described connecting portion, partly remove described conducting film, described insulating barrier is exposed, by removing the described insulating barrier that exposes, form through hole, in described through hole, form electroplated film.

4, the manufacture method of circuit arrangement as claimed in claim 3, it is characterized in that the following formation of described electroplated film is after applying the sidewall formation electroplated film of handling at described through hole by electroless plating, carry out the electrolysis plating and handle, in described through hole, form new electroplated film.

5, the manufacture method of circuit arrangement as claimed in claim 3, it is characterized in that, described electroplated film is handled described conducting film by carrying out as the electrolysis plating that electrode uses, be formed into the inboard of described through hole from the described conducting film that is positioned at described bore periphery portion.

6, the manufacture method of circuit arrangement as claimed in claim 5 is characterized in that, forms the penthouse that is made of described conducting film at the periphery of described through hole, and the inboard from described penthouse to described through hole forms electroplated film.

7, the manufacture method of circuit arrangement as claimed in claim 2 is characterized in that, has sneaked into filler in described insulating barrier.

8, as the manufacture method of claim 1 or the described circuit arrangement of claim 2, it is characterized in that, described support substrate and described first wiring layer utilize bonding agent to paste, after the bonding force that makes described bonding agent reduces, the back side of described first wiring layer, described insulating barrier and described sealing resin is separated from described support substrate.

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