CN1624208A - Electroplate device, electroplate method and method for manufacturing semiconductor device - Google Patents

Abstract

According to one embodiment of the present invention, an electroplating device is provided, comprising: an electroplating solution tank for storing an electroplating solution; a fixture for fixing a substrate on which a seed layer is formed in the electroplating solution tank; a first anode composed of an anode metal having an oxidation-reduction potential higher than that of a metal constituting the seed layer, and electrically connected to the seed layer of the substrate held by the holder; and A second anode placed in the bath of the electroplating solution capable of applying a voltage between the seed layers of the substrate held by the holder.

Description

Plating apparatus, plating method, and manufacturing method of semiconductor device

Cross-References to the Invention

This application is based on and claims priority from the prior Japanese Patent Application No. 2003-401773 filed on December 1, 2003; the entire contents of which are incorporated herein by reference.

technical field

The present invention relates to an electroplating apparatus and an electroplating method for electroplating on a substrate, and a method of manufacturing a semiconductor device.

Background technique

In recent years, it has been required to increase the operating speed of semiconductor devices in order to achieve high integration density and high functionality of the devices. Therefore, the wiring connected to each component is thinner and multilayered. Currently, corresponding to such finer multilayer wiring, wiring is formed by filling Cu in via holes and wiring trenches formed on an interlayer insulating film, and then removing excess Cu.

Now, from the viewpoint of filling speed, Cu is filled using an electrolytic plating method. However, when a semiconductor wafer (hereinafter 'wafer') is immersed in an electroplating solution, the seed layer may dissolve and/or leave bubbles on the surface of the wafer to be electroplated. It is desirable to suppress the dissolution of these seed layers and/or retained air bubbles, as they can lead to the appearance of voids.

In order to solve these problems, a method of immersing a wafer in a plating solution while applying a voltage between the wafer and the anode, and tilting the wafer is employed. Here, when the wafer is immersed in the plating solution, substantially the same voltage as that applied at the time of plating is applied. As another method, it is known to place a reference electrode in the vicinity of the wafer, and to control the potential of the wafer to a predetermined potential with respect to the reference electrode while the wafer is immersed in a plating solution (for example, refer to the specifications of U.S. Patent No. 6,551,483 and U.S. Patent No. .6562204 instructions).

However, in the former case, a voltage is applied to the wafer while it is immersed in the plating solution at an inclination, so that the amount of the plating film formed differs between the part wetted earlier and the part wetted later, and thus, there is The problem that it is difficult to form a uniform plating film. In the latter case, the reference electrode is placed near the wafer so that the reference electrode interferes with the electric field at the time of plating, whereby there is a problem that it is difficult to form a uniform plating film.

Contents of the invention

According to one aspect of the present invention, an electroplating device is provided, comprising: an electroplating solution tank for storing an electroplating solution; a fixture for fixing a substrate on which a seed layer is formed in the electroplating solution tank; a first anode in the cell, the first anode being composed of an anode metal having a higher oxidation-reduction potential than that of the metal constituting the seed layer and electrically connected to the seed of the substrate held by the holder layer; and a second anode placed in said bath of electroplating solution capable of applying a voltage between itself and the seed layer of the substrate held by the holder.

According to another aspect of the present invention, there is provided an electroplating method, comprising: electrically connecting a first anode to a seed layer of a substrate, wherein the first anode is placed in an electroplating solution, and the seed is constituted by an oxidation-reduction potential ratio forming the anode metal with a higher oxidation-reduction potential of the metal of the layer; wetting the substrate in the electroplating solution; and electroplating the substrate by applying a voltage between the seed layer and a second anode placed in the electroplating solution.

According to still another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a seed layer on a substrate having a recessed portion on the surface, thereby filling a part of the recessed portion; electrically connecting the first anode to a seed layer, wherein the first anode is placed in the electroplating solution and is composed of an anode metal having a higher oxidation-reduction potential than that of the metal comprising the seed layer; wetted in the electroplating solution, the first anode is electrically connected to the substrate of the seed layer thereon; forming an electroplating film on the seed layer by applying a voltage between the seed layer and the second anode placed in the electroplating solution, thereby filling the recessed portion; and removing the The plated film other than the plated film filled in and the seed layer other than the seed layer filled in the recessed portion.

Brief introduction to the drawings

FIG. 1 is a schematic vertical sectional view of a plating apparatus according to a first embodiment.

Fig. 2 is a schematic vertical sectional view of a wafer according to the first embodiment.

FIG. 3 shows a flowchart of the electroplating process according to the first embodiment.

4A to 4D are schematic diagrams showing the working state of the electroplating device according to the first embodiment.

5A and 5B are schematic vertical sectional views of the wafer according to the first embodiment.

Fig. 6 is a schematic vertical sectional view of a plating apparatus according to a second embodiment.

Detailed ways

(first embodiment)

Hereinafter, the first embodiment is described. FIG. 1 is a schematic vertical sectional view of a plating apparatus according to this embodiment, and FIG. 2 is a schematic vertical sectional view of a wafer according to this embodiment.

As shown in FIG. 1 , a plating apparatus 1 is composed of a cylindrical plating solution tank 2 and the like. The electroplating solution tank 2 is used to store an electroplating solution whose main component is an electrolytic solution, for example, copper sulfate aqueous solution.

A holder 3 holding a wafer W (substrate) is placed above the plating solution tank 2 . The holder 3 holds the wafer W in a so-called face-down manner so that the surface of the wafer W to be plated faces down.

The holder 3 is constituted by a holder main body 3A and the like for accommodating the wafer W substantially horizontally therein. The lower surface of the holder body 3A is open so that the surface of the wafer W to be plated will be wetted in the plating solution.

In the holder main body 3A, a wafer W having the following structure is accommodated. The wafer W includes an interlayer insulating film 101 as shown in FIG. 2 . The interlayer insulating film 101 is composed of a low dielectric constant insulating material, for example, SiOF, SiOC, porous silicon dioxide, or the like. The interlayer insulating film 101 is formed on a semiconductor substrate having semiconductor elements (not shown) and the like. In the interlayer insulating film 101, a via hole 101A as a depressed portion and a wiring trench 101B as a depressed portion are formed.

On the interlayer insulating film 101, a barrier metal layer 102 for suppressing diffusion of a metal constituting a plating film 104 described later into the interlayer insulating film 101 is formed. The barrier metal layer 102 is made of a conductive material. Such a conductive material is composed of, for example, a metal such as Ta, Ti, etc., or a metal nitride such as TiN, TaN, WN, etc., and has a smaller diffusion coefficient than the metal constituting the plated film 104 . Incidentally, the barrier metal layer 102 may be formed of a multilayer material of these metals or metal nitrides.

A seed layer 103 for passing current in the wafer W is formed on the barrier metal layer 102 . The seed layer 103 is made of metal, such as Cu.

The contacts 3B are placed on the inner surface of the holder main body 3A in contact with the seed layer 103 . The contacts 3B are attached to the sealing ring 3C, which inhibits the plating solution from coming into contact with the contacts 3B. By pressing the wafer W against the seal ring 3C, thereby closing its opening, the seal ring 3C is elastically deformed so that the seal ring 3C is firmly fixed to the wafer W. Therefore, contact of the plating solution with the contacts 3B is restricted.

A tilt and turn mechanism 4 for tilting and rotating the wafer W relative to the solution surface of the plating solution is attached to the holder 3 . The tilt and rotation mechanism 4 tilts the wafer W relative to the solution surface of the plating solution and rotates the holder 3 and the like.

A lift/lower mechanism (not shown) for lifting/lowering wafer W is attached to holder 3 . Lifting/lowering mechanism lifts/falls the fixer 3, etc. By activating the raising/lowering mechanism, the holder 3 is raised/lowered, so that the wafer W is dipped into or pulled out of the plating solution.

A substantially disk-shaped anode 5 (second anode) is placed at the bottom position of the plating solution tank 2 . The contact 3B and the anode 5 are electrically connected to a power source 6 for applying a voltage between the seed layer 103 and the anode 5 through the contact 3B.

A substantially strip-shaped sacrificial anode 7 (first anode) electrically connectable to the seed layer 103 is placed outside the area sandwiched by the wafer W and the anode 5 in the plating solution tank 2 . In this embodiment, the sacrificial anode 7 is placed near the side wall of the electroplating solution tank 2 .

The sacrificial anode 7 is made of an anode metal having a higher oxidation-reduction potential than that of the metal constituting the seed layer 103 . For such a material, for example, metal, metal oxide, carbon (C), or the like can be used. Specifically, for example, when the seed layer 103 is composed of Cu, the sacrificial anode 7 may be composed of Zn, Ta, their oxides, C, or the like. The contact area of the formed sacrificial anode 7 and the electroplating solution is smaller than the contact area of the wafer W and the electroplating solution.

The partition wall 8 is placed in the plating solution tank 2 . The partition wall 8 separates the area where the wafer W is wetted and immersed from the area where the sacrificial anode 7 is placed. The partition wall 8 prevents the plating solution in the area where the wafer W is wetted and immersed from mixing with the plating solution in the area where the sacrificial anode 7 is placed, but is configured to electrically connect the two areas. Incidentally, a diaphragm may be used instead of the partition wall 8 .

Hereinafter, the working state of the electroplating apparatus 1 will be described. FIG. 3 shows a flowchart of the electroplating process according to this embodiment. 4A to 4D show schematic views of the working state of the electroplating apparatus 1 according to the present embodiment, and FIGS. 5A and 5B are schematic vertical cross-sectional views of the wafer W according to the present embodiment.

As shown in FIG. 4A , the seed layer 103 of the wafer W is electrically connected to the sacrificial anode 7 while the wafer W is held by the holder 3 (step 1). After that, the tilt and rotate mechanism 4 is activated to rotate the wafer W and tilt the wafer W (step 2).

Next, activate the lift/lower mechanism to wet the wafer W and immerse the wafer W in the electroplating solution, as shown in FIG. 4B (step 3). After the wafer W is wetted and immersed in the electroplating solution, the electrical connection between the seed layer 103 and the sacrificial anode 7 is disconnected, as shown in FIG. 4C (step 4).

Thereafter, the power source 6 is activated to apply a voltage between the seed layer 103 and the anode 5, as shown in FIG. 4D, and then the wafer W is electroplated (step 5). As shown in FIG. 5A, after the plating film 104 of a predetermined thickness is formed, the voltage application is stopped, thereby stopping the plating (step 6). Finally, the lift/lower mechanism is activated to pull the wafer W out of the plating solution (step 7).

Incidentally, the wafer W is then subjected to heat treatment (annealing), whereby the crystals of the seed layer 103 and the plating film 104 grow. Thus, a wiring film in which the seed layer 103 and the plating film 104 are combined is formed. Next, as shown in FIG. 5B , the excess portions of the barrier metal film 102 and the wiring film on the interlayer insulating film 101 are respectively removed by, for example, chemical mechanical polishing (CMP), thereby remaining in the via hole 101A and the wiring trench 101B, respectively. There are a barrier metal film 102 and a wiring film. Accordingly, wiring 105 is formed in via hole 101A and wiring trench 101B.

In this embodiment, since the seed layer 103 is electrically connected to the sacrificial anode 7 while the wafer W is wetted and immersed in the plating solution, the occurrence of voids due to the dissolution of the seed layer can be prevented and improved The uniformity of the film thickness of the plated film 104 on the surface. That is, when the wafer W and the sacrificial anode 7 are in a state of being electrically connected while the wafer W is wetted and immersed in the plating solution, since the sacrificial anode is composed of an anode having a higher oxidation-reduction potential than that of the metal constituting the seed layer Since it is made of metal, a reduction reaction occurs on the seed layer 103 and an oxidation reaction occurs on the sacrificial anode 7 . Therefore, the dissolution of the seed layer 103 can be suppressed, so that the occurrence of voids can be prevented. On the other hand, a reduction reaction occurs on the seed layer 103, whereby the seed layer 103 is plated. However, the amount of plating on the wafer W can be reduced compared to the case where substantially the same voltage as in plating is applied between the seed layer 103 and the anode 5 while the wafer W is wetted and immersed in the plating solution. By making the contact area of the sacrificial anode 7 and the electroplating solution smaller, the amount of electroplating can be further reduced. Therefore, non-uniformity in the amount of plating on the wafer W when the wafer W is wetted and immersed in the plating solution is prevented, so that the surface uniformity of the film thickness on the plating film 104 can be improved.

In this embodiment, since the area where the wafer W is wetted and immersed in the plating solution and the area where the sacrificial anode 7 is placed are separated by the partition wall 8, the dissolved sacrificial anode 7 can be prevented from settling on the wafer W. That is, when the wafer W is wetted and immersed in the plating solution while the seed layer 103 and the sacrificial anode 7 are in a state of being electrically connected, the sacrificial anode 7 may be dissolved in the plating solution depending on the constituent material of the sacrificial anode 7 . Here, if the sacrificial anode 7 dissolves, the dissolved material may prevent the wafer W from being plated. In contrast, in the present embodiment, the area where the wafer W is wetted and immersed in the plating solution and the area where the sacrificial anode 7 is placed are separated by the partition wall 8, so even when the sacrificial anode 7 dissolves, it is possible to avoid preventing the wafer from being plated. W.

In the present embodiment, since the wafer W is plated after the electrical connection between the seed layer 103 and the sacrificial anode 7 is broken, the uniformity of the surface of the film thickness on the plated film 104 can be improved. That is, when the wafer W is electroplated by applying a voltage between the seed layer 103 and the anode 5 while the seed layer 103 and the sacrificial anode 7 are in an electrically connected state, the electric field distribution may be disturbed. In contrast, in the present embodiment, since the wafer W is plated after the electrical connection between the seed layer 103 and the sacrificial anode 7 is broken, disturbance of the electric field distribution can be avoided. Therefore, the uniformity of the surface of the film thickness on the plated film 104 can be improved.

Furthermore, in this embodiment, since the sacrificial anode 7 is placed outside the area sandwiched between the wafer W and the anode 5, there is little disturbance in the electric field distribution when the wafer W is electroplated. Thereby, the uniformity of the surface of the film thickness on the plated film 104 can be improved.

(example)

Hereinafter, an example is explained. In this example, the fill state of the plating is observed.

In this example, the plating apparatus described in the first embodiment above was used. A plating solution whose main component is copper sulfate aqueous solution is used, and a sacrificial anode composed of Zn is used. In addition, wafers formed as follows were used. A 100 nm thick oxide film was formed on the Si substrate by thermal oxidation, and subsequently, an approximately 1 µm thick interlayer insulating film was formed on the oxide film by using a chemical vapor deposition (CVD) method. In addition, a wiring trench of 0.09 μm wide and 300 nm deep was formed on the interlayer insulating film by photolithography process (PEP) and etching. After that, a barrier metal layer composed of Ta with a thickness of 15 nm was formed on the interlayer insulating film by using a sputtering method, and a seed layer composed of Cu with a thickness of 80 nm was formed on the barrier metal layer. Incidentally, these film thicknesses are values measured on the plane of the interlayer insulating film in which no wiring trenches are formed.

The wafer is plated using the above-described plating apparatus, wafer, etc. and the same method as described in the first embodiment, so that the plating layer is filled to half the height of the wiring trench. At this time, observe the filling state of the plating layer in the middle and edge portions of the wafer.

Incidentally, as Comparative Example 1 compared with the present example, the state of filling of the plating layer in the middle and edge portions of the wafer was also observed when no voltage was applied between the seed layer and the anode while the wafer was immersed in the plating solution. In addition, as Comparative Example 2, the state of filling of the plating layer in the middle and edge portions of the wafer was also observed when substantially the same voltage as that in plating was applied between the seed layer and the anode while the wafer was immersed in the plating solution.

Present the observations. Table 1 and Table 2 show the observation results according to this example and Comparative Examples 1 and 2.

[Table 1] This example Comparative example 1 Comparative example 2 middle half filled half filled half filled edge half filled half filled full fill

[Table 2] This example Comparative example 1 Comparative example 2 middle no holes There are holes no holes edge no holes There are holes There are holes

As shown in Table 1, the plating layer was filled to half the height of the wiring trenches in the middle and edge portions of the wafer according to Comparative Example 1. However, as shown in Table 2, voids occurred in the middle and edge portions of the wafer according to Comparative Example 1. It is conceivable that voids are generated due to the dissolution of the seed layer.

Furthermore, as shown in Table 1, the plating layer was filled to half the height of the wiring trenches in the middle portion of the wafer according to Comparative Example 2, however, at the edge portion of the wafer, the wiring trenches were filled with the plating layer. Meanwhile, as shown in Table 2, voids occurred at the edge portion of the wafer according to Comparative Example 2. It is conceivable that the voids are not produced by dissolution with the seed layer, but by not plating under proper filling conditions when the wafer is immersed in the plating solution.

In contrast, as shown in Table 1, the plating layer was filled to half the height of the wiring trenches in the middle and edge portions of the wafer according to this example. Furthermore, as shown in Table 2, voids did not occur in the middle and edge portions of the wafer according to this example.

Through these results, it was verified that when the wafer is immersed in the electroplating solution while the seed layer and the sacrificial anode are in a state of electrical connection, the wafer is less prone to corrosion than when the wafer is immersed in the electroplating solution in a state where no voltage is applied between the seed layer and the sacrificial anode. Voids are easily generated, and the surface uniformity of film thickness on the plating film can be improved more than when the wafer is immersed in the plating solution while applying a voltage between the seed layer and the sacrificial anode.

(second embodiment)

Hereinafter, a second embodiment is described. In this example, the case of using a sacrificial anode formed of carbon will be described. FIG. 6 shows a schematic vertical sectional view of the plating apparatus according to the present embodiment.

Same as the first embodiment, the sacrificial anode 7 is placed in the electroplating solution tank 2 . The sacrificial anode 7 of this embodiment is made of carbon. Here, in the case of using sacrificial anode 7 made of carbon, sacrificial anode 7 hardly dissolves even when wafer W is immersed in a plating solution while seed layer 103 and sacrificial anode 7 are in a state of being electrically connected. Therefore, when the sacrificial anode 7 composed of carbon is used, the partition wall 8 can be eliminated, as shown in FIG. 6, because the dissolved sacrificial anode 7 does not interfere with the plating of the wafer W.

The present invention is not limited to those described in the above embodiments, and the structure, material, arrangement of each component, etc. can be appropriately changed within the scope not departing from the spirit of the present invention. In the above-described embodiment, the case where the wafer W is inclined relative to the anode 5 while the wafer W is being plated has been described, but the wafer W may be substantially parallel to the anode 5 while the wafer W is being plated. Furthermore, in the above-described embodiments, the wafer W is held face down, but the wafer W may be held in a so-called face-up manner in which the wafer W to be plated faces up.

Claims (20)

1. An electroplating device, comprising: Plating solution tanks for storing electroplating solutions; a holder for holding a substrate on which a seed layer is formed in the electroplating solution tank; a first anode placed in the electroplating solution tank, the first anode is composed of an anode metal having a higher oxidation-reduction potential than that of the metal constituting the seed layer, and is electrically connected to the fixed on the seed layer of the substrate; and A second anode placed in the bath of the electroplating solution capable of applying a voltage between it and the seed layer of the substrate held by the holder. 2. The electroplating apparatus according to claim 1, further comprising: A partition wall or membrane placed in the plating solution tank to separate the area where the substrate held by the holder is immersed in the plating solution from the area where the first anode is placed. 3. The electroplating apparatus according to claim 1, wherein said first anode is composed of metal, metal oxide or carbon. 4. The electroplating apparatus according to claim 3, wherein the seed layer is composed of Cu, and the first anode is composed of Zn, Ta, their oxides, or C. 5. The plating apparatus according to claim 1, wherein said first anode is placed outside a region sandwiched between the substrate held by said holder and said second anode. 6. The plating apparatus according to claim 1, wherein said first anode is formed to have a contact area with the plating solution smaller than a contact area of the substrate with the plating solution. 7. A method of electroplating, comprising: electrically connecting the first anode to the seed layer of the substrate, wherein the first anode is placed in the electroplating solution and is composed of an anode metal having a higher oxidation-reduction potential than the metal forming the seed layer; Wetting the substrate in the plating solution; and The substrate is plated by applying a voltage between the seed layer and a second anode placed in the plating solution. 8. The electroplating method according to claim 7, further comprising: The electrical connection between the first anode and the seed layer is broken between the wetting the substrate in the electroplating solution and the electroplating substrate. 9. The electroplating method according to claim 7, wherein said wetting the substrate in the electroplating solution is carried out while the area where the substrate is wetted in the electroplating solution is separated from the area where the first anode is placed with a partition wall or a diaphragm. 10. The electroplating method according to claim 7, wherein the first anode is composed of metal, metal oxide or carbon. 11. The electroplating method according to claim 10, wherein the seed layer is composed of Cu, and the first anode is composed of Zn, Ta, their oxides or C. 12. The electroplating method according to claim 7, wherein the first anode is placed outside the region sandwiched by the substrate and the second anode. 13. The electroplating method according to claim 7, wherein a contact area of the first anode with the electroplating solution is smaller than a contact area of the substrate with the electroplating solution. 14. A method of manufacturing a semiconductor device, comprising: forming a seed layer on the substrate having a recessed portion on the surface so as to fill a portion of the recessed portion; electrically connecting the first anode to the seed layer, wherein the first anode is placed in the electroplating solution and is comprised of an anode metal having a higher oxidation-reduction potential than the metal comprising the seed layer; Wetting the substrate on which the first anode is electrically connected to the seed layer in an electroplating solution; forming a plating film on the seed layer by applying a voltage between the seed layer and a second anode placed in the plating solution, thereby filling the recessed portion; and The plating film other than the plating film filled in the recessed portion is removed, and the seed layer other than the seed layer filled in the recessed portion is removed. 15. The manufacturing method according to claim 14, further comprising: Disconnecting the electrical connection between the first anode and the seed layer between said wetting the substrate in the electroplating solution and said forming the electroplating film. 16. The manufacturing method according to claim 14, wherein said wetting the substrate in the plating solution is carried out while separating the region where the substrate is wetted in the plating solution from the region where the first anode is placed with a partition wall or a diaphragm. 17. The manufacturing method according to claim 14, wherein the first anode is composed of metal, metal oxide or carbon. 18. The manufacturing method according to claim 17, wherein the seed layer is composed of Cu, and the first anode is composed of Zn, Ta, their oxides, or C. 19. The manufacturing method according to claim 14, wherein the first anode is placed outside a region sandwiched by the substrate and the second anode. 20. The manufacturing method according to claim 14, wherein a contact area of the first anode with the plating solution is smaller than a contact area of the substrate with the plating solution.

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