CN1965110A - Method of barrier layer surface treatment to enable direct copper plating on barrier metal - Google Patents

Abstract

The invention discloses embodiments of a method of barrier layer surface treatment to enable direct copper plating without copper seed layer. In one embodiment, a method of plating copper on a substrate with a group VIII metal layer on top comprises pre-treating the substrate surface by removing a group VIII metal surface oxide layer and/or surface contaminants and plating copper on the pre-treated group VIII metal surface. Pre-treating the substrate can be accomplished by annealing the substrate in an environment with a hydrogen-containing gas environment and/or a non-reactive gas(es) to group VIII, by a cathodic treatment in an acid-containing bath, or by immersing the substrate in an acid-containing bath.

Description

Method of barrier layer surface treatment capable of direct copper plating on barrier metal

technical field

Embodiments of the invention generally relate to methods of barrier surface treatment that enable direct copper plating on barrier metals.

Background technique

Sub-quarter-micron, multilayer metallization is one of the key technologies for next-generation very large-scale integration (VLSI) and very large-scale integration (ULSI) semiconductor devices. The multilayer interconnects at the heart of this technology require filling contacts, vias, lines, and other features formed in voids with high aspect ratios. Reliable formation of these features is very important to the success of both VLSI and ULSI, as well as to the ongoing effort to increase circuit density and quality on individual substrates and dies.

As circuit density increases, the widths of contacts, vias, lines, other features, and intervening dielectric material decrease to less than 65 nm, while the thickness of the dielectric layer remains substantially constant, resulting in features with aspect ratios (ie, height divided by width) increases. Many conventional deposition processes cannot consistently fill semiconductor structures with aspect ratios exceeding 6:1, especially when aspect ratios exceed 10:1. Accordingly, there remains a considerable amount of work towards forming void-free nanoscale structures with aspect ratios of feature height to feature width ratios of 6:1 or greater.

Furthermore, as feature widths decrease, device current typically remains constant or increases, resulting in increased current densities for these features. Elemental aluminum and aluminum alloys have been traditional metals for forming vias and lines in semiconductor devices due to aluminum's observable low resistivity, good adhesion to most dielectric materials, and ease of patterning, and High-purity aluminum is readily available. However, aluminum has a higher resistivity than other conductive metals such as copper. Aluminum is also affected by electron migration, leading to the formation of voids in the conductor.

Copper and copper alloys have a lower resistivity than aluminum and a significantly higher electron migration resistance than aluminum. These characteristics are very important to support the higher current densities experienced with high integration and increasing device speeds. Copper also has good thermal conductivity. Copper is thus the metal of choice for filling sub-quarter micron, high aspect ratio interconnect features on semiconductor substrates.

Traditionally, deposition techniques such as chemical vapor deposition (CVD) and physical vapor deposition (PVD) have been used to fill these interconnect features. However, as interconnect dimensions decrease and aspect ratios increase, void-free interconnect feature filling by conventional metallization techniques using CVD and/or PVD becomes increasingly difficult. As a result, electroplating techniques such as electrochemical plating (ECP) have become viable processes for filling sub-quarter micron sized high aspect ratio interconnect features in integrated circuit fabrication processes.

Most ECP processes require a two-stage process in which a seed layer is first formed over the surface of the features on the substrate (this process can be achieved in a separate system), and then the surface of the features is exposed to an electrolyte solution while the An electrical bias is applied between the bottom surface and an anode located within the electrolyte solution.

Traditional electroplating practices involve depositing a copper seed layer onto a diffusion barrier such as tantalum or tantalum nitride by physical vapor deposition (PVD), chemical vapor deposition (CVD) or atomic layer deposition (ALD). However, as feature sizes become smaller, it is difficult to have proper seed phase coverage with PVD techniques because the sidewall seeds near the feature bottom often get discrete islands of copper agglomeration. When a CVD or ALD deposition process is used instead of PVD to deposit a continuous sidewall layer over the entire depth of the high aspect ratio feature, a thick copper layer forms over this area. A thick copper layer on this area can cause the entry portion of the feature to close before the sidewall is completely covered. ALD and CVD techniques are also prone to creating discontinuities in the seed layer when the deposition thickness over this area is reduced to prevent entry closure. These discontinuities in the seed layer have been shown to cause defects in layers plated over the seed layer. In addition, copper is prone to rapid oxidation in the atmosphere, and copper oxide will quickly dissolve in the plating solution. To prevent complete dissolution of the copper in the features, the copper seed layer is usually made relatively thick (up to 800 A thick), which can inhibit the plating process from filling the features. Accordingly, what is desired is a copper electroplating process that allows direct electroplating of copper on one or more thin barrier layers without a copper seed layer.

Therefore, there is a need for a copper electroplating process that can fill features without requiring a copper seed layer.

Contents of the invention

Embodiments of the present invention generally provide methods of barrier layer surface treatments that enable direct copper electroplating without a copper seed layer. In one embodiment, a method of electroplating copper directly on a substrate having a Group VIII metal layer on the surface of the substrate, the method comprising the steps of: pretreating the surface of the substrate to remove Removing the Group VIII metal surface oxide layer and/or organic surface contaminants on the substrate surface to reduce the critical current density during electroplating; and using an electroplating current equal to or greater than the critical current density in an acidic electroplating bath A continuous and void-free layer of copper is plated on the pretreated substrate surface in the solution.

Description of drawings

By reading the following detailed description in conjunction with the accompanying drawings, it will be easy to understand the teaching of the present invention. In the accompanying drawings:

1A-1C illustrate schematic cross-sectional views of integrated circuit fabrication sequences.

Figure 2 shows the critical current density as a function of sulfuric acid concentration.

Figure 3A shows a flow chart for pre-treating substrate surfaces prior to copper electroplating.

Figure 3B shows the critical current density as a function of sulfuric acid concentration for as-deposited and annealed ruthenium substrates.

Figure 4 shows a SEM of electroplated copper on a ruthenium surface after annealing in a 0.14 μm x 0.8 μm trench.

Figure 5 is a top view of one embodiment of an electrochemical plating system.

Figure 6 illustrates an exemplary embodiment of a plating cell used in the electrochemical plating cell of the present invention.

To facilitate understanding, identical reference numerals have been used, where possible, to denote identical elements that are common to the drawings. The figures are not drawn to scale.

Detailed ways

Ruthenium (Ru) thin films deposited by CVD, ALD or PVD may be potential candidates for seedless diffusion barriers between intermetal dielectrics (IMDs) and copper interconnects for sub-45nm technologies. Ruthenium is a Group VIII metal with low resistivity (resistivity ~7 μW-cm) and high thermal stability (high melting point ~2300°C). Ruthenium is relatively stable even in the presence of oxygen and water at ambient temperature. Ruthenium has twice the thermal and electrical conductivity of tantalum (Ta). Ruthenium does not form alloys with copper below 900°C and exhibits good adhesion to copper. Accordingly, the semiconductor industry has become interested in using ruthenium as a copper barrier layer. The low resistivity of ruthenium is an advantage when attempting to fill ruthenium-coated features with copper without a seed layer.

1A-1C illustrate cross-sectional views of a substrate at various stages in a copper interconnect fabrication sequence incorporating a Group VIII metal barrier layer of the present invention. For example, FIG. 1A illustrates a cross-sectional view of a substrate 100 having metal contacts 104 and a dielectric layer 102 formed thereon. The substrate 100 may include a semiconductor material such as silicon, germanium, or gallium arsenide. Dielectric layer 102 may comprise an insulating material such as silicon dioxide, silicon nitride, silicon oxynitride, and/or carbon-doped silicon oxide (SiOxCy, a registered trademark available from Applied Materials, Inc., Santa Clara, California, for example). is the low-k dielectric of BLACKDIAMOND ^TM ). Metal contacts 104 may include, for example, copper or other materials. Apertures 120 may be defined in dielectric layer 102 to provide openings over metal contacts 104 . Apertures 120 may be defined in dielectric layer 102 using conventional photolithography or etching techniques. The width of the pores 120 may be equal to or less than about 900 Ȧ. The thickness of the dielectric layer 102 may range from about 1000 Ȧ to about 10000 Ȧ.

In one embodiment, barrier layer 106 may be formed in aperture 120 defined in dielectric layer 102 . The optical barrier layer 106 may comprise one or more layers containing refractory metals for copper barrier materials such as titanium, titanium nitride, titanium silicon nitride, tantalum, tantalum nitride, tantalum silicon nitride, tungsten, tungsten nitride , and other materials. Optical barrier layer 106 may be formed using a suitable deposition process such as ALD, chemical vapor deposition (CVD), or physical vapor deposition (PVD). For example, titanium nitride may be deposited using a CVD process or an ALD process in which titanium tetrachloride reacts with ammonia. In one embodiment, tantalum and/or tantalum nitride is deposited as a barrier layer by an ALD process as described in commonly assigned US Patent Publication 20030121608 published Jul. 3, 2003, which is hereby incorporated by reference. . The thickness of the optional barrier layer is between about 5 Ȧ and about 150 Ȧ, and preferably less than 100 Ȧ.

In one embodiment, thin films of Group VIII metals such as ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), and platinum (Pt) can be used as copper vias Or the bottom layer (or barrier layer) of the line. These Group VIII metals that are resistant to corrosion and oxidation can provide a surface on which a copper layer can be subsequently deposited using an electrochemical plating (ECP) process. Group VIII metals are used for the copper barrier layer. Group VIII metals can also be deposited on conventional barrier layers such as Ta (tantalum) and/or TaN (tantalum nitride) to act as an adhesion layer between the conventional barrier layer and copper. Group VIII metals are typically deposited using a chemical vapor deposition (CVD) process, an atomic layer deposition (ALD) process, or a physical vapor deposition (PVD) process.

Referring to FIG. 1B , a Group VIII barrier metal layer 108 , such as ruthenium, is formed on the substrate, and in this example on the optional barrier layer 106 . The thickness of Group VIII metal layer 108 generally depends on the device structure to be fabricated. Typically, the Group VIII metal layer 108 (eg, ruthenium) has a thickness of less than about 1000 Ȧ, preferably between about 5 Ȧ and about 200 Ȧ. In one embodiment, Group VIII metal layer 108 is a ruthenium layer having a thickness less than about 100 Ȧ (eg, about 50 Ȧ).

Referring thereafter to FIG. 1C , the void 120 may be filled with copper 110 to realize a copper interconnection. In one embodiment, a noble metal or transition metal layer, such as a ruthenium layer, can be used as a seed layer, and copper is deposited directly onto the seed layer using ECP plating or other copper electroplating techniques. Electrochemical plating solutions for ECP typically include a copper source, an acid source, a chloride ion source, and at least one plating solution additive (ie, leveler, suppressor, accelerator, anti-foaming agent, etc.). For example, the electroplating solution may contain between about 30 g/l and about 60 g/l copper, about 10 g/l to about 50 g/L sulfuric acid, between about 20 ppm and about 100 ppm chloride ions, between about 5 ppm and about 30 ppm addition promoting agent, added inhibitor between about 100 ppm and about 1000 ppm, added level agent between about 1 ml/l and about 6 ml/l. The plating current can range from 2 mA/cm ² to 10 mA/cm ² for filling copper into sub-micron trench and/or via structures. Examples of copper plating chemistries and treatments can be found in commonly assigned U.S. Patent Application No. 10/616,097, filed July 8, 2003, entitled "Multiple-Step Electrodeposition Process For Direct Copper Plating On Barrier Metals," and Found in US Patent Application No. 60/510,190, entitled "Methods And Chemistry For Providing Initial Conformal Electrochemical Deposition Of Copper In Sub-MicroFeatures," filed on March 10. An example of an electrochemical plating (ECP) system and an exemplary plating cell are illustrated below in FIGS. 5-6 .

It has been found that a conventional copper electroplating process using _H2SO4 of 10-50 g/l and a plating current density _of 2-10 mA/ ^cm2 will not produce a continuous thin film (≤1000 Å) of copper deposition on the ruthenium layer. When the plating current density and/or _H2SO4 concentration (or acidity) is increased above the values used for conventional copper plating, a continuous _copper film is formed on the ruthenium layer. The minimum or critical current density (CCD) has been found that when the plating current density is equal to or greater than this value, a continuous copper film will form on the ruthenium layer, and when the plating current density is less than this value, no continuous copper film will be formed on the ruthenium layer. A continuous copper film is formed on it. The size of CCD is greatly related to the acidity of the electroplating solution.

Figure 2 graphically illustrates critical current density (CCD) versus sulfuric acid (H ₂ SO ₄ ) concentration. As shown in Figure 2, CCD is defined as the minimum current density required to form a 1000 Å continuous copper film on a ruthenium surface. At values below the CCD, a visually smooth continuous copper film will not be deposited at the central region of the substrate. While the size of the CCD is strongly correlated with the acidity of the plating bath, the CCD is not correlated with the ruthenium deposition method (whether ALD, CVD, or PVD).

It is well known that the kinetics of nucleation and crystal growth for electrodeposition are closely related to the local electrochemical over-potential at the nucleation/growth site. Overpotential is defined as the difference between the actual potential and the zero current (open circuit) potential. Higher overpotentials promote nucleation of new crystals by reducing the critical nuclei size and increasing nuclei density; whereas lower electrochemical overpotentials promote growth on existing crystallites. Furthermore, sulfur-containing organic additives (e.g., accelerators) in plating solutions are believed to enhance surface diffusion of Cu adatoms and promote crystal growth at the expense of nucleation. A copper adatom is a copper atom that lands on the substrate surface during electroplating or before it is incorporated into the copper layer. Because the plating current density depends on the electrochemical overpotential for a given plating bath, the structure/morphology of the copper deposit is affected by the plating current density. 1000 Ȧ (measured close to the edge of the substrate) with a copper film (the copper film is electroplated on a 100 Ȧ ruthenium film in a plating solution containing 10 g/l sulfuric acid at a plating current of 3 mA/ ^cm In scanning electron microscope (SEM) images taken near the center of the substrate of the copper film), it was found that there were larger grains and poorer film deposition in the central region of the substrate. A 100 Å thick ruthenium film was deposited by PVD. According to the results shown in Fig. 2, when the sulfuric acid concentration is 10 g/l, the CCD is about 40 mA/cm ² . The current density of 3 mA/cm ² is much lower than 40 mA/cm ² (CCD), so a discontinuous layer forms as expected. It has been thought that under these plating conditions, only a few crystallites are stable enough to serve as nucleation centers for further crystal growth, so that the energy from the plating current is mainly used to grow these crystals and to assist the rapid growth of copper adatoms. surface spread. The SEM therefore shows large grains and copper island deposition in the central region of the substrate. To form a continuous copper film over the entire substrate surface under these conditions, the deposited layer would have to be very thick, and this deposited layer would easily contain voids, making it unsuitable for copper interconnect applications. It has been found that using a plating solution containing 60 g/l _H2SO4 and a plating current density of about 10 mA/ ^cm2 (a _CCD slightly lower than 15 mA/ ^cm2 ), it is possible to form a film on ruthenium (which is 100 Å thick and A substrate with a 5000 Å thick continuous copper film deposited by PVD). There are however large voids at the copper/ruthenium interface.

When the plating current was increased to 30 mA/cm ² , the grain density was found to increase near the center of the substrate, and the grain size was found to decrease. But because the plating current is lower than the CCD, a discontinuous copper film is formed on the ruthenium surface. The ruthenium film was 100 A thick and deposited by PVD, as previously described.

Increasing the plating current also has some disadvantages. In general, high plating current densities tend to result in poor gap fill. In general, plating current densities of less than about 10 mA/ ^cm2 have been found to promote bottom-up gap fill. In order to reduce the plating current density to a range suitable for bottom-up gap filling, the concentration of sulfuric acid needs to be increased. When the sulfuric acid concentration was increased to 160 g/l and the plating current was 5 mA/cm ² (which is equivalent to the CCD at this particular acid concentration), a continuous 1000 Å copper film was formed on top of the 100 Å ruthenium film on the substrate . However, cross-sectional SEM images show that voids are formed at the copper/ruthenium interface. When the electroplating current was increased to 10mA/cm ² (twice the CCD of 5mA/cm ² ) and the concentration of sulfuric acid was maintained at 160g/l, a continuous 5000 Ȧ copper film was formed on the 100 Ȧ ruthenium film and at the copper/ruthenium interface There are no holes.

One of the reasons why the CCD depends on the acidity of the bath involves the local electrochemical overpotentials discussed above. Plating solutions with lower acidity have higher electrical resistance. A high CCD is therefore required to overcome the higher electrical resistance in low acidity plating baths.

At the International Meeting of the American Chemical Society, New Orleans, Louisiana, March 23-27, 2003, Chyan et al. of the University of North Texas presented new research showing that ruthenium oxide (RuO2) has metal-like conductivity, And copper also electroplates and adheres strongly to the ruthenium oxide. The high CCD observed on the ruthenium-deposited surface may be the result of oxidation of the ruthenium surface and/or the presence of organic surface contaminants. It has been surmised that "pure" ruthenium surfaces are more active for copper nucleation. The plating current and bath acidity required to form a continuous copper film without voids at the copper/ruthenium interface can be greatly reduced by removing the surface oxide layer or organic surface contaminants through a pretreatment process prior to copper plating. The pretreatment process can expose the substrate surface to reducing agents. Figure 3A shows the pretreatment process flow. In step 301, a substrate with a Group VIII metal (eg, ruthenium) on top is pretreated by a process such as annealing in a reducing gas (eg, hydrogen) to clean the surface of metal oxides or organic contaminants. In step 302, a copper film is electroplated directly onto the pretreated substrate. A possible redox reaction is shown in equation (1) below.

RuO ₂ +2H ₂ -----→Ru+2H ₂ O (1)

The substrate with the 100 A PVD ruthenium film was pretreated by annealing immediately before copper plating. The annealing process is performed at a temperature between room temperature and about 400° C. (and preferably between about 100° C. and about 400° C.) in the presence of a hydrogen-containing gas (eg, forming gas containing 4% hydrogen and 96% nitrogen), The gas flow rate is between about 1 sccm (standard cubic centimeter per minute) to about 20 slm (standard liter per minute), and the condition is carried out at about 5 mTorr to about 1500 Torr for about 2 seconds to about 5 hours. In consideration of manufacturing efficiency, the annealing time is preferably within 1 hour. The purpose of substrate annealing is to reduce the _RuO2 surface to ruthenium and/or to precipitate organic surface contaminants. In one embodiment, a hydrogen-containing gas is mixed with a non-reactive gas (e.g., N _{2 )} or an inert gas (e.g., Ar, He, etc.). For the purpose of leaching out organic surface contaminants, a non-reactive gas for ruthenium can be used. Reactive gases such as _N2 or inert gases such as Ar. The annealing process can be performed in a single wafer rapid thermal annealing chamber available from Applied Materials, Inc., Santa Clara, California, or in a batch furnace conduct.

FIG. 3B illustrates an example of CCD reduction after a ruthenium-deposited substrate was annealed in forming gas at 270° C. for 30 seconds in the annealing chamber as shown in the lower part of FIG. 5 . Curve 311 shows the CCD of copper electroplated on the surface of a ruthenium deposited substrate. Curve 312 shows the reduced CCD of electroplated copper on the surface of a forming gas annealed ruthenium substrate. For example, for a solution containing 10g/l sulfuric acid, the CCD decreases from 40mA/cm ² to 8mA/cm ² , and for a solution containing 100g/l sulfuric acid, the CCD decreases from 10mA/cm ² to 3mA/cm ² . Both curves 311 and 312 show a decrease in CCD with increasing acid concentration. The acid used in the plating solution can be other types of acids such as sulfonic acids (including alkanesulfonic acids). If another acid is used instead of sulfuric acid, the normal acid concentration range should be used.

In the case of forming gas annealing, direct copper plating processes can be operated with similar current densities as conventional copper plating processes. After forming gas annealing, the ruthenium substrate surface tends to become more hydrophilic, as would be expected for a clean and pure ruthenium surface. In order to maintain a large reduction in CCD, the copper plating on the forming gas annealed ruthenium film must be performed within 4 hours, preferably within 2 hours, of the forming gas anneal. If the substrate is exposed to oxygen or other contaminants for too long, the CCD will gradually return to its pre-anneal state due to the reformation of RuO _x or the redeposition of organic surface contaminants from the atmosphere.

The substantial reduction in CCD by annealing with a hydrogen-containing gas is important because the reduction in CCD allows the use of acidic _CuSO baths containing practical acid concentrations ranging from about 10 g/l to about 300 g/l, suitable for Current density for gap filling of submicron trench/via structures to deposit copper films.

In one example, for 1000 Å deposited on annealed 80 Å ALD ruthenium using a plating solution containing 100 g/l sulfuric acid concentration and a plating current density (PCD) of 3 mA/ ^cm Copper film, on which SEM images were taken showed a continuous copper film deposited with no voids between the copper/ruthenium interface. The absence of voids at the copper/ruthenium interface indicates good copper (Cu) and ruthenium interface integrity and good adhesion of copper on the annealed ruthenium surface. In a second example, for a 1000 A copper film deposited on annealed 80 ALD ruthenium using a plating solution containing a sulfuric acid concentration of 100 g/l and a plating current density of 4.5 mA/ ^cm (or PCD/CCD = 1.5), SEM images taken of it also showed the deposition of a continuous copper layer with no voids between the copper/ruthenium interface. Similarly, a plating current density of 7.5 mA/cm ² (or PCD/CCD = 2.5) also achieved a continuous copper film with no voids between the copper/ruthenium interface. These results indicate that the gas annealing pretreatment reduces the plating current density and improves the adhesion and integrity of the Ru/Cu interface.

When copper was deposited on the forming gas annealed Ru surface, the Ru/Cu interface showed good void-free integrity even when PCD/CCD was equal to 1. In contrast, when electroplated with CCD (or PCD/CCD=1), the interface between copper and the unannealed ruthenium surface will produce interfacial voids as described above. A clean ruthenium surface allows better copper nucleation and deposition, and thus improves interfacial integrity.

Another advantage of pretreating the Group VIII metal surface with a hydrogen-containing gas anneal is improved adhesion between copper and the Group VIII metal. Experimental results show better adhesion between copper and pretreated, clean and possibly oxidation-free ruthenium surfaces because of good copper/ruthenium interfacial integrity (no voids). Good interfacial integrity between the copper and ruthenium layers is a very important aspect in forming reliable semiconductor devices. Apparently, a pretreated Ru surface is critical for the formation of high-quality Cu on Ru films.

Another aspect of the electroplating of copper onto forming gas annealed ruthenium surfaces is the coverage of the entire substrate surface by the electroplated copper film due to the increased hydrophilicity as described above. Step coverage of copper plating on substrate features is also improved because the annealed ruthenium surface is more hydrophilic and better able to draw the plating solution deeper into the features. Figure 4 shows a SEM of excellent gap-fill of electroplated copper on an annealed ruthenium surface in a 0.14 μm × 0.8 μm trench. The deposited ruthenium was 80A ALD ruthenium. The pretreatment was a forming gas anneal at 300°C for 3 minutes. The copper electroplating current was 10 mA/cm ² for the first 100 Å, and 5 mA/cm ² for the remaining 1900 Å.

The annealing treatment can be performed in an integrated annealing chamber (such as the annealing chamber 535 shown in FIG. 5 ) or in a separate annealing system. The annealing process can be performed in a single wafer chamber or in a batch furnace.

In addition to annealing with a hydrogen-containing gas, the pretreatment of the Group VIII metal surface before direct copper plating can also be accomplished by other methods. An example of other pretreatment methods is cathodic treatment in an acid solution free of copper ions. The surface _RuOx layer can be cathodically reduced, while weakly bound organic surface contaminants can be expelled from the surface by cathodic polarization. Equation (2) below shows one possible reduction reaction. Cathodic treatment may be performed in an integrated unit similar to the copper electroplating unit described below with reference to FIG. 6, or in a processing unit separate from the copper electroplating system. The cathodic treatment unit requires an anode, a cathode, and an acid bath free of copper ions. The acid concentration range should be between about 10 g/l and about 100 g/l, and preferably between about 10 g/l and about 50 g/l. A preferred acid is _H2SO4 , but other types of acidic solutions may also be used, such as _organic sulfonic acid solutions (eg methanesulfonic acid). Acidic baths need to be copper-free to avoid copper deposition on ruthenium during cathodic processing, which undesirably nucleates copper islands.

RuO ₂ +4H ^* +4e ^- ----->Ru+2H ₂ O (2)

Cathodic treatment can be achieved by potential control or current control. For the potential control scheme, a reference electrode is required to monitor the wafer potential in addition to the working electrode, which is a thin deposited ruthenium layer on the wafer surface, and the anode. A preferred reference electrode is a thin copper wire placed close to the substrate surface. Potential control can be achieved by a potentiostat. The controlled ruthenium electrode potential is in the range of about 0 volts to about -0.5 volts relative to the copper reference potential. In addition to the reduction of _RuOx to Ru, _H evolution can occur on the Ru film surface. For the current control scheme, a cathodic current is passed between the ruthenium deposited substrate and the anode. The current density should be in the range of about 0.05 mA/cm ² to about 1 mA/cm ² . The treatment time should be in the range of about 2 seconds to about 30 minutes. However, for throughput considerations, the processing time is preferably kept below 5 minutes.

Experimental results and discussions related to ruthenium are used as examples only. The concepts of the present invention can be applied to other Group VIII metals such as rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), and platinum (Pt).

Copper electroplating can be performed in cells on an Electra Cu ECP(R) system or a SlimCell Copper Plating System, both available from Applied Materials, Inc., Santa Clara, CA. FIG. 5 illustrates a top view of a SlimCell copper electroplating system 500 . The ECP system 500 includes a factory interface (FI) 530, which is also generally referred to as a substrate loader. The factory interface 530 includes a plurality of substrate loading stations configured to engage with a substrate holding cassette 534 . Robot 532 is located in factory interface 530 and is configured to access substrates contained in cassette 534 . Additionally, manipulator 532 also extends into connection channel 515 , which connects factory interface 530 to processing mainframe or platform 513 . The location of the robot 532 allows the robot to access a substrate cassette 534 to remove a substrate therefrom and deliver the substrate to one of the processing units 514 , 516 located on the main frame 513 , or optionally to an anneal station 535 . Similarly, the robot arm 532 may be used to remove the substrate from the processing units 514, 516, or the anneal station 535 after the substrate processing sequence is complete. In this condition, robot 532 may deliver the substrate back to cassette 534 for removal from system 500 .

The anneal station 535, which will be described in more detail below, generally includes a two-position anneal chamber in which a cooling plate/position 536 is positioned adjacent to a heating plate/position 537 and has a substrate transfer robot 540 located adjacent thereto (e.g., between two between stations). A robot 540 is generally configured to move a substrate between each heating plate 537 and cooling plate 536 . Furthermore, while the anneal chamber 535 is illustrated as being positioned such that the anneal chamber 535 is accessible from the connection channel 515, embodiments of the invention are not limited to any particular configuration or arrangement. In one embodiment, anneal station 535 may be positioned in direct communication with main frame 513 , ie, accessible by main frame robot 520 . For example, as shown in FIG. 5 , anneal station 535 is positioned in direct communication with connection channel 515 allowing access to main frame 513 , and thus, anneal chamber 535 is illustrated as communicating with main frame 513 . Details of a suitable anneal chamber are described in US Patent Application Serial No. 60/463,860, filed April 18, 2003, entitled "Two Position Anneal Chamber."

In one embodiment, the annealing process is performed in an integral annealing chamber, such as annealing chamber 535 shown in FIG. 5 . In another embodiment, the annealing process is performed in a separate annealing system. In other embodiments, the annealing process is performed in a single wafer chamber or a batch furnace.

As noted above, the ECP system 500 also includes a processing mainframe 513 with a centrally located substrate transfer robot 520 thereon. The robot 520 generally includes one or more arms/plates 522, 524 configured to support and transport substrates thereon. Additionally, the manipulator 520 and attached pallets 522, 524 are generally configured to be extendable, rotational, and vertically movable such that the manipulator 520 can insert and remove substrates into and out of the plurality of processing locations 502, 504, 506, 508 on the main frame 513 , 510, 512, 514, 516. Similarly, the factory interface robot 532 also includes the ability to extend, rotate and vertically move its substrate support platen while also allowing linear travel along the robot track extending from the factory interface 530 to the main frame 513 . In general, processing locations 502, 504, 506, 508, 510, 512, 514, 516 may be any number of processing units utilized in an electrochemical plating platform. More specifically, the processing station can be configured as an electrochemical plating unit, a cleaning unit, a bevel cleaning unit, a spin cleaning drying unit, a substrate surface cleaning unit (which integrally includes cleaning, rinsing, and etching units), an electroless plating unit, a metering unit, etc. An inspection station, and/or any other processing unit that may be advantageously used in conjunction with an electroplating platform. Each of the various processing units and manipulators typically communicates with a processing controller 511, which may be a microprocessor-based control system configured to receive input from a user and/or from various sensors located on the system 500, The operation of the system 500 is appropriately controlled according to the input.

FIG. 6 illustrates a partial cutaway perspective view of an electroplating chamber 600 that may be implemented at the processing locations 502 , 504 , 506 , 508 , 510 , 512 , 514 , 516 of FIG. 5 . The electrochemical plating cell 600 generally includes an outer basin 601 and an inner basin 602 positioned within the outer basin 601 . The inner basin 602 is generally configured to contain an electroplating solution, which is used to plate a metal, such as copper, onto a substrate during an electrochemical plating process. During the electroplating process, the electroplating solution is typically continuously supplied to the inner basin 602 (e.g., about 1 gallon per minute for a 10-liter electroplating unit), and thus continuously overflows the electroplating solution over the uppermost point of the inner basin 602 (typically referred to as the "weir") and is collected by the outer basin 601 for discharge therefrom for chemical treatment and recirculation. The electroplating cell 600 is typically positioned at an inclination, i.e., the frame portion 603 of the electroplating cell 600 is typically elevated on one side such that the components of the electroplating cell 600 are inclined between about 3° and about 30°, or typically between about 4° and about 30° for optimal results. between 10°. The frame member 603 of the plating unit 600 supports the ring-shaped base member at its upper portion. Because the frame member 603 is raised on one side, the upper surface of the base member 604 is generally inclined at an angle relative to horizontal, which corresponds to the angle of the frame member 603 relative to the horizontal. Base member 604 includes an annular or disk-shaped recess formed in a central portion thereof, the annular recess configured to receive a disk-shaped anode member 605 . Base member 604 also includes a plurality of fluid inlets/outlets 609 extending from its lower surface. Each of the fluid inlets/outlets 609 is generally configured to individually supply or discharge fluid to either the anode compartment or the cathode compartment of the electroplating cell 600 . The anode member 605 generally includes a plurality of slots 607 formed therethrough, wherein the slots 607 are generally positioned to be oriented parallel to each other over the surface of the anode assembly 605 . The parallel orientation allows the thick fluid generated at the anode surface to flow down across the anode surface and into one of the slots 607 . Electroplating cell 600 also includes membrane support assembly 606 . Membrane support assembly 606 is generally secured to base member 604 at its outer perimeter and includes an interior region configured to allow fluid to pass therethrough. Membrane 608 stretches over support 606 and operates to fluidly separate the catholyte and anolyte chambers of the plating cell. Membrane support assembly 606 may include an O-ring type seal located near the perimeter of the membrane, wherein the seal is configured to prevent fluid flow from one side of the membrane secured to membrane support 606 to the other side of the membrane. A diffuser plate 610, typically a porous ceramic disc member and configured to create a substantially laminar or uniform flow of fluid in the direction of the plated substrate, is positioned in the cell between the membrane 608 and the plated substrate. Commonly assigned U.S. Patent Application No. 10/268,284, entitled "Electrochemical Processing Cell," filed October 9, 2002, claiming priority to U.S. Provisional Patent Application No. 60/398,345, filed July 24, 2002 This exemplary plating cell is further explained in , both of which are hereby incorporated by reference in their entirety.

While a few preferred embodiments incorporating the teachings of the present invention have been shown and described in detail, those skilled in the art can readily devise many other modified embodiments that still incorporate these teachings.

Claims (as amended under Article 19 of the Treaty)

1. A method of direct electroplating copper on a substrate, said substrate comprising a metal barrier layer arranged on the surface of the substrate, said method comprising the steps of:

pretreating the substrate surface to remove a metal oxide layer from the metal barrier layer and reduce critical current density through the metal barrier layer during copper electroplating; and

A continuous and void-free layer of copper is plated on the pretreated surface of the substrate during the copper electroplating, wherein the acidic electroplating bath has an electroplating current density equal to or greater than the critical current density.

2. The method of claim 1, wherein the metal barrier layer comprises a metal selected from the group consisting of ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), and platinum (Pt).

3. The method of claim 2, wherein the metal barrier layer has a thickness of less than about 1000 Ȧ.

4. The method of claim 1, wherein the copper electroplating is performed within 4 hours of the pretreatment.

5. The method of claim 1, wherein the critical current density decreases with increasing acidity of the electroplating bath.

6. The method of claim 1, wherein the acidity in the acidic electroplating bath is derived from sulfuric acid having a concentration of about 10 g/l to about 300 g/l.

7. The method of claim 1, wherein the critical current density is less than about 10 mA/ ^cm2 .

8. The method of claim 1, wherein the preprocessing comprises annealing the substrate in a processing chamber containing an annealing gas.

9. The method of claim 8, wherein the annealing gas is introduced into the process chamber at a flow rate in the range of about 1 standard cubic centimeter per minute to about 20 standard liters per minute.

10. The method of claim 8, wherein the annealing gas is heated to a temperature in the range of about 100°C to about 400°C.

11. The method of claim 8, wherein the annealing gas is pressurized to a pressure in the range of about 5 mTorr to about 1500 Torr.

12. The method of claim 8, wherein the annealing is for a duration in the range of about 2 seconds to about 1 hour.

13. The method of claim 1, wherein the annealing lasts less than about 1 hour.

14. The method of claim 1, wherein the preprocessing is performed in an integrated single wafer anneal chamber.

15. The method of claim 1, wherein the pretreatment comprises cathodic treatment comprising exposing the substrate to an acid-containing bath.

16. The method of claim 15, wherein the acid-containing bath has an acid concentration of from about 10 g/l to about 100 g/l.

17. The method of claim 16, wherein the potential is in the range of about 0 volts to about −0.5 volts or the current density is in the range of about 0.05 mA/ ^cm to about 1 mA/ ^cm . The cathodic treatment.

18. The method of claim 15, wherein the acid-containing bath comprises sulfuric acid.

19. The method of claim 16, wherein the acid concentration is in the range between 10 g/l to about 50 g/l.

Claims (20)

1. the method for a Direct Electroplating copper on substrate, described substrate has the VIII family metal level on substrate surface, said method comprising the steps of:

The described substrate surface of pre-treatment is to remove VIII family oxidation on metal surface thing layer and/or the organic surface contaminant on the described substrate surface, the critical current density during reducing to electroplate; With

To continuously and not have empty copper layer with the electroplating current that is equal to or greater than described critical current density in the acid electroplating body lotion is plated on the pretreated described substrate surface.

2. the method for claim 1, wherein said VIII family metal is selected from the group that following metal is formed: ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir) and platinum (Pt).

3. the method for claim 1, the thickness of wherein said VIII family metal is less than about 1000 .

4. the method for claim 1 is wherein carried out described copper and is electroplated in 4 hours after described pre-treatment.

5. the method for claim 1, wherein said critical current density reduces along with the increase of the acidity of described plating bath.

6. the method for claim 1, the acidity in the wherein said acid electroplating body lotion is from having the sulfuric acid of about 10g/l to about 300g/l concentration.

7. the method for claim 1, wherein said critical current density is less than 10mA/cm ²

8. the method for claim 1, wherein by with described substrate have hydrogen-containing gas and/or with the environment of nonreactive one or more gases of VIII family metal in annealing finish the step of the described substrate of pre-treatment.

9. method as claimed in claim 8, the flow rate of wherein said gas at about 1 standard cubic centimeter per minute to about 20 standard Liter Per Minutes.

10. described annealing wherein takes place with the temperature between about 100 ℃ to about 400 ℃ in method as claimed in claim 8.

11. described annealing wherein takes place with the pressure of about 5mTorr between about 1500Torr in method as claimed in claim 8.

12. method as claimed in claim 8, wherein said annealing have the time length between about 2 seconds to about 1 hour.

13. the method for claim 1, wherein the described substrate of pre-treatment is shorter than about 1 hour.

14. the method for claim 1 is wherein carried out described pre-treatment in the single wafer annealing chamber of one.

15. the method for claim 1 is wherein finished the step of the described substrate of pre-treatment by the cathode treatment in containing acid bath liquid.

16. method as claimed in claim 15, the wherein said acid bath liquid that contains has the acid concentration of about 10g/l to about 100g/l.

17. method as claimed in claim 16, wherein with about 0 volt to about-0.5 volt the scope current potential or with at about 0.05mA/cm ²To about 1mA/cm ²Scope in current density carry out described cathode treatment.

18. method as claimed in claim 15, the wherein said acid bath liquid that contains comprises sulfuric acid.

19. method as claimed in claim 16, wherein said acid concentration is in the scope of 10g/l between about 50g/l.

20. the method for claim 1, the copper-plated initial electroplating current that wherein powers in pre-treatment VIII family metallic surface equals described critical current density at least.

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