CN1549624A

CN1549624A - Apparatus for transmitting signals in base station signal receiving and transmitting station

Info

Publication number: CN1549624A
Application number: CNA031134890A
Authority: CN
Inventors: 徐大河; 钟爽莉
Original assignee: ZTE Corp Nanjing Branch
Current assignee: Global Innovation Polymerization LLC
Priority date: 2003-05-15
Filing date: 2003-05-15
Publication date: 2004-11-24
Anticipated expiration: 2023-05-15
Also published as: CN1298185C

Abstract

The system comprises data transmission unit which consists of multiplexing and demultiplexing module (MDM) as well as exchanging module for both of mainstander and substander as series data is converted to be 64K integer data by mainstander MDM and to gether with PCM signal being integrated on a 2M link also O and M link being restored to be multipath serial data of nontime division multiplexing at substander; clock unit which consists of clock module (CM) for both mainstander and substander as each frame clock phase generated by substander CM is aligned with frame clock synchronous signal generated by mainstander CM.

Description

The base station receiving-transmitting signal transmitting device

Technical field

The present invention relates to field of mobile communication, relate in particular to the signal transmitting apparatus of base station system.

Background technology

In the base station of mobile communcations system,, a plurality of BTS (Base Transceivet Station, base transceiver station) frame and frame are used often according to the configuration of base station type or the needs of base station capacity.Between mainframe and secondary frame, need to connect a large amount of clock lines and data wire, thus make cable connect in the cabling complexity, make mistakes easily, reduce the reliability of system.

For addressing the above problem, the settling mode that generally adopts is with clock signal, PCM (Pulse CodeModulation, pulse code modulation) signal and O﹠amp at present; M (Operation ﹠amp; Maintenance, operation and maintenance) link signal is connected with each transceiver unit respectively, and the signal of this kind mode is not concentrated, and needs one group of O﹠amp between mainframe and the secondary frame; M link, six groups of clock signals and six groups of PCM signals, connection cable is very many.The another kind of mode that adopts is to use the trunk interface plate at present, with O﹠amp; M signal, clock signal, PCM signal are transferred to secondary frame for each one group, through behind the secondary frame interface board, by backboard and Internal cable various types of signal are assigned to each transceiver unit again.Compare with first kind of settling mode, the second way has obtained simplification to a certain degree.But because the signal demand differential transfer in one group of clock signal, generally comprises clock signal more than four kinds, one group of O﹠amp; The M signal also comprises multiple O﹠amp; The M signal makes the transmission cable that still needs between mainframe and the secondary frame to connect nearly surplus in the of 20.It is complicated also to exist cable to connect, and install and produce and maintenance inconvenience, and the low shortcoming of reliability.

Summary of the invention

The objective of the invention is to overcome the cable that exists in the prior art connects complicated, install and produce and safeguard inconvenience, and the low shortcoming of reliability, connect, be convenient to install production and maintenance, base station receiving-transmitting signal R-T unit that reliability is high to propose a kind of cable of simplifying.

For achieving the above object, the present invention has constructed a kind of base station receiving-transmitting signal R-T unit, it is characterized in that, comprise data transmission unit and clock transfer unit (operating maintenance module is included in the data transmission unit, and frequency division and frequency division are phase-locked to be included in the clock transfer unit);

Described data transmission unit also comprise mainframe multiplexing with demultiplexing module, mainframe Switching Module, secondary frame is multiplexing with demultiplexing module and secondary frame Switching Module, described mainframe multiplexing with demultiplexing module with O﹠amp; The serial data of M link converts time-multiplexed 64K integer multiple data on the 2M link to, is combined on the 2M link by described mainframe Switching Module with the PCM signal then; Arrive after the secondary frame by described secondary frame Switching Module time-multiplexed O﹠amp; Handle O﹠amp on a M link and PCM handshaking to two data flow respectively; The M link is reduced into non-time-multiplexed multi-path serial data by described secondary frame is multiplexing with demultiplexing module.

Described clock transfer unit also comprises mainframe clock module and secondary frame clock module, described mainframe clock module produces a frame clock sync signal, and each frame clock phase that described secondary frame clock module is produced aligns with the frame clock sync signal that described mainframe clock module is sent.

The frame clock sync signal that described mainframe clock source module produces sends described secondary frame clock source module to by differential driving.

The present invention is by distinguishing data transmission unit and clock transfer unit, greatly simplified the transmission of data and clock, only need two pairs of transmission lines can satisfy system requirements, thereby further improved the reliability of whole system, simplified the installation production and the maintenance of equipment.

Description of drawings

Fig. 1 is a base station receiving-transmitting signal R-T unit structure chart of the present invention;

Fig. 2 is major-minor frame multichannel data clock line transmission structure figure;

Fig. 3 is the major-minor frame single channel data clock line transmission structure figure as one embodiment of the invention;

Fig. 4 is non-time division multiplexing synchronous serial data schematic diagram;

Fig. 5 is a time division multiplexing synchronous serial data schematic diagram.

Embodiment

The invention will be further described below in conjunction with the drawings and specific embodiments.

In base transceiver station R-T unit of the present invention shown in Figure 1, two parts in data transmission unit and clock transfer unit have been comprised.In data transmission unit, the PCM signal is a time multiplexing signal, takies several 64K time slots on the 2M link.O﹠amp; The M signal adopts the synchronous serial communication mode usually, non-time division multiplexing.By Multiplexing module the data that serial data converts time-multiplexed 64K integral multiple on the 2M link to are passed through crosspoint with the PCM signal then, be combined on the 2M link.Have only a data wire to be sent to secondary frame like this by mainframe.After the secondary frame by Switching Module with time-multiplexed O﹠amp; Handle O﹠amp on a M link and PCM handshaking to two data flow respectively; The M link is reduced into non-time-multiplexed multi-path serial data by demultiplexing module.Data from secondary frame to mainframe are handled too.Only need a pair of with the upper type data line.

For the clock transfer unit, need to transmit many groups clock that the different clocks source produces between the major-minor frame, as serial link clock, wireless mouthful of clock etc., every group of clock generally comprises bit clock, frame clock again.Can on the major-minor frame, dispose identical clock source module respectively, guarantee the various bit clock unanimities of major-minor frame.Need mainframe to produce a synchronizing signal for the frame clock, the phase place of each frame clock of secondary frame is alignd with mainframe.This synchronizing signal sends secondary frame to by differential driving.Each frame clock of major-minor frame just can satisfy same frequency, synchronous requirement, finishes correct transfer of data.Also only need a pair of with upper type clock transfer line.

Fig. 2 has described data clock transmission structure between a kind of major-minor frame of common employing, is divided into two parts of transfer of data and clock transfer.Tcp data segment comprises O﹠amp; M link, PCM link.O﹠amp; M chain route operating maintenance module is sent, and is the control channel that is connected to each module of major-minor frame, because various module requires difference, needs multilink usually.The PCM link is divided into two links of uplink and downlink, transmission data and signaling.Uply sent by portable terminal, the base station transceiver unit receives, and after signaling process and data decode, to operating maintenance module, is sent to base station controller (BSC, Base StationController) by the PCM link transmission then; Downstream signal sends to operating maintenance module by BSC, after the PCM link transmission arrives each transceiver unit of major-minor frame, passes through signaling process and digital coding, modulation again, is handed down to portable terminal.Various Operation and Maintenance signals, PCM signal transmit respectively in this mode, do not process.Clock transfer is made up of many groups clock chain circuit.Produce basic clock by the clock source, pass through frequency division module (frame clock and bit clock that the generation system needs then.The clock request of major-minor frame will be with frequency, homophase, and therefore each be overlapped clock is sent to secondary frame by mainframe.The clock signal that this mode transmits is a lot, also needs to carry out the frequency division processing after secondary frame, obtains a greater variety of clocks, is assigned to each module use in the frame at last.

Fig. 3 is the major-minor frame single channel data clock transmission block diagram as one embodiment of the invention, also is made up of transfer of data and clock transfer two parts.Tcp data segment relates generally to multiplexing and demultiplexing module and Switching Module.The O﹠amp that operating maintenance module is sent; The M signal at first enters in multiplexing and the demultiplexing module.According to O﹠amp; M signal type difference is divided into three kinds of modes and handles:

1, O﹠amp; The M signal is non-time division multiplexing synchronous serial data.As shown in Figure 4, RTCLK is the bit clock of data transmit-receive, and RXD/TXD is a serial data.Can be transformed into the time division multiplexing synchronous serial data by logical design, as shown in Figure 5, FCLK is the frame clock, and BCLK is a bit clock.If the link of 2M, the data after the conversion can be placed on the optional position of 1 to 32 passage.

2, O﹠amp; The M signal is an asynchronous serial data.Can be that the clock of 64K integral multiple is sampled with frequency, and guarantee sampling clock frequency 2 times, just can correctly convert time-multiplexed synchronous serial data to greater than data rate.

3, O﹠amp; The M signal is the time division multiplexing synchronous serial data, and main control unit directly has the ability of handling the time division multiplexing serial data simultaneously.O﹠amp then; The M link need not be handled by multiplexing and demultiplexing, directly can adopt time division multiplexing synchronous serial communication mode.

Switching Module is finished reconfiguring of passage in the multiplex data stream.Can realize by special chip.O﹠amp after the conversion; M signal and PCM signal merge on the link and are sent to secondary frame by mainframe through after reconfiguring.The original form that returns to each bar link through exchange, demultiplexing in secondary frame re-sends to each module in the frame.

For the clock transfer part, the basic clock that is produced by the clock source is input to the synchronizing signal frequency division module, produces the synchronised clock that the major-minor frame needs.The production method of this clock is the least common multiple of calculating each frame clock cycle, and this least common multiple is exactly the cycle of synchronizing signal.Like this each frame clock can self of integral multiple in cycle constantly by this synchronizing signal zero clearing, realize major-minor frame frame clock same-phase.This synchronizing signal is a clock pulse signal, though use differential signal transmission between the major-minor frame, also might introduce interference.For anti-interference, pulse duration can be provided with wideer, can make deburring simultaneously in the frequency division module earlier and handle before of this signal.Frequency division module utilizes clock source output clock and synchronizing signal to produce various frame clocks and bit clock.Some frequency division module has phase-locked function, needs the reference source of characteristic frequency, reference source can be offered institute's ring mutually again with synchronizing signal synchronously, can guarantee that like this clock and the system clock of phase-locked loop output has definite phase relation.

Claims

1, a kind of base station receiving-transmitting signal R-T unit is characterized in that, comprises data transmission unit and clock transfer unit;

Described data transmission unit also comprise mainframe multiplexing with demultiplexing module, mainframe Switching Module, secondary frame is multiplexing with demultiplexing module and secondary frame Switching Module, described mainframe multiplexing with demultiplexing module with O﹠amp; The serial data of M link converts time-multiplexed 64K integer multiple data on the 2M link to, is combined on the 2M link by described mainframe Switching Module with the PCM signal then; Arrive after the secondary frame by described secondary frame Switching Module time-multiplexed O﹠amp; Handle O﹠amp on a M link and PCM handshaking to two data flow respectively; The M link is reduced into non-time-multiplexed multi-path serial data by described secondary frame is multiplexing with demultiplexing module;

2, base station receiving-transmitting signal R-T unit according to claim 1 is characterized in that, the frame clock sync signal that described mainframe clock source module produces sends described secondary frame clock source module to by the differential driving mode.

3, base station receiving-transmitting signal R-T unit according to claim 1 is characterized in that, in the described data transmission unit, the PCM signal adopts time multiplexing signal, O﹠amp; The M signal adopts the synchronous serial communication mode.

4. base station receiving-transmitting signal R-T unit according to claim 1 is characterized in that, in the described data transmission unit, and O﹠amp; The M signal is time division multiplexing synchronous serial data, non-time division multiplexing synchronous serial data or asynchronous serial data.

5, base station receiving-transmitting signal R-T unit according to claim 1, it is characterized in that, described mainframe clock module and secondary frame clock module comprise clock source and frequency division module respectively, described clock source produces basic clock, then the frame clock and the bit clock of the described frequency division module generation of process system needs.