CN1298185C - Apparatus for transmitting signals in base station signal receiving and transmitting station - Google Patents

Abstract

The present invention discloses a signal receiving and transmitting device of a base transceiver station in the field of mobile communication, which comprises a data transmission unit and a clock transmission unit, wherein the data transmission unit also comprises a main frame multiplexing and demultiplexing module and a switching module and an auxiliary frame multiplexing and demultiplexing module and a switching module. The main frame multiplexing and demultiplexing module converts serial data into 64K integer multiple data which is combined with PCM signals onto a strip of 2M chain circuit; after the data arrives at an auxiliary frame, an O&M chain circuit and the PCM signals are processed respectively, and the O&M chain circuit is reduced to multipath serial data for nontime division multiplexing. The clock transmission unit also comprises a main frame clock module and an auxiliary frame clock module, and each frame clock phase generated by the auxiliary frame clock module aligns the frame clock synchronization signal generated by the main frame clock module. The present invention can simplify the transmission of data and clock, system requirements can be satisfied only by two pairs of transmission lines, thereby, the reliability of the overall system is further enhanced, the installation production and the maintenance of equipment are simplified.

Description

Base transceiver station signal transmission device

technical field

The invention relates to the field of mobile communication, in particular to a signal transmission device of a base station system.

Background technique

In the base station of the mobile communication system, multiple BTS (Base Transceiver Station, base transceiver station) racks are often used in parallel according to the configuration of the base station type or the capacity of the base station. A large number of clock lines and data lines need to be connected between the main rack and the sub-rack, which makes the routing of the cable connections complicated, prone to errors, and reduces the reliability of the system.

In order to solve the above problems, the solution commonly used at present is to connect the clock signal, PCM (Pulse Code Modulation, pulse code modulation) signal and O&M (Operation & Maintenance, operation and maintenance) link signal to each transceiver unit , the signals in this way are not concentrated, and a set of O&M links, six sets of clock signals and six sets of PCM signals are required between the main frame and the sub-rack, and there are a lot of connecting cables. Another method currently used is to use a relay interface board to transmit O&M signals, clock signals, and PCM signals to the sub-rack in groups. Class signals are distributed to each transceiver unit. Compared with the first solution, the second way has been simplified to a certain extent. However, since signals need differential transmission, a set of clock signals generally includes more than four clock signals, and a set of O&M signals also includes a variety of O&M signals, so that there are still more than 20 connections between the main rack and the sub rack. strips of transmission cables. There are also disadvantages of complicated cable connection, inconvenient installation, production and maintenance, and low reliability.

Contents of the invention

The purpose of the present invention is to overcome the shortcomings of complicated cable connection, inconvenient installation, production and maintenance, and low reliability in the prior art, so as to propose a base station that simplifies cable connection, is convenient for installation, production and maintenance, and has high reliability Transceiver station signal transceiver device.

In order to achieve the above object, the present invention constructs a base transceiver station signal transceiving device, which is characterized in that it comprises a data transmission unit and a clock transmission unit (the operation and maintenance module is included in the data transmission unit, and frequency division and frequency division phase-locking include in the clock transfer unit);

The data transmission unit also includes a main frame multiplexing and demultiplexing module, a main frame switching module, a secondary frame multiplexing and demultiplexing module, and a secondary frame switching module, and the main frame multiplexing and demultiplexing module Convert the serial data of the O&M link into 64K integral multiple data of time division multiplexing on the 2M link, and then combine it with the PCM signal to a 2M link through the main rack switching module; after reaching the sub rack, pass the The sub-rack switching module switches the time-division multiplexed O&M link and PCM signal to two data streams for separate processing, and the O&M link is restored to a non-time-division multiplexed multiplexed signal through the sub-rack multiplexing and demultiplexing module. serial data.

The clock transmission unit also includes a main rack clock source module and a sub-rack clock source module, the main rack clock source module generates a frame clock synchronization signal, and the phases of each frame clock generated by the sub-rack clock source module and The frame clock synchronization signals sent by the main frame clock source module are aligned.

The frame clock synchronization signal generated by the clock source module of the main rack is transmitted to the clock source module of the sub-rack through a differential drive.

The present invention greatly simplifies the transmission of data and clock by distinguishing the data transmission unit and the clock transmission unit, and only two pairs of transmission lines are needed to meet the system requirements, thereby further improving the reliability of the entire system and simplifying the installation and production of equipment and maintain.

Description of drawings

Fig. 1 is a structural diagram of the base station transceiver station signal transceiver device of the present invention;

Figure 2 is a structural diagram of the multi-channel data clock line transmission of the main and auxiliary racks;

Fig. 3 is a main and sub-rack single data clock line transmission structure diagram as an embodiment of the present invention;

Fig. 4 is a schematic diagram of non-time division multiplexing synchronous serial data;

FIG. 5 is a schematic diagram of time-division multiplexed synchronous serial data.

Detailed ways

The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

In the transceiver device of the base transceiver station of the present invention shown in FIG. 1 , two parts are included: a data transmission unit and a clock transmission unit. In the data transmission unit, the PCM signal is a time-division multiplexing signal, occupying several 64K time slots on the 2M link. O&M signals usually use synchronous serial communication, not time division multiplexing. The serial data is converted into 64K integral times of time-division multiplexed data on the 2M link through the multiplexing module, and then combined with the PCM signal to a 2M link through the switching unit. In this way, only one data line is transmitted from the main rack to the sub rack. After reaching the sub-rack, the time-division multiplexed O&M link and PCM signal are switched to two data streams for separate processing through the switching module, and the O&M link is restored to non-time-division multiplexed multiple serial data through the demultiplexing module. Data from the sub-rack to the main rack is also handled in the same way. Only one pair of data transmission lines is required in the above methods.

For the clock transmission unit, multiple groups of clocks generated by different clock sources need to be transmitted between the main and sub-racks, such as serial link clocks, wireless port clocks, etc., and each group of clocks generally includes bit clocks and frame clocks. The same clock source modules can be configured on the main and auxiliary racks respectively to ensure that the various bit clocks of the main and auxiliary racks are consistent. For the frame clock, the main rack needs to generate a synchronization signal to align the phases of the frame clocks of the sub-rack with the main rack. This sync signal is sent to the sub-rack via a differential drive. Each frame clock of the main and auxiliary racks can meet the requirements of the same frequency and the same phase, and complete the correct data transmission. Only one pair of clock transmission lines is needed in the above manner.

Figure 2 describes a commonly used data and clock transmission structure between the primary and secondary racks, which is divided into two parts: data transmission and clock transmission. The data transmission part includes O&M link and PCM link. The O&M link is sent by the operation and maintenance module and is a control channel connected to each module of the main and auxiliary racks. Due to the different requirements of various modules, multiple links are usually required. The PCM link is divided into two links, the uplink and the downlink, to transmit data and signaling. The uplink is sent by the mobile terminal and received by the base station transceiver unit. After signaling processing and data decoding, it is transmitted to the operation and maintenance module through the PCM link, and then sent to the base station controller (BSC, Base Station Controller); the downlink signal is sent by the BSC to The operation and maintenance module is transmitted to each transceiver unit of the main and auxiliary racks through the PCM link, and then sent to the mobile terminal after signaling processing, data encoding and modulation. In this mode, various operation and maintenance signals and PCM signals are transmitted separately without processing. Clock transport consists of sets of clock chains. The basic clock is generated by the clock source, and then passed through the frequency division module (to generate the frame clock and bit clock required by the system. The clocks of the main and sub-racks are required to have the same frequency and phase, so each set of clocks must be transmitted from the main rack to the sub-rack There are a lot of clock signals transmitted in this way, and after reaching the sub-rack, frequency division processing is required to obtain more types of clocks, which are finally distributed to each module in the rack for use.

Fig. 3 is a block diagram of the single-channel data and clock transmission of the main and sub-racks as an embodiment of the present invention, which is also composed of two parts: data transmission and clock transmission. The data transmission part mainly involves multiplexing and demultiplexing modules and switching modules. The O&M signal sent by the operation and maintenance module first enters the multiplexing and demultiplexing module. According to the different types of O&M signals, there are three ways to deal with them:

1. The O&M signal is non-time division multiplexed synchronous serial data. As shown in Figure 4, RTCLK is the bit clock for data transmission and reception, and RXD/TXD is serial data. It can be converted into time-division multiplexing synchronous serial data through logic design, as shown in Figure 5, FCLK is the frame clock, and BCLK is the bit clock. If it is a 2M link, the transformed data can be placed anywhere from 1 to 32 channels.

2. The O&M signal is asynchronous serial data. Can be sampled with a clock whose frequency is an integer multiple of 64K, and ensure that the sampling clock frequency is greater than 2 times the data rate, and then it can be correctly converted into time-division multiplexed synchronous serial data.

3. The O&M signal is time-division multiplexed synchronous serial data, and the main control unit directly has the ability to process time-division multiplexed serial data. Then the O&M link does not need multiplexing and demultiplexing processing, and can directly adopt the synchronous serial communication mode of time division multiplexing.

The switch module completes the recombination of channels in multiple data streams. It can be realized by a dedicated chip. After the converted O&M signal and PCM signal are recombined, they are merged into one link and transmitted from the main rack to the sub rack. After switching and demultiplexing in the sub-rack, the original form of each link is restored and then sent to each module in the rack.

For the clock transmission part, the basic clock generated by the clock source is input to the synchronous signal frequency division module to generate the synchronous clock required by the main and sub-racks. The generation method of the clock is to calculate the least common multiple of each frame clock period, and the least common multiple is the period of the synchronous signal. In this way, each frame clock can be cleared by the synchronous signal at an integer multiple of its own period, so that the frame clocks of the main and sub-racks are in phase. The synchronization signal is a clock pulse signal, although differential signal transmission is used between the main and sub-racks, interference may also be introduced. For anti-interference, the pulse width can be set wider, and at the same time, the deburring process can be done before the signal is used in the frequency division module. The frequency division module uses the clock source to output clock and synchronous signal to generate various frame clocks and bit clocks. Some frequency division modules have a phase-locking function and require a reference source of a specific frequency. The reference source can be synchronized with a synchronization signal and then provided to the phase loop. This can ensure that the clock output by the phase-locked loop has a definite phase relationship with the system clock.

Claims (5)

1, a kind of base station receiving-transmitting signal R-T unit is characterized in that, comprises data transmission unit and clock transfer unit;

Described data transmission unit also comprise mainframe multiplexing with demultiplexing module, mainframe Switching Module, secondary frame is multiplexing with demultiplexing module and secondary frame Switching Module, described mainframe is multiplexing and demultiplexing module will be operated and the serial data of link management converts time-multiplexed 64K integer multiple data on the 2M link to, is combined on the 2M link by described mainframe Switching Module with the PCM signal then; Have only a data wire to be sent to secondary frame by mainframe; To handle respectively on time-multiplexed operation and a link management and PCM handshaking to two data flow by described secondary frame Switching Module after arriving secondary frame, operation is reduced into non-time-multiplexed multi-path serial data by described secondary frame is multiplexing with demultiplexing module with link management;

Described clock transfer unit also comprises mainframe clock source module and secondary frame clock source module, described mainframe clock source module produces a frame clock sync signal, each frame clock phase that described secondary frame clock source module is produced aligns with the frame clock sync signal that described mainframe clock module is sent, and the clock transfer line between mainframe and the secondary frame only needs a pair of.

2, base station receiving-transmitting signal R-T unit according to claim 1 is characterized in that, the frame clock sync signal that described mainframe clock source module produces sends described secondary frame clock source module to by the differential driving mode.

3, base station receiving-transmitting signal R-T unit according to claim 1 is characterized in that, in the described data transmission unit, the PCM signal adopts time multiplexing signal, and operation is adopted the synchronous serial communication mode with supervisory signal.

4, base station receiving-transmitting signal R-T unit according to claim 1 is characterized in that, in the described data transmission unit, operation is time division multiplexing synchronous serial data, non-time division multiplexing synchronous serial data or asynchronous serial data with supervisory signal.

5, base station receiving-transmitting signal R-T unit according to claim 1, it is characterized in that, described mainframe clock module and secondary frame clock module comprise clock source and frequency division module respectively, described clock source produces basic clock, then the frame clock and the bit clock of the described frequency division module generation of process system needs.

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