CN1492491A - Flip-chip substrate with conductive bump and manufacturing method of conductive bump - Google Patents

Abstract

A flip chip substrate with conductive bumps and a manufacturing method of the conductive bumps, comprising the following steps: providing a flip chip substrate with a plurality of conductive points on its surface; covering the surface of the flip chip substrate with a conductive film; forming a photoresist layer on the surface of the conductive film; patterning the photoresist layer to form a plurality of openings on the surface of the flip chip substrate to expose a plurality of conductive points thereunder; performing copper electroplating to fill the plurality of openings to form a plurality of copper bumps; removing the photoresist layer and the conductive film; forming a solder mask on the surface of the substrate to expose a plurality of copper bumps; performing surface anti-oxidation treatment on the exposed plurality of copper bumps. The method has the effect of simplifying the bump manufacturing process on the package substrate.

Description

Flip-chip substrate with conductive bumps and method for manufacturing same

field of invention

The present invention relates to a packaging substrate, in particular to a method for manufacturing a flip-chip substrate with conductive bumps and the conductive bumps by electroplating.

Background of the invention

At present, ball grid array (BGA) packaging is widely used in packaging of integrated circuit chipsets or graphics chips. Generally speaking, the BGA package mainly forms a plurality of solder balls on the back of a substrate, and arranges them in a grid array on the back of the substrate, as pins between the chip and the printed circuit board, replacing the previous metal lead frame. The advantage of the BGA package is that under the same size, the number of pins can be increased, and the pitch between the pins is also increased. In addition, since the BGA package shortens the conductive path between the printed circuit board and the chip, its heat dissipation effect and conductivity are also improved.

With the shrinking of package size and increasing pin count, flip-chip ball grid array package (F1ip chip on BGA, FCBGA) has become one of the main package technologies. The flip-chip BGA package connects the back of an integrated circuit chip to a substrate, and the substrate is connected to a printed circuit board by a ball grid array. Because flip-chip ball grid array (FCBGA) combines flip-chip and ball grid array two packaging technologies, it has the advantages of saving space and accommodating more pins.

As shown in FIG. 1 , it is a traditional flip chip ball grid array packaging method. First, conductive bumps (solder bumps) are formed on the bonding points on the surface of the chip 102, and then the side of the chip with solder bumps is bonded to the flip chip. The conductive bumps on the substrate 106 are bonded to form the conductive pins 104 . The gap between the chip and the flip-chip substrate is filled with an underfill 103 to make it firm. The other side of the flip-chip substrate 106 has solder balls 108 for bonding with other printed circuit boards. Its main flaws are:

The flip-chip substrates used in the above-mentioned purposes are generally bump pads on insulating or internally wired substrates, and bumps are made by solder paste printing technology as conductive pins. And this step is generally called pre-soldering (Pre-soldering). The disadvantage of this kind of solder paste bump printing is that the process is quite complicated, and the solder paste bump printing process must be performed by a special machine for printed circuit boards, and most of them form bumps of tin-lead alloy (Sn-Pb) or similar alloys. The quality of inter-bump bonding is often affected by the properties of tin or its alloys, and the reliability of bonding is greatly affected by the properties of the bumps.

Contents of the invention

The main purpose of the present invention is to provide a method for manufacturing conductive bumps, which utilizes a plating process to manufacture metal bumps on flip-chip substrates, thereby simplifying the bump manufacturing process on packaging substrates.

Another object of the present invention is to provide a method for manufacturing a flip-chip substrate with conductive bumps, which can form a highly reliable tin-copper interlayer alloy (IMC) during package bonding, thereby simplifying The purpose of the bumping process of the flip-chip substrate.

The purpose of the present invention is achieved in this way: a manufacturing method for forming conductive bumps by electroplating, comprising the following steps: providing a substrate with a plurality of conductive points on its surface; covering the surface of the substrate with a conductive film; forming a photoconductive film on the conductive film Resisting layer; patterning photoresist layer, forming a plurality of openings on the surface of the substrate, and exposing a plurality of conductive points under it; performing metal plating to fill the plurality of openings, and forming a plurality of metal bumps (bump); removing The first resistance layer and the conductive film form a solder resist protection layer on the surface of the substrate and expose the plurality of metal bumps.

Through the above method, the conductive metal bumps are deposited and formed in the defined openings in a relatively simple electroplating manner with simple steps, so as to replace the general bump printing technology.

The present invention further provides a method for manufacturing a chip-on-chip substrate with conductive bumps, comprising the following steps: providing a chip-on-chip substrate with a plurality of conductive points on its surface; covering the surface of the chip-on-chip substrate with a conductive film; forming a photoresist layer on the surface of the conductive film ; pattern the photoresist layer to form a plurality of openings on the surface of the flip-chip substrate and expose a plurality of conductive points thereunder; perform copper electroplating to fill the plurality of openings to form a plurality of copper bumps; remove the photoresist layer and a conductive film; forming a solder resist protective layer on the surface of the substrate, and exposing the plurality of copper bumps; performing surface oxidation prevention treatment on the exposed majority of copper bumps.

Through the above method, the flip-chip substrate with conductive bumps is manufactured by electroplating, and when the conductive bumps are soldered to the chip bumps, a tin-copper solder joint with better bonding force is formed to improve the reliability of the package.

A detailed description will be given below in combination with preferred embodiments and accompanying drawings.

Description of drawings

FIG. 1 is a schematic cross-sectional view of a conventional flip-chip ball grid array package (FCBGA).

2-8 are schematic side views of the manufacturing process of the conductive bump of the flip-chip substrate of the present invention.

FIG. 9 is a schematic cross-sectional view of bonding a conductive bump flip-chip substrate and a wafer according to the present invention.

Detailed ways

Referring to FIGS. 2-8 , the manufacturing process of the conductive bumps of the flip-chip substrate of the present invention includes the following steps.

Referring to FIG. 2 , in a flip-chip substrate 200 , connection lines can be provided, and conductive points are provided on the surface of the substrate 200 as joints for internal connection lines to the outside, and the preferred conductive points are copper pads (copperpad) 202 . Next, a conductive thin film 204 is formed on the surface of the flip chip substrate 200. Preferably, a layer of copper metal is evenly plated on the surface of the flip chip substrate 200 by means of plating as the conductive thin film. For example, electroless plating is used to deposit and form a copper thin film on the surface of the chip-on-chip substrate 200 as a conductive layer in an electrolytic solution containing copper ions without an external electrode. Since the electroless plating has good continuity and step coverage, a uniform copper film can be formed on the flip chip substrate 200 and the surface of the conductive copper pad 202 . However, the conductive thin film of the present invention is not limited to the above-mentioned metal copper thin film.

Next, as shown in FIG. 3 , a photoresist layer 208 is formed on the surface of the flip-chip substrate 200 , and a lithography process is performed on it to pattern the photoresist layer 208 , and an opening 202 a is formed above the copper pad 202 .

Next, referring to FIG. 4 , metal column plating is performed by using the above-formed copper thin film as a seed layer to fill the opening 202a. Preferably, copper bumps 210 are formed on the copper pads 202 by copper plating. A preferred bump height is approximately equal to the height of the photoresist layer, or slightly higher than the photoresist layer 208 as shown in FIG. 4 .

Since the electroplated copper has a good hole-filling capability, the opening 202a can be filled upwards from the bottom to form a copper bump with good quality. Moreover, the electroplating has the advantages of low cost, simple equipment and fast deposition speed, and can replace the general process of printing bumps on flip-chip substrates. Moreover, the copper electroplating process is generally widely used in other processes of printed circuit boards, so there is no need to purchase additional equipment.

Referring to FIG. 5 , after the metal bump 210 is deposited by electroplating, the photoresist layer 208 is then removed.

Referring next to FIG. 6 , generally after removing the photoresist layer, acid cleaning is continued to remove photoresist impurities. At this time, the acid solution cleaning process is used to remove the exposed conductive copper film 204 on the surface of the flip chip substrate 200 by using the acid solution on the copper metal microetching effect (microetching), and at the same time, the angle between the exposed copper bump 210 and the copper pad 202 is adjusted. The rounded, arc-shaped copper bumps 210 facilitate subsequent bonding.

Next, referring to FIG. 7 , the flip-chip substrate 200 is subjected to a solder resist protection process. In a preferred embodiment, the solder resist protection process can be a common printed circuit board solder mask (solder mask) process, which is generally called solder mask paint. Mainly cover other parts of the surface of the metal bump 210 by covering a thin layer of polymer material on the flip-chip substrate, such as thermally baked epoxy resin or photosensitive acrylate (Acrylates). The solder resist protective layer 212 can avoid short circuit caused by solder overflow in the subsequent process, and prevent the surface of the flip chip substrate from being damaged by the external environment.

Referring next to FIG. 8 , in order to prevent the exposed surface of the conductive bump 210 from being damaged by oxidation, an anti-oxidation treatment on the surface of the metal bump 210 may be further performed. In a preferred embodiment, the hot air solder leveling (HASL) technology (hot air solder leveling. HASL) in the printed circuit board manufacturing process can be directly used. The flip-chip substrate is immersed in the molten solder, and after the coating is completed, the excess solder is removed by blowing hot air at a high speed, and an anti-oxidation solder coating 214 with an appropriate thickness is formed on the surface of the metal bump 210 . It is also possible to form an anti-oxidation film with a proper thickness on the surface of the metal bump 210 by using a common OSP process, that is, chemical immersion.

Through the above method, metal bumps can be formed on the flip-chip substrate by means of electroplating, for example, copper bumps can be formed by electroplating copper.

Referring to FIG. 9 , it illustrates a schematic cross-sectional view of bonding a copper bump flip-chip substrate formed by the method of the present invention to a wafer. The bonding bump 306 is provided on the wafer 300, and after bonding it to the metal bump 206 on the flip-chip substrate 200 (that is, the combination of the copper pad 202, the copper conductive film 204 and the electroplated copper bump 206) by a common bonding process, The filling material 310 is filled between the chip 300 and the flip-chip substrate 200 to fix its bonding effect. Due to the nature of copper, the copper bumps 206 cannot form a fusion reaction with the bumps 306 on the wafer like the tin-lead bumps formed by the general printing process. However, due to the increased contact coverage area of the copper bumps formed by electroplating, the The joint effect of the tin-copper alloy formed after the joint is better than that of the traditional tin-lead bump.

To sum up, one of the main advantages of the method of the present invention is that the metal bumps are formed on the flip-chip substrate by electroplating, and the process is simple and easy to control, which is superior to the general bump printing process.

The second advantage of the method of the present invention is that copper bumps are formed on the flip-chip substrate by means of electroplating, which has a larger joint area, so the copper bumps and the tin-lead bumps on the wafer can form a stable tin-copper bump. Coexistence alloy, the interface is better than the traditional tin-nickel coexistence alloy.

The third advantage of the inventive method is that the entire process steps do not need to introduce additional process machines, and only need to use the general printed circuit board manufacturing process and commonly used electroplating equipment and lithography process to complete the manufacturing process. It is more competitive for the production of flip-chip substrates.

Although the present invention is disclosed above with preferred embodiments, it is not intended to limit the present invention. Anyone who is familiar with the art, without departing from the spirit and scope of the present invention, makes some changes and modifications, which belong to the present invention. within the scope of protection.

Claims (10)

1. A method for manufacturing a flip-chip substrate with conductive bumps, characterized in that it comprises the following steps: (1) providing a flip-chip substrate, the surface of which has a plurality of conductive points; (2) covering a conductive film on the surface of the chip-on-chip substrate; (3) forming a photoresist layer on the surface of the conductive film; (4) patterning the photoresist layer to form a plurality of openings on the surface of the flip-chip substrate to expose a plurality of conductive points thereunder; (5) performing electroplating to fill the plurality of openings to form a plurality of conductive bumps; (6) removing the photoresist layer and the conductive film; (7) Forming a solder resist protective layer on the surface of the substrate and exposing the plurality of conductive bumps. 2. The method for manufacturing a flip-chip substrate with conductive bumps according to claim 1, wherein the electroplating is copper electroplating to form conductive copper bumps. 3 . The method for manufacturing a flip-chip substrate with conductive bumps according to claim 1 , further comprising performing anti-oxidation treatment on the exposed plurality of conductive bumps after forming the solder resist protection layer. 4. The method of manufacturing a flip-chip substrate with conductive bumps according to claim 3, wherein the anti-oxidation treatment is to apply hot air solder on the surface of the conductive bumps to form an anti-oxidation coating . 5. The method for manufacturing a chip-on-chip substrate with conductive bumps according to claim 1, wherein the conductive film is covered by electroless plating to form a copper film covering the surface of the chip-on-chip substrate. 6. A method for manufacturing a conductive bump, characterized in that it comprises the following steps: (1) providing a substrate, the surface of which has a plurality of conductive points; (2) covering a conductive film on the surface of the substrate; (3) forming a photoresist layer on the surface of the substrate; (4) patterning the photoresist layer to form a plurality of openings on the surface of the substrate to expose a plurality of conductive points thereunder; (5) performing metal electroplating to fill the plurality of openings to form a plurality of metal bumps; (6) removing the photoresist layer and the conductive film; (7) forming a solder resist protective layer on the surface of the substrate, and exposing the plurality of metal bumps; 7. The method for manufacturing conductive bumps according to claim 6, further comprising the step of performing anti-oxidation treatment on the surface of most of the exposed metal bumps. 8. The method of manufacturing a conductive bump according to claim 7, wherein the anti-oxidation treatment is to apply hot-air solder on the surface of the conductive bump to form an anti-oxidation coating. 9. The method of manufacturing a conductive bump according to claim 6, wherein the metal electroplating is copper electroplating, and the conductive bump is a copper bump. 10 . The method of manufacturing a conductive bump according to claim 6 , wherein covering the conductive film is formed by electroless plating to form a metal film covering the surface of the substrate. 11 .

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