CN1295382A - 信道解码器和信道解码方法 - Google Patents
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Abstract
本发明公开一种信道解码器,该解码器包括一个软入软出内层解码器;用于从内层解码器输出信息减去反馈的外层非本征信息以产生内层非本征信息的装置;用于在对应信息比特bn的内层非本征信息中交换对数似然比Ln0,Ln1,以产生反馈的非本征信息的装置,所述的编码器与前一迭代产生的外层非本征信息一起作迭代操作;用于将对应内层非本征信息的信息比特bn的对数似然比Ln0,Ln1相加的装置;以及用于对基于相加的对数似然比做出硬判决的装置。
Description
本发明涉及信道解码器以及信道解码的方法。
信道编码用于使发射的数字信息信号相对于噪声更加健壮。为此,信息比特序列在发射机端由信道编码器编码,而在接收机端由信道解码器解码。在编码器中,冗余信息被加入到信息比特序列中,以便于解码器执行纠错。比如,在系统信道编码方案中,冗余信息加入到信息比特序列就象附加的插入“编码”比特。因此,编码信号由信息比特和编码比特组成。在非系统信道编码方案中,输出的比特全是编码比特,不再有任何‘真实的’信息比特。编码器的输入比特(信息比特)数少于输出比特数(信息比特加上插入的编码比特,或全编码比特)。输入/输出比特比率称为‘码率R’(典型地,R=1∶2)。例如,普遍流行的信道编码为分组码和卷积码,后者可以为递归的或非递归的。
级联编码方案利用(至少)两个并行或串行的级联编码器。通过此方式,同一信息序列以并行方式或以串行方式被编码两次。迭代译码算法可用于并行或串行的级联编码系统(Benedetto,S.,Divsalar,D.,Montorsi,G.,ollara,F.‘交织码的串行级联:性能分析,设计和迭代译码’,IEEE Trans.Inf.Theory,1998,44,(3),pp.909-926)。
图1示出了真实的串行级联编码方案。信息的发送是在分组的基础上操作。信号序列在发射机端以串行方式被编码两次。来自数字源(如,来自麦克风的具有模拟输入信号的模数转换器)的二元信号首先由外层编码器(码率R0)编码。外层编码器的输出经过一个比特交织器,该交织器改变输入比特符号的次序,以使信号显得更随机从而进入到下面的处理步骤。经过交织器处理之后,信号由‘内层编码器’(码率R1)第二次被编码。发射信号的整个码率为R0·R1。相应地,在接收机端信号首先由内层解码器解码,去交织,然后由外层解码器解码。从外层解码器,软值(soft values)作为附加的‘先验(a priori)’输入被反馈到内层解码器。该软值代表解码信号质量的可靠性值。这些值的反馈有助于减小外层解码器输出端在以后的迭代译码步骤中硬判决0,1值的误码率。特定发射序列的迭代译码由一个独立的终止要求而停止。例如,在一个固定数量的迭代之后,或直到达到一个特定的误码率。应当注意的是,发射比特序列(‘0th迭代’)的每次第一解码,输入到内层解码器的‘先验’软值被设定为0。此外,对信息比特的硬判决只需为每个序列计算一次,即,在通过外层解码器的最终路径(最后迭代)。
一般来说,内层和外层二元码可为任何类型:系统的或非系统的,分组的或卷积的,递归的或非递归的。
在接收机,两个解码器均为软入/软出(soft-in/soft-out)解码器(SISO解码器)。一个软值代表相应比特符号(发送的是0还是1)比特判定上的可靠性。软入解码器为输入比特符号接受软可靠性值,软出解码器为输出比特符号提供软可靠性输出值。软出可靠值通常比软入可靠值更为精确,因为它们能在解码处理期间基于发射机端每一编码步骤加入的冗余信息得到改善。作为SISO解码器,其最好性能是提供适合于相应的信道码的后验概率计算器(APP)(L.bahl,J.cocke,F.jelinek,J.raviv,“符号差错率最小的线性码优化解码”,IEEE Trans.IT.,vol,20,PP 284-287,March 1974)。还有一些更快的,但不那么理想的算法,如,SOVA(软输出维特比算法)(J.hagenauer,P.Hoeher,“具有软判定输出的维特比算法及其应用”,Proc.IEEEGlobecom 1989,Dallas,Texas,PP.47.1.1-457.1.7,Nov.1989),在迭代译码路径中,‘外层非本征信息’通过比特交织器,并作为一种先验知识反馈到内层解码器。‘外层非本征’信息是外层解码器软输入/软输出之间的差值,并描述由外层解码过程获得的新的、统计上独立的信息(至少为第一迭代)。由此,内层解码器提供‘内层非本征’信息和信道信息(如图1)。
在此背景下,本发明认为从特定的编码方案可得到一定的优点。
根据本发明,提供一种信道解码器,用于解码由串联的外层码和内层码编码的数据,其中外层码为码率1∶2的重复码,可用于编码一个数据比特bn为两个相同的编码比特bcoded,n0,bcoded,n1,而且其中编码比特为交织的。该解码器包括一个软入软出(SISO)内层解码器,输入和输出信息为对数似然比,即输入信息为编码数据和外层非本征信息的对数似然比;该装置用于从内层解码器输出信息减去反馈的外层非本征信息以产生内层非本征信息;用于在对应一个信息比特bn的内层非本征信息中交换对数似然比Ln0,Ln1,以产生反馈的非本征信息,所述的编码器与前一迭代产生的外层非本征信息一起作迭代操作;用于将对应内层非本征信息的一个信息比特bn的对数似然比Ln0,Ln1相加;以及用于对基于相加的对数似然比做出硬判决。与现有技术提出的其他解码器相比,这种配置特别简单,特别是在当认识到交换装置能在不需要单独的解交织和交织步骤的情况下执行交换时。
一般情况下,第一迭代设置反馈外层非本征信息设置为0。
本发明同时扩展了一种方法,用于解码包含由串联外层和内层码编码数据的信道信息,其中外层码为码率1∶2的重复码,可用于编码一个数据比特bn为两个相同的编码比特bcoded,n0,bcoded,n1,而且其中的编码比特是交织的。该方法包含解码信道信息,该信息是利用外层非本征信息产生内层编码对数似然比信息的接收编码数据的对数似然比;该方法用于从内层解码的对数似然比信息中减去反馈的外层非本征信息以产生内层非本征信息;该方法对应一个信息比特bn,在内层非本征信息中交换对数似然比Ln0,Ln1,以产生反馈的非本征信息,与前一迭代产生的外层非本征信息一起执行所述的迭代解码操作;该方法用于将对应内层非本征信息的一个信息比特bn的对数似然比Ln0,Ln1相加;以及用于对基于相加的对数似然比做出硬判决。
通过举例并参考附图,现在描述本发明的一个实施例,其中:
图1是带有迭代译码的现有技术的串联编码器和解码器的方框图;
图2是体现本发明的串联编码器和解码器的方框图;
图3示出了图2解码器的简化后的结构方框图;和
图4示出了图3的解码器进一步简化后的方框图。
参考附图中的图2,二元数据源2提供数据给外层码率1∶2的重复编码器4。对每个输入到编码器4的数据比特bn,有两个相同的输出编码bcoded,n0,bcoded,n1。一个数据分组中的编码比特根据预定模式被交织器6交织,以便码组对下面的步骤来讲显得更为随机。交织的比特接着被另一编码器8编码。
从内层编码器8输出的编码信息通过一媒体发射,在此信息被加性噪声削弱。
通过媒体接收的削弱的编码信息与外层非本征信息一起,被输入到软入软出(SISO)内层解码器10,两者均为对数似然比形式。非本征信息初始值设为0,表示比特为0或为1的似然率相等。
反馈的外层非本征信息(以对数似然比形式)由加法器12从内层解码输出信息(也以对数似然比形式)中减去,以向解交织器14的输入端提供内层非本征值。解交织器的输出代表来自内层解码器和信道信息的内层非本征信息,该输出输入到码率1∶2的重复解码器16。
外层解码器16的输出提供以对数似然比的形式表示的编码比特的软值。内层非本征信息由累加器18从软值中减去以提供外层非本征值,它们由交织器20交织以提供外层非本征信息。
解码器迭代性地操作,这样对于第二迭代,可采用来自第一迭代的外层非本征信息,依此类推。在一些预定标准满足后,迭代终止,而且信息比特的软值(以对数似然比形式)输出到一个鉴别器以执行每个比特的硬判决。该标准可能是预定数量的迭代,如4个,或当该迭代和下一迭代之间的值的变化小于某个门限时。
在L值符号表示法中,L0coded=L1coded=Lcoded=L0+L1
L值符号表示法在(J.Hagenauer,“涡轮原理:指导性介绍和目前技术水平”,涡轮码专题论文集,Brest,France,September 1997)。
L0和L1为输入到解码器的两个L值(由于码率为1∶2,每个“重复码”一码字有两个值)。
对于码率1∶2的重复码,结果是Linfo=Lcoded。
为恢复期望的比特信息,需要在解码器的输出端对Linfo值执行硬判决(标记)。
最重要的是,非本征输出值(在迭代译码处理期间反馈到内层解码器)计算为:
L0,extr=L0,coded-L0=L1
L1,extr=L0,coded-L1=L0
因此,非本征解码器输出值通过每个“重复码”一码字交换两个输入值L0和L1就可得到。
图3示出了如何利用这种方式简化外层解码器。在此外层重复解码器16和累加器18被加法器24和缓冲器26取代。缓冲器26存储来自内层非本征信息的两个连续值以及对应于一个数据比特bn的值Ln0,Ln1。它们在加法器24相加以提供输入到鉴别器22的信息比特的软值,这些值也输入到缓冲器28,从缓冲器它们以相反的顺序(交换)读取,以提供输入到解交织器20的外层非本征值流。
进一步简化的图如图4所示。在此图3的缓冲器28、解交织器14、交换器28和交织器20组合成一个单一的单元(交织器30),该单元直接从加法器12输出的内层非本征值交换对应于一个数据比特bn的值Ln0,Ln1,而不首先将它们解交织。
使用内层码率1∶2的递归系统码特别具有吸引力,以获得码率为1的内层码(半数的内层编码比特被移走)。加上外层的码率1∶2的重复码,使得整个码率为1∶2。注意内层编码器不加入冗余,在内层编码器处输入比特数与输出比特数相同。
在内层编码器的输出端移走半数的编码比特的收缩模式是随机的,但必须让接收端知道。然而,有两个限制:1.在瞬时时刻K,可以移动信息比特Ik或相关的奇偶校验位Pk,但不能同时是两者。2.在编码序列必须总保持有一些奇偶校验位存在,否则是不可能进行迭代译码的。
从比率1∶2的母码获得比率为1的码的收缩模式的例子为:
1.移走所有的信息比特,这样编码比特序列只由奇偶校验位组成。
P0,P1,P2,P3…
2.移走一半信息比特,一半奇偶校验位。
i0,P1,i2,P3…
3.移走2/3的信息比特,和1/3的奇偶校验位。
i0,P1,P2,i3,P4,P5…
如果以迭代方式译码,不同的收缩模式1.,2.,3.和4.导致级联码的不同误码率(BER)特性。涉及的信息比特越少,涡轮陡壁就越迟(根据信噪比),但误码率标准就越低。
Claims (6)
1.一种信道解码器,用于解码由串联的外层码和内层码编码的数据,其中外层码为码率1∶2的重复码,可用于将编码一个数据比特bn编码为两个相同的编码比特bcoded,n0,bcoded,n1,而且其中编码比特为交织的,该解码器包括一个软入软出(SISO)内层解码器,输入和输出信息为对数似然比,即输入信息为编码数据和外层非本征信息的对数似然比;用于从内层解码器输出信息减去反馈的外层非本征信息,以产生内层非本征信息的装置;用于在对应一个信息比特bn的内层非本征信息中交换对数似然比Ln0’Ln1,以产生反馈的非本征信息的装置,所述的编码器与前一迭代产生的外层非本征信息一起作迭代操作;用于将对应内层非本征信息的一个信息比特bn的对数似然比Ln0,Ln1相加的装置;以及用于对基于相加的对数似然比做出硬判决的装置。
2.根据权利要求1的解码器,第一迭代中反馈的外层非本征信息设置为0。
3.根据权利要求1或2的解码器,其中用于交换的装置执行交换而不需要单独的解交织和交织步骤。
4.一种用于解码包含由串联外层和内层码编码数据的信道信息的方法,其中外层码为码率1∶2的重复码,可用于编码一个数据比特bn为两个相同的编码比特bcoded,n0,bcoded,n1,而且其中的编码比特是交织的,该方法包含解码信道信息,该信息是利用外层非本征信息产生内层编码对数似然比信息的接收编码数据的对数似然比;从内层解码的对数似然比信息中减去反馈的外层非本征信息以产生内层非本征信息;在内层非本征信息中交换对数似然比Ln0,Ln1,以产生反馈的非本征信息,与前一迭代产生的外层非本征信息一起执行所述的迭代解码操作,前述对数似然比Ln0,Ln1对应于一个信息比特bn;将对应内层非本征信息的一个信息比特bn的对数似然比Ln0,Ln1相加;以及用于根据相加的对数似然比做出硬判决。
5.根据权利要求4的方法,其中对于第一迭代,反馈外层非本征值设置为0。
6.根据要求要求4或5的装置,其中解交织、交换和交织步骤在一个步骤内完成,而不需要单独的解交织和交织步骤。
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2000
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- 2000-09-11 US US09/659,093 patent/US6629287B1/en not_active Expired - Lifetime
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- 2000-09-14 KR KR1020000054036A patent/KR100356324B1/ko not_active Expired - Fee Related
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| CN1326343C (zh) * | 2001-07-12 | 2007-07-11 | 皇家菲利浦电子有限公司 | 有效计算对数似然比的方法与设备 |
| CN101867448B (zh) * | 2001-10-12 | 2012-07-04 | 高通股份有限公司 | 用于降低通信系统中解码复杂度的方法和系统 |
| CN100438346C (zh) * | 2001-12-04 | 2008-11-26 | 高通股份有限公司 | 用于线性分组码的擦除和单错纠正的方法和设备 |
| US7096403B2 (en) | 2001-12-19 | 2006-08-22 | Nec Corporation | Iterative concatenated code decoding circuit and encoding/decoding system using the same |
| CN1305221C (zh) * | 2001-12-19 | 2007-03-14 | 日本电气株式会社 | 迭代链接码解码电路以及使用该电路的编码/解码系统 |
| CN105406939A (zh) * | 2014-09-05 | 2016-03-16 | 三星电子株式会社 | 使用迭代检测解码进行接收的设备和方法 |
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| KR100356324B1 (ko) | 2002-10-19 |
| ID27249A (id) | 2001-03-15 |
| JP2001127646A (ja) | 2001-05-11 |
| EP1085661A1 (en) | 2001-03-21 |
| KR20010050451A (ko) | 2001-06-15 |
| AU5655200A (en) | 2001-03-15 |
| EP1085661B1 (en) | 2005-03-02 |
| US6629287B1 (en) | 2003-09-30 |
| BR0003983A (pt) | 2001-06-19 |
| DE69923970D1 (de) | 2005-04-07 |
| JP3354554B2 (ja) | 2002-12-09 |
| DE69923970T2 (de) | 2006-04-27 |
| CA2317202A1 (en) | 2001-03-14 |
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