CN1277148C - Active organic electroluminescence display and manufacturing method thereof - Google Patents

Abstract

The present invention provides an active organic electroluminescent display. Each pixel region includes: at least two amorphous silicon TFT elements, and the channel of the amorphous silicon TFT element is composed of an amorphous silicon layer; a display region, composed of a transparent conductive layer; and a light shielding layer, covering the area outside the display region, which can electrically isolate the parasitic organic electroluminescent display outside the pixel region and shield the amorphous silicon layer to prevent damage by subsequent surface treatment processes.

Description

Active organic electroluminescence display and manufacturing method thereof

Technical field

The present invention relates to an active organic electroluminescent display (AM-OLED) with an amorphous silicon thin film transistor (a-Si:HTFT) as a driving element, in particular to an AM-OLED with a light shielding structure, which can The parasitic OLED outside the pixel area is electrically isolated, and the amorphous silicon layer can be shielded to prevent damage by subsequent surface treatment processes.

Background technique

Organic Electroluminescence Device (Organic Electroluminescence Device; Organic Light Emitting Diode, hereinafter referred to as OLED), according to its driving method can be divided into active (activematrix) and passive two, of which active organic electroluminescence display (hereinafter referred to as AM-OLED ) is driven by current, and each pixel must have at least one switch TFT, which is used as the image data to enter the storage switch and addressing; in addition, a driving TFT is required to adjust the driving according to the difference in the storage voltage of the capacitor The size of the current controls the brightness and grayscale of the pixel. Current active driving methods use two TFT driving methods and four TFT driving methods.

Generally speaking, the light-emitting principle of AM-OLED is to apply current to a specific organic thin film layer to convert electrical energy into light energy. Voltage and other advantages, and has the characteristics of wide viewing angle, high contrast, high response speed, full color and flexibility. As for the manufacture of the TFT element, the TFT technology of amorphous silicon (a-Si:H) of the liquid crystal display is adopted. Please refer to FIG. 1 , which shows a top view of an existing amorphous silicon TFT AM-OLED. Taking an AM-OLED using two amorphous silicon TFTs as an example, it includes a plurality of arrays of pixel regions 10, a data line 12 extending along the Y direction and a source line (source line or V) extending along the X direction. _dd line)14. Each pixel area 10 includes two scanning lines 16 extending along the X direction, two amorphous silicon TFT elements 18 , a display area 20 formed of rectangular transparent electrodes, and a capacitor 22 .

Please refer to FIG. 2A , which is a schematic cross-sectional view of the conventional amorphous silicon TFT element 18 along the line A-A in FIG. 1 . The following describes the process of the conventional amorphous silicon TFT device 18 by using an etching stopper type fabrication method. Firstly, a first metal layer is formed on the surface of a transparent substrate 30 , and then the first metal layer is defined to form patterns of the source lines 14 , the scan lines 16 and the bottom electrodes of the capacitors 22 . Then, a first insulating layer 32, a second insulating layer 34, and an amorphous silicon (a-Si:H) layer 36 are sequentially formed on the surface of the transparent substrate 30, and then part of the second insulating layer is formed by photolithographic etching technology. The insulating layer 34 and the amorphous silicon layer 36 are removed, so that the predetermined area of the amorphous silicon TFT element 18 defines an island structure, and the second insulating layer 34 and the amorphous silicon layer 36 above the source line 14 are completely remove. Next, an etch stop layer 38 is defined and formed above the predetermined gate region of the island structure. Subsequently, a doped amorphous silicon layer 40 and a second metal layer 42 are sequentially formed on the entire surface of the transparent substrate 30, and then a part of the doped amorphous silicon layer 40 and the second metal layer 42 Remove, the second metal layer 42 is defined to form the pattern of the upper electrode of the data line 12 and the capacitor 22, and the doped amorphous silicon layer 40 and the second metal layer 42 are kept on the surface of the island structure at the same time, as for the source The doped amorphous silicon layer 40 and the second metal layer 42 above the line 14 are completely removed. Then, by using photolithographic etching process, an opening is defined and formed above the predetermined gate area of the island structure, so that the second metal layer 42 can be divided into a source/drain electrode (42A or 42B), and the doping The amorphous silicon layer 40 is divided into a source/drain diffusion region (40A or 40B), and the amorphous silicon layer 36 is used as a channel.

Next, a protection layer 44 is formed on the entire surface of the transparent substrate 30, and then at least a first through hole 45I, a second through hole 45II and a third through hole 45III are formed in the protection layer 44 by photolithography and etching. , wherein the first through hole 45I and the second through hole 45II respectively expose the second metal layer 42 near the source/drain electrode (42A or 42B), while the third through hole 45III passes through the first insulating layer 32 Part of the region of the source line 14 is exposed. Thereafter, a pattern of an indium tin oxide (ITO) layer 46 with a transparent conductive effect is defined and formed on the surface of the transparent substrate 30 to form a rectangular display area 20 and cover the first through hole 45I and the second through hole 45II And the exposed area of the third through hole 45III to provide the effect of electrical connection.

Please refer to FIG. 2B , which is a schematic cross-sectional view of a conventional parasitic OLED along the tangent line AA of FIG. 1 . After the above-mentioned amorphous silicon TFT element 18 is completed, the surface treatment procedure needs to be carried out before the evaporation process, and then an organic/polymer luminescent material layer 47 and a cathode metal layer 48 are deposited in sequence, and the AM- The process of OLED. However, in the existing surface treatment technology, the surface cleaning process of ultraviolet ozone (UV/O ₃ ) or O ₂ plasma is usually used, and the UV light in the surface cleaning process will damage the amorphous silicon layer 36, thereby causing threshold Problems with increased voltage (threshold voltage) or increased leakage current (leakage current). For the general TFT-LCD process, annealing treatment can be carried out after the UV cleaning process, which can repair the damaged structure of the surface to solve the above problems, but for the OLED process of amorphous silicon TFT, it is hindered by subsequent evaporation Due to the limitations of the organic/polymer material layer 47 , this annealing treatment cannot be provided to solve the problem of damage to the amorphous silicon layer 36 .

In addition, for the existing five-mask amorphous silicon TFT process, the pattern of the ITO layer 46 is not only used in the display area 20, but also must be provided as a layer between the second metal layer and the second metal layer or between the second metal layer. It is an electrical connection bridge between the second metal layer and the first metal layer, but the ITO layer 46 outside the display area 20 will lead to the formation of a parasitic OLED area 49, and this parasitic OLED area 49 will also produce light emission, thereby causing Unnecessary power consumption and visual distraction.

Contents of invention

Therefore, the main purpose of the present invention is to provide an AM-OLED with a light-shielding structure, which covers an area other than the display area, can shield the amorphous silicon layer to prevent damage to the subsequent electrical or UV light cleaning process, and Parasitic capacitance can be isolated to ensure the light quality of AM-OLED.

The present invention provides an active organic electroluminescence display, each pixel area includes: at least two amorphous silicon TFT elements, and the channel of the amorphous silicon TFT element is formed by an amorphous silicon layer; The display area is composed of a transparent conductive layer; and a light shielding layer covers the area outside the display area, which can electrically isolate the parasitic OLED outside the pixel area, and can shield the amorphous silicon layer to prevent subsequent surface treatment Workmanship damage.

According to the above-mentioned purpose, one feature of the present invention is to provide a light-shielding structure, which can shield the amorphous silicon layer to prevent it from being damaged by UV light or plasma in the subsequent surface cleaning process, thereby improving the existing increase in threshold voltage or increase in leakage current. The problem.

Another feature of the present invention is to provide a light-shielding structure that can isolate the parasitic OLED region, thereby effectively preventing the parasitic OLED region from emitting light, thereby reducing unnecessary power consumption and visual interference.

Description of drawings

Figure 1 shows a top view of an AM-OLED of an existing amorphous silicon TFT;

2A is a schematic cross-sectional view showing a conventional amorphous silicon TFT element along the tangent line A-A' of FIG. 1;

2B is a schematic cross-sectional view showing a conventional parasitic OLED along the tangent line A-A' of FIG. 1;

3A to 3F are top views showing the AM-OLED process method of the amorphous silicon TFT of the present invention;

4A to 4G are schematic cross-sectional views showing the AM-OLED process method of the amorphous silicon TFT of the present invention along the tangent line B-B' of FIG. 3; and

5A to 5G are schematic cross-sectional views showing the AM-OLED process method of the amorphous silicon TFT of the present invention along the tangent line C-C' of FIG. 3 .

The reference signs in the accompanying drawings are explained as follows:

Existing technology :

Pixel area ~ 10; data line ~ 12; source line ~ 14; scanning line ~ 16; amorphous silicon TFT element ~ 18; display area ~ 20; capacitor ~ 22; transparent substrate ~ 30; first insulating layer ~ 32; The second insulating layer ~ 34; the amorphous silicon layer ~ 36; the etching stop layer ~ 38; the doped amorphous silicon layer ~ 40; the second metal layer ~ 42; the protective layer ~ 44; the first through hole ~ 45I; the second Through hole~45II; third through hole~45III; ITO layer~46; organic/polymer luminescent material layer~47; cathode metal layer~48; parasitic OLED region~49.

The technology of the present invention :

Transparent substrate ~ 50; first metal layer ~ 52; source line ~ 52S; first scanning line ~ 52I; second scanning line ~ 52II; capacitor bottom electrode ~ 52C; first insulating layer ~ 54; second insulating layer ~55; amorphous silicon layer ~56; first through hole ~57I; etch stop layer ~58; doped amorphous silicon layer ~60; second metal layer ~62; data line ~62D; capacitor top electrode ~62C ; opening ~ 63I, 63II; protective layer ~ 64; second through hole ~ 57II; third through hole ~ 57III; fourth through hole ~ 57IV; fifth through hole ~ 57V; transparent conductive layer ~ 66; display area ~ 66P ; light shielding layer ~ 68; parasitic OLED region ~ 69; organic/polymer luminescent material layer ~ 70; cathode metal layer ~ 72; first amorphous silicon TFT element ~ TFT1; second amorphous silicon TFT element ~ TFT2.

Detailed ways

In order to make the above-mentioned and other purposes, features, and advantages of the present invention more clearly understood, the preferred embodiments are specifically listed below, together with the accompanying drawings, and are described in detail as follows:

Example

The present invention provides an active organic electroluminescent display (AM-OLED) which takes amorphous silicon thin film transistor (a-Si:HTFT) as a driving element, and has a light shielding structure on its transparent conductive layer, which can electrically isolate The parasitic OLED outside the pixel area is used to shield the damage caused by the subsequent sub-OLED process.

Taking an AM-OLED using two amorphous silicon TFTs as an example, it includes multiple arrays of pixel regions, including data lines extending along the Y direction and source lines (source lines or V _dd lines) extending along the X direction. ) constitutes. Each pixel area includes two scanning lines extending along the X direction, two amorphous silicon TFT elements, a display area formed by rectangular transparent electrodes, and a capacitor. The fabrication method of general amorphous silicon TFT structure can be divided into etching stopper type (etching stopper type) and bottom channel type (back channel type). AM-OLED of silicon TFT.

3A to 3F are top views showing the AM-OLED process method of the amorphous silicon TFT of the present invention. 4A to 4G are schematic cross-sectional views showing the AM-OLED process method of the amorphous silicon TFT of the present invention along the tangent line B-B' of FIG. 3 . 5A to 5G are schematic cross-sectional views showing the AM-OLED process method of the amorphous silicon TFT of the present invention along the tangent line C-C' of FIG. 3 .

First, as shown in FIGS. 3A, 4A and 5A, a first metal layer 52 is formed on the surface of a transparent substrate 50, and then the first metal layer is defined to form a source line 52S extending along the X direction, and a source line 52S extending along the X direction. A pattern of an extended first scan line 52I, a second scan line 52II extending along the X direction, and a bottom electrode 52C of a capacitor. Then, as shown in FIGS. 3B, 4B and 5B, a first insulating layer 54, a second insulating layer 55, and an amorphous silicon layer 56 are sequentially formed on the surface of the transparent substrate 30, wherein the first insulating layer 54 The material can be SiO ₂ , SiN, SiON, and the material of the second insulating layer 55 can be SiO ₂ , SiN, SiON. Part of the second insulating layer 55 and the amorphous silicon layer 56 are removed by photolithography and etching technology, and an island shape can be defined and formed on the predetermined regions of the amorphous silicon TFT elements of the first scanning line 52I and the second scanning line 52II respectively. structure, the second insulating layer 55 and the amorphous silicon layer 56 above the source line 52S are completely removed, and a first through hole 57I is formed through the first insulating layer 54 to expose the source line 52S part of the area. Next, an etch stop layer 58 is defined and formed above the predetermined gate region of the island structure.

As shown in FIGS. 3C, 4C and 5C, a doped amorphous silicon layer 60 and a second metal layer 62 are sequentially formed on the entire surface of the transparent substrate 50, wherein the doped amorphous silicon layer 60 can be n ⁺ doped Miscellaneous amorphous silicon material. Then, a part of the doped amorphous silicon layer 60 and the second metal layer 62 are removed by photolithography technology, and then the second metal layer 62 can be defined to form a data line 62D extending along the Y direction and an upper electrode 62C of a capacitor. pattern, and at the same time, the doped amorphous silicon layer 60 and the second metal layer 62 can remain on the surface of the island structure, as for the doped amorphous silicon layer 60 and the second metal layer 62 above the source line 52S is completely removed. Next, using a photolithographic etching process, define and form an opening 63I and 63II above the predetermined gate region of the island structure, so that the second metal layer 62 can be divided into a source/drain electrode (62A or 62B), which can The doped amorphous silicon layer 60 is divided into a source/drain diffusion region (60A or 60B), and the amorphous silicon layer 56 is used as a channel, so that the first amorphous silicon TFT element ( TFT1) and a second amorphous silicon TFT element (TFT2).

As shown in Figures 3D, 4D and 5D, a protective layer 64 is formed on the entire surface of the transparent substrate 50, and then at least a second through hole 57II and a third through hole 57III are formed in the protective layer 64 by a photolithographic etching process. , a fourth through hole 57IV and a fifth through hole 57V, and simultaneously expose the first through hole 57I. Wherein, the second through hole 57II and the third through hole 57III respectively expose the second metal layer 62 near the source/drain electrode (62A or 62B) of the second amorphous silicon TFT element (TFT2), and the fourth through hole 57IV exposes one end of the second scan line 52II, and the fifth through hole 57V exposes a part of the upper electrode 62C of the capacitor.

As shown in FIGS. 3E, 4E and 5E, a pattern with a transparent conductive layer 66 is defined and formed on the surface of the transparent substrate 50. ITO material can be used to form a rectangular display area 66P, covering the first through hole 57I, the second If the exposed areas of the via hole 57II, the third via hole 57III, the fourth via hole 57IV, and the fifth via hole 57V, the first transparent conductive layer 66I can provide the electrical connection between the upper electrode 62C of the capacitor and the second scanning line 52II. effect, while the second transparent conductive layer 66II can provide an electrical connection effect between the source line 52S and the second scan line 52II.

As shown in FIGS. 3F, 4F and 5F, a light shielding layer 68 is defined and formed on the entire surface of the transparent substrate 50, which at least covers the first transparent conductive layer 66I and the second transparent conductive layer 66II, but needs to expose the display area 66P, Then the light shielding layer 68 can shield the amorphous silicon layer 56 and isolate the parasitic OLED region 69 at the same time. In order to simplify the process, the pattern of the light shielding layer 68 covers an area other than the display area 66P. In a preferred embodiment, the material of the light-shielding layer 68 can be selected to have an opaque and insulating single-layer material (such as: CrO _x ) or a double-layer structure containing polymer resin (such as: polyimide/carbon black), Or a double-layer structure containing opaque metals (eg SiO _x /Cr).

Finally, as shown in Figures 4G and 5G, a surface treatment procedure is required before the evaporation process. Ultraviolet ozone (UV/O ₃ ) or O ₂ plasma surface cleaning process can be used, and then an organic/ The polymer luminescent material layer 70 and a cathode metal layer 72 roughly complete the AM-OLED process.

Compared with the prior art, the present invention covers the light shielding layer 68 on the surface other than the display area 66P, which can shield the amorphous silicon layer 56 to prevent it from being damaged by UV light or plasma in the subsequent surface cleaning process, thereby improving the present invention. There is a problem of increased threshold voltage or increased leakage current. In addition, the light-shielding layer 68 covers at least the first transparent conductive layer 66I and the second transparent conductive layer 66II, which can isolate the parasitic OLED region 69, thus effectively preventing the parasitic OLED region 69 from emitting light, thereby reducing unnecessary power consumption and visual interference.

Although the present invention has been disclosed above with a preferred embodiment, it is not intended to limit the present invention. Those skilled in the art should be able to make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection is defined by the appended claims.

Claims (19)

1. active system organic electroluminescent display, it includes the pixel region of a plurality of arrays, wherein includes in each pixel region:

At least two non-crystalline silicon tft elements, the raceway groove of this non-crystalline silicon tft element is made of an amorphous silicon layer;

One viewing area is made of a transparency conducting layer; And

One light shield layer covers this amorphous silicon layer of non-crystalline silicon tft element at least and exposes this viewing area.

2. active system organic electroluminescent display as claimed in claim 1, wherein this light shield layer is made of material opaque and insulation.

3. active system organic electroluminescent display as claimed in claim 2, wherein this light shield layer is by CrO _xSingle layer structure, the double-decker or the SiO of pi/carbon black _xThe double-decker of/Cr constitutes.

4. active system organic electroluminescent display as claimed in claim 1, wherein this light shield layer covers zone in addition, this viewing area.

5. active system organic electroluminescent display as claimed in claim 1, wherein this light shield layer covers this viewing area this transparency conducting layer in addition, in order to isolate the zone of a parasitic display of organic electroluminescence.

6. active system organic electroluminescent display as claimed in claim 1, wherein this transparency conducting layer is made of the ITO material.

7. active system organic electroluminescent display as claimed in claim 1, wherein each pixel region is formed by a data line that intersects vertically and the definition of one source pole line, and includes at least one capacitor in each pixel region.

8. active system organic electroluminescent display as claimed in claim 1 wherein is coated with a luminous organic material layer and a cathodic metal layer in addition on each pixel region surface.

9. the method for making of an active system organic electroluminescent display, it includes the following step:

One transparent substrates is provided;

On this transparent substrates, form a first metal layer, and the definition of this first metal layer formed two first, second sweep traces that extend along directions X and the figure of a capacitor lower electrode, wherein the bottom electrode of this capacitor is between this first, second sweep trace;

On the whole surface of this transparent substrates, form one first insulation course;

Definition forms an island structure on a predetermined TFT element area of this first sweep trace, and wherein this island structure is made of in regular turn one second insulation course and an amorphous silicon layer;

Form an etch stop layer in the top of this island structure, to cover the grid of this predetermined TFT element area;

On the surface of this island structure, form a doped amorphous silicon layer and one second metal level in regular turn;

This second metal level definition is formed one along the data line pattern of Y direction extension and the top electrode of a capacitor, and form an opening in the top of this island structure, be isolated into one source/drain electrode layer so that should be scheduled to this second metal level of TFT element area, and make this doped amorphous silicon layer of this predetermined TFT element area be isolated into one source/drain diffusion regions;

Form a protective seam on the whole surface of this transparent substrates, and form one first through hole and one second through hole in this protective seam, wherein this first through hole exposes one of this second sweep trace end, and this second through hole exposes one of top electrode of this capacitor end;

On the whole surface of this transparent substrates, form a transparency conducting layer, and this transparency conducting layer is defined the figure that forms a viewing area, make this transparency conducting layer cover the exposed region of this first through hole and this second through hole simultaneously; And

Form a light shield layer on the whole surface of this transparent substrates, wherein this light shield layer covers this amorphous silicon layer of this predetermined TFT element area at least, and this light shield layer exposes this viewing area.

10. the method for making of active system organic electroluminescent display as claimed in claim 9, other includes the following step:

Carry out surface clean technology;

Deposition one luminous organic material layer on the whole surface of this transparent substrates; And

Deposition one cathodic metal layer on the whole surface of this luminous organic material layer.

11. the method for making of active system organic electroluminescent display as claimed in claim 10, wherein this surface clean technology is ultraviolet and ozone or O ₂The plasma surface cleaning.

12. the method for making of active system organic electroluminescent display as claimed in claim 9, wherein this light shield layer is made of material opaque and insulation.

13. the method for making of active system organic electroluminescent display as claimed in claim 9, wherein this light shield layer is by CrO _xSingle layer structure, the double-decker or the SiO of pi/carbon black _xThe double-decker of/Cr constitutes.

14. the method for making of active system organic electroluminescent display as claimed in claim 9, wherein this light shield layer shields the amorphous silicon layer of this non-crystalline silicon tft element.

15. the method for making of active system organic electroluminescent display as claimed in claim 9, wherein this light shield layer covers this viewing area this transparency conducting layer in addition, in order to isolate the zone of a parasitic display of organic electroluminescence.

16. the method for making of active system organic electroluminescent display as claimed in claim 9, wherein this transparency conducting layer is made of the ITO material.

17. the method for making of active system organic electroluminescent display as claimed in claim 9, wherein the pattern of this viewing area is between this first, second sweep trace and this data line.

18. the method for making of active system organic electroluminescent display as claimed in claim 9, wherein this transparency conducting layer covers the exposed region of this first through hole and this second through hole, can make to produce between this second sweep trace and this electric capacity top electrode to be electrically connected.

19. the method for making of active system organic electroluminescent display as claimed in claim 9 when wherein making this predetermined TFT element on this first sweep trace, is also made another predetermined TFT element on this second sweep trace.

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