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CN112816737A - Accelerometer based on hemispherical FP (Fabry-Perot) cavity on-chip integrated optical machine and manufacturing method - Google Patents

Accelerometer based on hemispherical FP (Fabry-Perot) cavity on-chip integrated optical machine and manufacturing method Download PDF

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CN112816737A
CN112816737A CN202011594186.XA CN202011594186A CN112816737A CN 112816737 A CN112816737 A CN 112816737A CN 202011594186 A CN202011594186 A CN 202011594186A CN 112816737 A CN112816737 A CN 112816737A
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layer
cantilever beam
oxide layer
etching
silicon
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王建波
耿安兵
操琼
姚远
董亭亭
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717th Research Institute of CSIC
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P15/093Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values by photoelectric pick-up

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Abstract

The invention provides an accelerometer based on a hemispherical FP (Fabry-Perot) cavity on-chip integrated optical machine and a manufacturing method, which adopt a micro-acceleration sensitive structure with double-layer cantilever beams symmetrically distributed and the structural design of a hemispherical FP cavity to solve the problems of cross-axis crosstalk, low displacement measurement precision and the like in a high-precision optical MEMS accelerometer, and comprise an inertial mass block, a silicon frame, cantilever beams, a silicon substrate cover plate and a light source component; the inertial mass block, the silicon frame and the cantilever beam jointly form a sensitive structure of the accelerometer; the manufacturing method comprises the steps of manufacturing a reflecting film, an electromagnetic feedback coil, an etching oxide layer I, a device layer I, an oxygen burying layer I, an inertia mass block and the like.

Description

Accelerometer based on hemispherical FP (Fabry-Perot) cavity on-chip integrated optical machine and manufacturing method
Technical Field
The invention relates to the technical field of optical MEMS accelerometer sensors, in particular to an accelerometer based on a hemispherical FP (Fabry-Perot) cavity on-chip integrated optical machine and a manufacturing method thereof.
Background
Acceleration is a physical quantity that describes the change in the speed of an object, is the rate of change of the speed vector with respect to time, and is also a vector. The acceleration of an object is difficult to be directly measured, and the acceleration is usually converted into force to be indirectly measured by means of an inertial mass block in practice, so that the basic measurement principle is based on Newton's second theorem, an accelerometer usually comprises an acceleration sensitive unit, a displacement measurement unit and a feedback control unit, external input acceleration enables the inertial mass block in the sensitive unit to generate displacement which has a corresponding relation with the input acceleration, and a displacement measurement system obtains the input acceleration by measuring the displacement. The accelerometer generally consists of a sensitive unit, a displacement measurement unit and a signal processing unit, is a core device of an inertial navigation system, plays an important role in a plurality of application fields such as attitude detection, seismic detection, terrain detection, vibration measurement, gravity gradient measurement and the like, and has application scenes across civil, industrial and military fields. With the updating of weaponry and the continuous improvement of inertial navigation precision requirements, and the emergence of new equipment such as kinetic energy weapons, gravity gradiometers and the like, the performance requirements of accelerometers are also higher and higher. The performance indicators measuring the accelerometer are: sensitivity, resolution, dynamic range, operating bandwidth, cross-axis crosstalk magnitude, and the like.
Compared with the traditional accelerometer, the MEMS accelerometer has the advantages of high sensitivity, low noise, small volume, light weight, low cost, easy integration and the like, and is an important development direction of the accelerometer. Compared with a capacitive MEMS accelerometer, the optical MEMS accelerometer also has the advantages of electromagnetic interference resistance, quick response and the like. Therefore, the optical MEMS accelerometer is becoming a new development hotspot of the MEMS accelerometer.
The optical MEMS accelerometer is a combination of a high-precision optical displacement measuring unit and a high-sensitivity MEMS sensitive unit, and can provide acceleration measuring sensitivity exceeding 2000V/g and acceleration measuring resolution of mu g level. U.S. Pat. No. US8783106B1, "micro-machined force-based feedback accelerometer with optical displacement detection", discloses a force feedback optical accelerometer based on a diffraction grating and a MEMS acceleration sensitive unit constructed on an SOI, in which an inertial mass block and a base frame thereof are fabricated on a three-layer SOI, and a cantilever beam is used to connect the mass block and the frame. When the accelerometer is subjected to external acceleration, the mass block moves out of the plane, and the displacement of the inertial mass block is measured through the displacement measuring unit based on the diffraction grating, so that the measurement of the input acceleration is realized. Although the existing optical micro-accelerometer based on diffraction grating can provide high acceleration measurement accuracy, if the acceleration sensitive structure is not improved, the cross-axis crosstalk of the existing optical micro-accelerometer seriously affects the further improvement of the accelerometer measurement accuracy. Therefore, cross-axis crosstalk is an important performance index for measuring the accelerometer, and the cross-axis crosstalk is as small as possible for the high-precision accelerometer so as to avoid the influence on the overall performance.
The main sources of noise of the displacement measuring unit are: the photodetector shot noise, the detector amplifier circuit noise (mainly contributing to the feedback resistance thermal noise), the laser frequency (wavelength) noise contribution, and the laser power jitter noise contribution, and the displacement measurement noise mainly contributes to the laser power jitter noise and the photodetector shot noise according to the research results of other subject groups. All lasers produce small fluctuations in output intensity. The amplitude of these fluctuations is proportional to the dc intensity, and the proportionality constant is commonly referred to as the Relative Intensity Noise (RIN) of the laser. The RIN of a high quality bench laser can be made quite low, typically below the shot noise of the photodetector. However, when using inexpensive high-miniaturization light sources such as laser diodes or VCSELs, RIN will be the main noise source for displacement detection schemes. In order to eliminate RIN noise of the laser, a differential detection method is often adopted. Hall et al use first order light and zero order light to perform a difference mode to eliminate RIN noise, and experimental results show that the displacement resolution of the optical displacement measurement unit reaches 56fm/√ Hz @0.1 Hz. But this design is not suitable for MEMS optoelectronic integration since the packaged VCSEL, focusing lens and routing mirror take up a lot of space in the accelerometer. In order to solve the problem of miniaturization and integration of accelerometers, in 2017, a phase modulation diffraction grating is designed and manufactured, the amplitude of a zero-order diffraction beam is successfully reduced by applying half-wavelength phase shift to part of reflected light, the modulation performance of a first-order diffraction beam is improved to the maximum extent, and the displacement resolution of the grating is measured and obtained through experiments and reaches 3.6fm/√ Hz. Ideally, this type of grating would theoretically eliminate the zero order diffracted light completely, but in practice, some non-ideal effects such as spurious reflections from planar substrates, diffraction gratings and mirrors, and manufacturing and alignment tolerances are not as expected. The Luqianbao of Zhejiang university proposes an optical displacement measurement scheme based on three-optical-path compensation, the system comprises three optical paths, one of which is a +/-1-level output optical path of a micro-nano optical cavity, and a light intensity signal is received by PD 1; the other path is a reference light path for measuring the light intensity fluctuation of the laser, and a light intensity signal is received by the PD 3; the third path is the light path for detecting the ambient light intensity, and the PD2 is the detector of the path. The polaroid and the half-wave plate in the light path form an isolator to prevent reflected light from influencing the laser, and the attenuator is used for adjusting the light intensity of the reference light path. Experiments show that the method can obviously improve the signal-to-noise ratio and inhibit low-frequency noise caused by light intensity fluctuation of a light source and ambient light. In addition, the heterodyne micro-nano optical cavity high-precision optical displacement measurement scheme based on three-optical-path compensation can realize the displacement measurement sensitivity of 44.75mV/nm and the displacement measurement resolution of 0.017nm, and the optical displacement measurement unit which can be calculated and obtained by defining the noise equivalent displacement can reach 600fm/√ Hz. Compared with the traditional interference diffraction displacement measurement scheme, the accuracy is improved by more than one order of magnitude. It is noted that the signal processing system used in the optical displacement measurement unit has a low performance, and the dark current signal fluctuates by as much as 1mV at a sampling rate of 1kHz, thereby limiting further improvement of the accuracy of displacement measurement [ patent no: CN201510292513, 204832242U ]. According to the principle that a monocrystalline silicon material is permeable to laser with a specific wavelength, a modal coupling lens is adopted to couple light with the specific wavelength into an FP cavity, and reflected (transmitted) optical signals are obtained by a circulator, a photoelectric detector and a spectrometer through measurement. When the fineness of the FP cavity is 1600, the displacement resolution of the hemispherical FP cavity obtained by experimental measurement reaches 0.2 fm/V Hz, and compared with other displacement measurement schemes, the scheme has the advantages of simple structure, high resolution, convenience for on-chip integration and the like.
Disclosure of Invention
The invention provides an accelerometer based on an integrated optical machine on a hemispherical FP (Fabry-Perot) cavity plate and a manufacturing method thereof, which adopt a micro-acceleration sensitive structure with double-layer cantilever beams symmetrically distributed and the structural design of a hemispherical FP cavity and solve the problems of cross-axis crosstalk, low displacement measurement precision and the like in an optical MEMS accelerometer.
The invention discloses a technical scheme of an on-chip integrated optical-mechanical accelerometer based on a hemispherical FP (Fabry-Perot) cavity, which comprises the following steps: the device comprises an inertial mass block, a silicon frame, a cantilever beam, a silicon substrate cover plate and a light source component; the inertial mass block, the silicon frame and the cantilever beam jointly form a sensitive structure of the accelerometer;
the inertial mass block and the silicon frame are manufactured by superposing seven layers of SOI (silicon on insulator) substrates, and the seven layers of SOI substrates sequentially comprise an oxide layer I, a device layer I, an oxygen burying layer I, a basal layer, an oxygen burying layer II, a device layer II and an oxide layer II from top to bottom;
the inertia mass block is of a cylindrical structure, a through hole is formed in the center of the silicon frame, the inertia mass block is arranged in the through hole of the silicon frame, an upper layer of cantilever beam and a lower layer of cantilever beam are arranged between the inertia mass block and the silicon frame, four cantilever beams are arranged on each layer, two ends of the upper layer of four cantilever beams are respectively connected with the inertia mass block and a device layer I of the silicon frame, and two ends of the lower layer of four cantilever beams are respectively connected with the inertia mass block and a device layer II of the silicon frame;
the silicon substrate cover plate is arranged below the silicon frame and fixedly connected with an oxide layer II of the silicon frame, a groove is formed in the center of the silicon substrate cover plate, a hemispherical micro-cavity (a hemispherical FP cavity is formed by an area between the hemispherical micro-cavity and the end face of the inertia mass block) is formed in the center of the bottom of the groove, and the light source assembly is located at the outer bottom of the silicon substrate cover plate and is right opposite to the hemispherical micro-cavity.
Preferably, on the seven-layer SOI substrate, the oxide layer I and the oxide layer II, the device layer I and the device layer II, and the buried oxide layer I and the buried oxide layer II are respectively symmetrical with respect to a central plane of the substrate layer, the inertial mass block is disposed right above the hemispherical micro-cavity and coaxial with an inner hole of the silicon frame, an end surface of the inertial mass block facing toward the silicon substrate cover plate is plated with a reflective film, an end surface facing away from the silicon substrate cover plate is plated with an electromagnetic feedback coil, the device layer I and the device layer II are monocrystalline silicon with the same thickness, and the oxide layer I, the buried oxide layer II and the oxide layer II are silicon dioxide with the same thickness.
Preferably, the cantilever beam is a thin-walled part with a plane S-shaped serpentine structure, and is of an integrated structure with the corresponding device layer, the cantilever beam and the corresponding device layer have the same thickness, and in the projection of the cantilever beam on the same plane parallel to the end face of the inertial mass block, the included angle between two adjacent projections is 45 °.
Preferably, an antireflection film is deposited on the outer bottom surface of the silicon substrate cover plate, and the inner diameter of the groove in the center of the silicon substrate cover plate is larger than the outer diameter of the inertia mass block.
The invention discloses a manufacturing method of an on-chip integrated optical-mechanical accelerometer based on a hemispherical FP (Fabry-Perot) cavity, which comprises the following steps of:
s1, manufacturing a reflecting film on the upper end face of the SOI substrate, and manufacturing an electromagnetic feedback coil on the lower end face of the SOI substrate;
s2, etching an oxide layer I in the SOI substrate to manufacture an upper protective oxide layer pattern of the upper cantilever beam;
s3, manufacturing a cantilever beam pattern on a device layer I in the SOI substrate;
s4, etching the buried oxide layer I in the SOI substrate to manufacture a lower protective oxide layer pattern of the upper cantilever beam;
s5, etching an oxide layer II in the SOI substrate to manufacture an upper protective oxide layer pattern of the lower cantilever beam;
s6, manufacturing a cantilever beam pattern on the lower device layer II in the SOI substrate;
s7, etching the buried oxide layer II in the SOI substrate to manufacture a lower protective oxide layer pattern of the lower cantilever beam;
s8, manufacturing an inertia mass block on the substrate layer in the SOI substrate;
s9, etching a groove on the silicon substrate cover plate, and then depositing a layer of silicon nitride mask layer which is etched by a wet method on the upper surface of the silicon substrate cover plate;
and S10, wet etching the hemispherical micro-cavity structure on the silicon substrate cover plate.
Preferably, before step S1, the method includes performing RCA standard cleaning on the SOI substrate, making a mask pattern for coating by using a double-layer resist as a mask and using a photolithography method, plating a chromium film and a gold film by using a magnetron sputtering or electron beam evaporation method, and finally obtaining the electromagnetic feedback coil and the reflective film on the surface of the structure by using a lift-off process.
Preferably, in step S2, the shape of the cantilever is transferred to the oxide layer I in the SOI substrate by using a photoresist as a mask, and then the cantilever is etched on the oxide layer I by using a reactive ion beam etching method, which is used as an upper protection layer of the upper cantilever;
preferably, in step S3, etching an upper cantilever structure on the device layer I by using a Deep Reactive Ion Etching (DRIE) method;
in step S4, etching a cantilever beam shape structure on the buried oxide layer I by using a Reactive Ion Etching (RIE) method, which serves as a lower protection layer of the upper cantilever beam;
in step S5, the thick photoresist is used as a mask, the pattern of the cantilever beam is transferred to the oxide layer II in the SOI substrate by means of reverse overlay, and then the shape structure of the cantilever beam is etched on the oxide layer II by means of reactive ion beam etching, which is used as an upper protection layer of the lower cantilever beam;
in step S6, etching a lower cantilever beam structure on the device layer II by deep reactive ion etching, where the etched lower cantilever beam is not directly opposite to the upper cantilever beam, and it is ensured that in the projections of the upper and lower cantilever beams on the same plane parallel to the upper end surface of the SOI substrate, an included angle between two adjacent projections is 45 °;
in step S7, etching a cantilever beam-shaped structure on the buried oxide layer II by reactive ion beam etching, which serves as a lower protective layer of the lower cantilever beam;
in step S8, first, an inertial mass is etched on the base layer by a deep reactive ion etching method; then, removing the residual exposed oxide layer in the SOI substrate by using a wet etching mode to release the cantilever beam and inertia mass block structure; finally, the residual stress of the sensitive structure is released by annealing.
Further, in step S9, a groove is etched on the silicon substrate cover plate by using a deep reactive ion etching method, silicon nitride with a certain thickness is deposited by using a low-pressure chemical vapor deposition method to serve as a mask for preparing the hemispherical micro-cavity, and then the silicon nitride above the position of the hemispherical micro-cavity to be etched is removed to form a hole; depositing an anti-reflection film on the outer bottom surface of the silicon substrate cover plate;
in step S10, a hemispherical microcavity is obtained by etching with a mixed solution of hydrofluoric acid, nitric acid and acetic acid.
Furthermore, in step S5, when glue is applied to the oxide layer II of the SOI substrate, the thickness of the glue is ensured to be able to withstand the etching of the oxide layer II, the device layer II, the buried oxide layer II, and the substrate layer; in the process of masking, a separation groove is set on the mask plate; in step S8, the sensitive structure needs to be stripped by one or more of organic cleaning, acid cleaning and dry cleaning.
The beneficial effect of above-mentioned scheme lies in:
1. the design of the cantilever beam can realize the acceleration-displacement high sensitivity of the MEMS acceleration sensitive structure;
2. by adopting the design of double-layer symmetrical distribution, when the inertial mass block is subjected to the acceleration in the non-sensitive axis direction, the upper cantilever beam and the lower cantilever beam are subjected to the equal torque and the opposite torque, so that the torsion cannot occur, the sensitive axial displacement and the rotation of the mass block caused by the non-sensitive axial acceleration are fundamentally eliminated, and the off-axis crosstalk is inhibited;
3. the adopted micro-processing technology is mostly mature photoetching and etching technology, can ensure higher depth-to-width ratio and side wall verticality, can be compatible with IC technology, and realizes batch production;
4. the damage of the sensitive structure of the MEMS accelerometer due to overlarge pressure difference or stress mismatch and the like in the etching and releasing processes is optimized, and the success rate of the flow sheet is improved on the premise of ensuring the suppression of crosstalk;
5. the semi-spherical optical cavity is adopted to improve the fineness of the cavity, realize displacement measurement with higher precision and further realize high-precision measurement of acceleration.
Drawings
Fig. 1 and 2 are schematic structural diagrams of an accelerometer according to the present invention.
Figure 3 is a cross-sectional view of an accelerometer of the present invention.
Fig. 4 is a schematic diagram of step S1 in the method for manufacturing an accelerometer according to the present invention.
Fig. 5 is a schematic diagram of step S2 in the method for manufacturing an accelerometer according to the present invention.
Fig. 6 is a schematic diagram of step S3 in the method for manufacturing an accelerometer according to the present invention.
Fig. 7 is a schematic diagram of step S4 in the method for manufacturing an accelerometer according to the present invention.
Fig. 8 is a schematic diagram of step S5 in the method for manufacturing an accelerometer according to the invention.
Fig. 9 is a schematic diagram of step S6 in the method for manufacturing an accelerometer according to the invention.
Fig. 10 is a schematic diagram of step S7 in the method for manufacturing an accelerometer according to the invention.
Fig. 11 is a schematic diagram of step S8 in the method for manufacturing an accelerometer according to the invention.
Fig. 12 is a schematic diagram of step S9 in the method for manufacturing an accelerometer according to the invention.
Fig. 13 is a schematic diagram of step S9 in the method for manufacturing an accelerometer according to the invention.
Fig. 14 is a schematic diagram of step S9 in the method for manufacturing an accelerometer according to the invention.
Fig. 15 is a schematic diagram of step S10 in the method for manufacturing an accelerometer according to the invention.
Detailed Description
Embodiments of the present invention are described in detail below with reference to the accompanying drawings.
First, the specific embodiment of the on-chip integrated opto-mechanical accelerometer based on the hemispherical FP cavity according to the present invention will be described in detail.
As shown in fig. 1, the structure of the present embodiment includes an inertial mass block 1, a silicon frame 2, a cantilever beam 3, a silicon substrate cover plate 4 and a light source assembly 5, where the inertial mass block 1, the silicon frame 2 and the cantilever beam 3 together form a sensitive structure of the accelerometer;
the inertial mass block 1 and the silicon frame 2 are manufactured by superposing seven layers of SOI substrates, wherein the seven layers of SOI substrates sequentially comprise an oxide layer I8, a device layer I9, an oxygen burying layer I10, a basal layer 11, an oxygen burying layer II12, a device layer II13 and an oxide layer II14 from top to bottom;
the inertia mass block 1 is of a cylindrical structure, a through hole 201 is formed in the center of the silicon frame 2, the inertia mass block 1 is arranged in the through hole 201 of the silicon frame, an upper cantilever beam 31 and a lower cantilever beam 32 are arranged between the inertia mass block 1 and the silicon frame 2, four cantilever beams are arranged on each layer of cantilever beam 3, two ends of the upper four cantilever beams 31 are respectively connected with the inertia mass block 1 and a device layer I9 of the silicon frame 2, and two ends of the lower four cantilever beams 32 are respectively connected with the inertia mass block 1 and a device layer II13 of the silicon frame 2;
the silicon substrate cover plate 4 is arranged below the silicon frame 2 and fixedly connected with an oxide layer II14 of the silicon frame 2, a groove is formed in the center of the silicon substrate cover plate 4, a hemispherical micro-cavity 41 is formed in the center of the bottom of the groove, and the light source assembly 5 is located at the outer bottom of the silicon substrate cover plate 4 and is right opposite to the hemispherical micro-cavity 41.
In this embodiment, on the seven-layer SOI substrate, the oxide layer I8 and the oxide layer II14, the device layer I9 and the device layer II13, the buried oxide layer I10 and the buried oxide layer II12 are respectively symmetric with respect to the central plane of the substrate layer 11, the inertial mass 1 is disposed right above the hemispherical micro-cavity 41 and is coaxial with the inner hole of the silicon frame 2, the end surface of the inertial mass 1 facing the silicon substrate cover plate 4 is plated with the reflective film 7, the end surface facing away from the silicon substrate cover plate 4 is plated with the electromagnetic feedback coil 6, the device layer I9 and the device layer II13 are monocrystalline silicon with the same thickness, and the oxide layer I8, the buried oxide layer I10, the buried oxide layer II12 and the oxide layer II14 are silicon dioxide with the same thickness.
In this embodiment, the cantilever beam 3 is a thin-walled part with a plane S-shaped meandering structure, and is of an integrated structure with a corresponding device layer, the cantilever beam 3 has the same thickness as the corresponding device layer, and in the projection of the cantilever beam 3 on the same plane parallel to the end face of the inertial mass block 1, the included angle between two adjacent projections is 45 °.
In this embodiment, an antireflection film 15 is deposited on the outer bottom surface of the silicon substrate cover plate 4, and the inner diameter of the central groove of the silicon substrate cover plate 4 is larger than the outer diameter of the inertial mass 1.
After the sensitive structure of the structure is packaged with the hemispherical microcavity 41, the inertial mass block 1 and the cantilever beam 3 can be suspended and applied to a high-precision uniaxial optical micro-accelerometer; in the high-precision uniaxial optical micro-accelerometer, the sensitive structure is positioned right below the diffraction grating, the reflecting film 7 on the upper surface of the inertial mass block 1 and the diffraction grating form a grating interference diffraction cavity, and the optical displacement measuring unit formed by the grating interference diffraction cavity can obtain the acceleration applied from the outside by measuring the displacement of the inertial mass block 1.
Because the double-layer cantilever beam 3 of the MEMS acceleration sensitive structure for inhibiting the cross-axis crosstalk is symmetrically designed, when the inertial mass block 1 is subjected to input of non-sensitive axial acceleration (the direction insensitive to the motion of the inertial mass block 1, the in-plane direction of a silicon wafer is the non-sensitive direction), the upper layer cantilever beam 323 and the lower layer cantilever beam 323 caused by the non-sensitive axial acceleration are subjected to torques with equal magnitude and opposite directions, so that the total torque is zero, the inertial mass block 1 cannot generate extra torsion and displacement of the sensitive axial direction (the direction sensitive to the motion of the inertial mass block 1, and the out-of-plane direction is the sensitive direction), further the non-sensitive axial acceleration cannot influence subsequent optical displacement measurement and acceleration measurement, and the cross-axis crosstalk is inhibited.
Meanwhile, the thickness of the device layer is very small compared with the thickness of the SOI, so that the micro acceleration sensitive structure can have high acceleration-displacement sensitivity.
Theoretically, the sensitive structure proposed by the present embodiment is in the thickness of the double-layer cantilever beam 3When the difference is 0.5 mu m, the cross-axis crosstalk is less than 0.01 percent, and the thickness difference of the cantilever beam 3 is mainly introduced by the manufacturing level of the SOI wafer device layer. In addition, the frequency separation ratio of the non-sensitive axis and sensitive axis working modes of the structure is about 12: compared with a single-layer structure, the improvement is more than 5 times, and the capability of a sensitive structure for resisting high-order mechanical modal disturbance can be effectively improved; the hemispherical microcavity 41 has simple structure and easy manufacture, and the displacement measurement noise reaches 0.4fm/Hz0.5
The manufacturing process method of the structure comprises the following steps:
s1, manufacturing a reflecting film 7 on the upper end face of the SOI substrate, and manufacturing an electromagnetic feedback coil 6 on the lower end face;
s2, etching an oxide layer I8 in the SOI substrate to manufacture an upper protective oxide layer pattern of the upper cantilever beam 3;
s3, manufacturing a cantilever beam 3 graph on a device layer I9 in the SOI substrate;
s4, etching the buried oxide layer I10 in the SOI substrate to manufacture a lower protective oxide layer pattern of the upper cantilever beam 313;
s5, etching an oxide layer II14 in the SOI substrate to manufacture an upper protective oxide layer pattern of the lower cantilever beam 323;
s6, manufacturing a cantilever beam 3 graph on a lower device layer II13 in the SOI substrate;
s7, etching the buried oxide layer II12 in the SOI substrate to manufacture a lower protective oxide layer pattern of the lower cantilever beam 323;
s8, manufacturing an inertial mass block 1 on the substrate layer 11 in the SOI substrate;
s9, etching a groove on the silicon substrate cover plate 4, and then depositing a layer of silicon nitride mask layer which is etched by a wet method on the upper surface of the silicon substrate cover plate 4;
and S10, wet etching the hemispherical micro-cavity 41 structure on the silicon substrate cover plate 4.
Specifically, before step S1, the SOI substrate needs to be subjected to RCA standard cleaning, then a mask pattern for coating is made by using a double-layer resist as a mask and using a photolithography method, then a chromium film and a gold film are respectively plated by using a magnetron sputtering or electron beam evaporation method, and finally an electromagnetic feedback coil 6 and a reflective film 7 on the structural surface are obtained by using a stripping process.
In step S2, firstly, using a thin glue as a mask, and transferring the shape of the cantilever beam 3 to the oxide layer I8 in the SOI substrate by photolithography, and then etching the shape structure of the cantilever beam 3 on the oxide layer I8 by reactive ion beam etching, which is used as an upper protection layer of the upper cantilever beam 313;
in step S3, etching the upper cantilever beam 313 structure on the device layer I9 by deep reactive ion etching;
in step S4, etching the shape structure of the cantilever 3 on the buried oxide layer I10 by reactive ion etching, which serves as a lower protection layer of the upper cantilever 313;
in step S5, the thick photoresist is used as a mask, the pattern of the cantilever beam 3 is transferred to the oxide layer II14 in the SOI substrate by means of reverse overlay, and then the shape structure of the cantilever beam 3 is etched on the oxide layer II14 by means of reactive ion beam etching, which serves as an upper protection layer of the lower cantilever beam 323;
in step S6, etching a lower cantilever beam 323 structure on the device layer II13 by deep reactive ion etching, where the etched lower cantilever beam 323 is not directly opposite to the upper cantilever beam 313, so as to ensure that an included angle between two adjacent projections is 45 ° in the projections of the upper and lower cantilever beams 323 on the same plane parallel to the upper end surface of the SOI substrate;
in step S7, etching the shape structure of the cantilever beam 3 on the buried oxide layer II12 by reactive ion beam etching, which serves as a lower protective layer of the lower cantilever beam 323;
in step S8, first, the inertial mass 1 is etched on the substrate layer 11 by deep reactive ion etching; then, removing the residual exposed oxide layer in the SOI substrate by using a wet etching mode to release the cantilever beam 3 and the inertial mass block 1 structure; finally, the residual stress of the sensitive structure is released by annealing.
Further, in step S9, a groove is etched on the silicon substrate cover plate 4 by using a deep reactive ion etching method, silicon nitride 16 with a certain thickness is deposited by using a low-pressure chemical vapor deposition method to be used as a mask for preparing the hemispherical micro-cavity 41, and then the silicon nitride above the position of the hemispherical micro-cavity 41 to be etched is removed to form a hole 41; depositing an antireflection film 15 on the outer bottom surface of the silicon substrate cover plate 4;
in step S10, a hemispherical micro-cavity 41 is obtained by etching with a mixed solution of hydrofluoric acid, nitric acid and acetic acid.
Furthermore, in step S5, when glue is applied to the oxide layer II14 of the SOI substrate, the thickness of the glue is ensured to withstand the etching of the oxide layer II14, the device layer II13, the buried oxide layer II12 and the base layer 11; in the process of masking, a separation groove is set on the mask plate; in step S8, the sensitive structure needs to be stripped by one or more of organic cleaning, acid cleaning and dry cleaning.
In summary, the embodiment provides an accelerometer based on an integrated optical mechanical system on hemispherical microcavity 41 chip and a manufacturing method thereof, wherein structures such as a silicon frame 2, a cantilever beam 3, an inertial mass block 1 and the like are manufactured on a specially designed seven-layer SOI substrate, and by adopting a design of double-layer symmetrical distribution, when the inertial mass block 1 is subjected to acceleration in a non-sensitive axis direction, the upper and lower cantilever beams 323 will not be twisted by equal and opposite moments, so that sensitive axial displacement and rotation of the mass block caused by the non-sensitive axial acceleration are fundamentally eliminated, and cross-axis crosstalk influence is suppressed. The design of the hemispherical micro-cavity 41 effectively improves the displacement measurement accuracy of the hemispherical micro-cavity 41, and the micro-machining manufacturing method provided by the embodiment is proved to be practical and effective by the embodiment and can be compatible with an IC (integrated circuit) process, thereby laying a foundation for mass production.
The above is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes will occur to those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (9)

1. An on-chip integrated optical-mechanical accelerometer based on a hemispherical FP (Fabry-Perot) cavity is characterized in that: the accelerometer comprises an inertial mass block, a silicon frame, a cantilever beam, a silicon substrate cover plate and a light source component, wherein the inertial mass block, the silicon frame and the cantilever beam jointly form a sensitive structure of the accelerometer;
the inertial mass block and the silicon frame are manufactured by superposing seven layers of SOI (silicon on insulator) substrates, and the seven layers of SOI substrates sequentially comprise an oxide layer I, a device layer I, an oxygen burying layer I, a basal layer, an oxygen burying layer II, a device layer II and an oxide layer II from top to bottom;
the inertia mass block is of a cylindrical structure, a through hole is formed in the center of the silicon frame, the inertia mass block is arranged in the through hole of the silicon frame, an upper layer of cantilever beam and a lower layer of cantilever beam are arranged between the inertia mass block and the silicon frame, four cantilever beams are arranged on each layer, two ends of the upper layer of four cantilever beams are respectively connected with the inertia mass block and a device layer I of the silicon frame, and two ends of the lower layer of four cantilever beams are respectively connected with the inertia mass block and a device layer II of the silicon frame;
the silicon substrate cover plate is arranged below the silicon frame and fixedly connected with an oxide layer II of the silicon frame, a groove is formed in the center of the silicon substrate cover plate, a hemispherical micro-cavity is formed in the center of the bottom of the groove, and the light source assembly is located at the outer bottom of the silicon substrate cover plate and is right opposite to the hemispherical micro-cavity.
2. The on-chip integrated opto-mechanical accelerometer based on hemispherical FP cavity as claimed in claim 1, wherein: on seven layers of SOI substrates, oxide layer I and oxide layer II, device layer I and device layer II, oxygen buried layer I and oxygen buried layer II are respectively about the central plane symmetry of stratum basale, inertia mass block locates directly over the hemisphere microcavity, and coaxial with the silicon frame hole, and the terminal surface towards silicon substrate apron has plated the reflectance coating on the inertia mass block, and the terminal surface that is the back of the way silicon substrate apron has plated the electromagnetic feedback coil, device layer I and device layer II are the monocrystalline silicon that thickness is the same, and oxide layer I, oxygen buried layer II and oxide layer II are the same silica of thickness.
3. The on-chip integrated opto-mechanical accelerometer based on hemispherical FP cavity as claimed in claim 1, wherein: the cantilever beam is a thin-wall part with a plane S-shaped serpentine structure and is of an integrated structure with a corresponding device layer, the cantilever beam is the same as the corresponding device layer in thickness, and in the projection of the cantilever beam on the same plane parallel to the end face of the inertial mass block, the included angle between every two adjacent projections is 45 degrees.
4. The on-chip integrated opto-mechanical accelerometer based on hemispherical FP cavity as claimed in claim 1, wherein: and an antireflection film is deposited on the outer bottom surface of the silicon substrate cover plate, and the inner diameter of the groove in the center of the silicon substrate cover plate is larger than the outer diameter of the inertia mass block.
5. A manufacturing method of an on-chip integrated optical-mechanical accelerometer based on a hemispherical FP (Fabry-Perot) cavity is characterized by comprising the following steps:
s1, manufacturing a reflecting film on the upper end face of the SOI substrate, and manufacturing an electromagnetic feedback coil on the lower end face of the SOI substrate;
s2, etching an oxide layer I in the SOI substrate to manufacture an upper protective oxide layer pattern of the upper cantilever beam;
s3, manufacturing a cantilever beam pattern on a device layer I in the SOI substrate;
s4, etching the buried oxide layer I in the SOI substrate to manufacture a lower protective oxide layer pattern of the upper cantilever beam;
s5, etching an oxide layer II in the SOI substrate to manufacture an upper protective oxide layer pattern of the lower cantilever beam;
s6, manufacturing a cantilever beam pattern on the lower device layer II in the SOI substrate;
s7, etching the buried oxide layer II in the SOI substrate to manufacture a lower protective oxide layer pattern of the lower cantilever beam;
s8, manufacturing an inertia mass block on the substrate layer in the SOI substrate;
s9, etching a groove on the silicon substrate cover plate, and then depositing a layer of silicon nitride mask layer which is etched by a wet method on the upper surface of the silicon substrate cover plate;
and S10, wet etching the hemispherical micro-cavity structure on the silicon substrate cover plate.
6. The method of manufacturing an on-chip integrated opto-mechanical accelerometer based on hemispherical FP cavity of claim 5, wherein: before step S1, the SOI substrate needs to be subjected to RCA standard cleaning, then a mask pattern for coating is made by using a double-layer resist as a mask and using a photolithography method, then a chromium film and a gold film are respectively plated by using a magnetron sputtering or electron beam evaporation method, and finally an electromagnetic feedback coil and a reflective film on the surface of the structure are obtained by using a stripping process.
7. The method of manufacturing an on-chip integrated opto-mechanical accelerometer based on hemispherical FP cavity of claim 5, wherein: in step S2, first, using the thin glue as a mask, transferring the shape of the cantilever beam to the oxide layer I in the SOI substrate by photolithography, and then etching the shape structure of the cantilever beam on the oxide layer I by reactive ion etching, which is used as an upper protection layer of the upper cantilever beam;
in step S3, etching an upper cantilever structure on the device layer I by using a deep reactive ion etching method;
in step S4, etching a cantilever beam-shaped structure on the buried oxide layer I by reactive ion etching, which serves as a lower protective layer of the upper cantilever beam;
in step S5, the thick photoresist is used as a mask, the pattern of the cantilever beam is transferred to the oxide layer II in the SOI substrate by means of reverse overlay, and then the shape structure of the cantilever beam is etched on the oxide layer II by means of reactive ion beam etching, which is used as an upper protection layer of the lower cantilever beam;
in step S6, etching a lower cantilever beam structure on the device layer II by deep reactive ion etching, where the etched lower cantilever beam is not directly opposite to the upper cantilever beam, and it is ensured that in the projections of the upper and lower cantilever beams on the same plane parallel to the upper end surface of the SOI substrate, an included angle between two adjacent projections is 45 °;
in step S7, etching a cantilever beam-shaped structure on the buried oxide layer II by reactive ion etching, which serves as a lower protective layer of the lower cantilever beam;
in step S8, first, an inertial mass is etched on the base layer by a deep reactive ion etching method; then, removing the residual exposed oxide layer in the SOI substrate by using a wet etching mode to release the cantilever beam and inertia mass block structure; finally, the residual stress of the sensitive structure is released by annealing.
8. The method of manufacturing an on-chip integrated opto-mechanical accelerometer based on hemispherical FP cavity of claim 5, wherein: in step S9, a groove is etched on a silicon substrate cover plate by a deep reactive ion etching method, silicon nitride with a certain thickness is deposited by a low-pressure chemical vapor deposition method to be used as a mask for preparing a hemispherical micro-cavity, and then the silicon nitride above the position of the hemispherical micro-cavity to be etched is removed to form a hole; depositing an anti-reflection film on the outer bottom surface of the silicon substrate cover plate;
in step S10, a hemispherical microcavity is obtained by etching with a mixed solution of hydrofluoric acid, nitric acid and acetic acid.
9. The method of manufacturing an on-chip integrated optical-mechanical accelerometer based on a hemispherical FP cavity of claim 7, wherein: in step S5, when glue is applied to the oxide layer II of the SOI substrate, the thickness of the glue is ensured to be able to withstand the etching of the oxide layer II, the device layer II, the buried oxide layer II, and the base layer;
in the process of masking, a separation groove is set on the mask plate;
in step S8, the sensitive structure needs to be stripped by one or more of organic cleaning, acid cleaning and dry cleaning.
CN202011594186.XA 2020-12-29 2020-12-29 Accelerometer based on hemispherical FP (Fabry-Perot) cavity on-chip integrated optical machine and manufacturing method Pending CN112816737A (en)

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