CN112711779B - Self-destruction circuit and electronic equipment - Google Patents
Self-destruction circuit and electronic equipment Download PDFInfo
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- CN112711779B CN112711779B CN202110062347.9A CN202110062347A CN112711779B CN 112711779 B CN112711779 B CN 112711779B CN 202110062347 A CN202110062347 A CN 202110062347A CN 112711779 B CN112711779 B CN 112711779B
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
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Abstract
The embodiment of the application relates to the technical field of information safety, and provides a self-destruction circuit and electronic equipment, wherein the self-destruction circuit comprises a signal sampling processing circuit, a first signal conversion circuit and a main processor, and when the electronic equipment receives a high-level self-destruction signal through a signal interface, on one hand, the first signal conversion circuit converts the high-level self-destruction signal into a power supply signal so as to supply power for the signal sampling processing circuit and the main processor; on the other hand, the signal sampling processing circuit converts the high-level self-destruction signal into a soft self-destruction signal and then sends the soft self-destruction signal to the main processor, and the main processor sends a soft self-destruction instruction to the circuit to be destroyed of the electronic equipment after determining that the soft self-destruction signal is effective so as to self-destroy the circuit to be destroyed. That is, once the high-level self-destruction signal is received, the high-level self-destruction signal is used for power supply, so that the self-destruction effect of the circuit to be destroyed is not affected no matter whether the electronic equipment is unstable in power supply or is powered off.
Description
Technical Field
The embodiment of the application relates to the technical field of information security, in particular to a self-destruction circuit and electronic equipment.
Background
In the present day when information data is widely used, disclosure of important data in various devices, which store important data such as personal privacy information, company business secrets, military secrets, etc., has become a potential serious threat to data security, and once disclosure, the disclosure will cause immeasurable influence on individuals and clusters. Therefore, it is particularly important and necessary to add a self-destruction device for key devices to important electronic equipment.
However, in the process of executing self-destruction, if the whole equipment is powered unstably or powered off, the traditional soft self-destruction circuit cannot realize the self-destruction function or is not completely self-destroyed, so that potential safety hazards exist.
Disclosure of Invention
An objective of the embodiments of the present application is to provide a self-destruction circuit and an electronic device for improving the above-mentioned problems.
In order to achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:
in a first aspect, an embodiment of the present application provides a self-destruction circuit, which is applied to an electronic device, where the self-destruction circuit includes a signal sampling processing circuit, a first signal conversion circuit, and a main processor; the input end of the first signal conversion circuit is electrically connected with a signal interface of the electronic equipment, and the output end of the first signal conversion circuit is electrically connected with the signal sampling processing circuit and the main processor; the signal interface, the signal sampling processing circuit, the main processor and the circuit to be destroyed of the electronic equipment are electrically connected in sequence;
the first signal conversion circuit is used for receiving a high-level self-destruction signal and converting the high-level self-destruction signal into a power supply signal to supply power for the signal sampling processing circuit and the main processor;
the signal sampling processing circuit is used for receiving the high-level self-destruction signal, converting the high-level self-destruction signal into a soft self-destruction signal and then transmitting the soft self-destruction signal to the main processor;
and the main processor is used for sending a soft self-destruction instruction to the circuit to be destroyed after determining that the soft self-destruction signal is effective so as to cause the circuit to be destroyed.
Optionally, the self-destruction circuit further comprises a control circuit, the control circuit is electrically connected with the output end of the first signal conversion circuit, and the control circuit is electrically connected with the main processor and the circuit to be destroyed; the first signal conversion circuit is further used for transmitting the power supply signal to the control circuit to supply power for the control circuit; the main processor is further used for sending a soft self-destruction instruction to the control circuit after determining that the soft self-destruction signal is valid; the control circuit is used for controlling the self-destruction of the circuit to be destroyed according to the soft self-destruction instruction.
Optionally, the self-destruction circuit further comprises a switch circuit, wherein the input end of the switch circuit is electrically connected with the signal interface, the output end of the switch circuit is respectively electrically connected with the main processor and the circuit to be destroyed, and the control end of the switch circuit is electrically connected with the control circuit;
the main processor is also used for sending a hard self-destruction instruction to the control circuit after receiving a soft self-destruction completion signal returned by the circuit to be destroyed;
the control circuit is also used for controlling the switch circuit to be conducted according to the hard self-destruction instruction and transmitting the high-level self-destruction signal to the circuit to be destroyed and the main processor so as to burn the circuit to be destroyed and the main processor.
Optionally, the self-destruction circuit further includes a second signal conversion circuit, an input end of the second signal conversion circuit is electrically connected with a power supply of the electronic device, and an output end of the second signal conversion circuit is electrically connected with the signal sampling processing circuit, the main processor, the control circuit and other circuits of the electronic device respectively;
and the second signal conversion circuit is used for respectively transmitting power supply signals provided by the power supply to the signal sampling processing circuit, the main processor, the control circuit and the other circuits when the power supply normally supplies power to supply power to the signal sampling processing circuit, the main processor, the control circuit and the other circuits.
Optionally, the second signal conversion circuit includes a first isolation circuit and a switch control circuit; the input end of the first isolation circuit is electrically connected with the power supply, the output end of the first isolation circuit is respectively electrically connected with the signal sampling processing circuit, the main processor, the control circuit and the switch control circuit, and the control end of the first isolation circuit is electrically connected with the control circuit; the control circuit is electrically connected with the switch control circuit, and the switch control circuit is electrically connected with the other circuits;
the first isolation circuit is used for transmitting the power supply signal to the signal sampling processing circuit, the main processor and the control circuit respectively when the power supply supplies power normally, and transmitting the power supply signal to the other circuits through the switch control circuit.
Optionally, the first signal conversion circuit includes a first power conversion circuit and a second isolation circuit; the input end of the first power conversion circuit is electrically connected with the signal interface, and the output end of the first power conversion circuit is electrically connected with the first isolation circuit, the second isolation circuit and the control circuit respectively; the second isolation circuit is respectively and electrically connected with the signal sampling processing circuit, the main processor, the control circuit and the switch control circuit;
the first power supply conversion circuit is used for converting the high-level self-destruction signal into the power supply signal;
the first power conversion circuit is further configured to:
transmitting the power supply signal to the first isolation circuit to turn off the first isolation circuit;
transmitting the power supply signal to the control circuit so that the control circuit turns off the switch control circuit according to the power supply signal to stop supplying power to the other circuits;
and transmitting the power supply signal to the signal sampling processing circuit, the main processor and the control circuit through the second isolation circuit to supply power to the signal sampling processing circuit, the main processor and the control circuit.
Optionally, the first isolation circuit includes a first MOS transistor, a first resistor, and a second resistor;
the drain electrode of the first MOS tube is electrically connected with the power supply, and the source electrode of the first MOS tube is electrically connected with the signal sampling processing circuit, the main processor, the control circuit and the switch control circuit respectively; the grid electrode of the first MOS tube is electrically connected with the output end of the first power conversion circuit through the first resistor, one end of the second resistor is electrically connected with the grid electrode of the first MOS tube, and the other end of the second resistor is grounded.
Optionally, the switch control circuit includes a second MOS transistor, a first triode, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a first capacitor;
the source electrode of the second MOS tube is electrically connected with the first isolation circuit; one end of the first capacitor is electrically connected with the source electrode of the second MOS tube, and the other end of the first capacitor is grounded; the drain electrode of the second MOS tube is electrically connected with the other circuits; the grid electrode of the second MOS tube is electrically connected with the collector electrode of the first triode through the third resistor; one end of the fourth resistor is electrically connected with the source electrode of the second MOS tube, and the other end of the fourth resistor is electrically connected with the grid electrode of the second MOS tube;
the base electrode of the first triode is electrically connected to the control circuit through the fifth resistor; one end of the sixth resistor is electrically connected with the control circuit, and the other end of the sixth resistor is grounded; and the emitter electrode of the first triode is grounded.
Optionally, the switching circuit includes a relay, a second capacitor, a seventh resistor, an eighth resistor, and a ninth resistor; a first end of a coil of the relay is electrically connected to the control circuit through the seventh resistor, and a second end of the coil of the relay is grounded through the eighth resistor; one end of the ninth resistor is electrically connected with the control circuit, and the other end of the ninth resistor is grounded; one contact of the relay is electrically connected with the signal interface, and the other contact is electrically connected with the circuit to be destroyed and the main processor.
In a second aspect, an embodiment of the present application further provides an electronic device, where the electronic device includes the self-destruction circuit described above.
Compared with the prior art, the self-destruction circuit and the electronic device provided by the embodiment of the application comprise a signal sampling processing circuit, a first signal conversion circuit and a main processor, when the electronic device receives a high-level self-destruction signal through a signal interface, on one hand, the first signal conversion circuit converts the high-level self-destruction signal into a power supply signal so as to supply power for the signal sampling processing circuit and the main processor; on the other hand, the signal sampling processing circuit converts the high-level self-destruction signal into a soft self-destruction signal and then sends the soft self-destruction signal to the main processor, and the main processor sends a soft self-destruction instruction to the circuit to be destroyed of the electronic equipment after determining that the soft self-destruction signal is effective so as to self-destroy the circuit to be destroyed. That is, once the high-level self-destruction signal is received, the high-level self-destruction signal is used for power supply, so that the self-destruction effect of the circuit to be destroyed is not affected no matter whether the electronic equipment is unstable in power supply or is powered off.
Drawings
Fig. 1 shows a schematic structural diagram of an electronic device according to an embodiment of the present application.
Fig. 2 shows another schematic structural diagram of the electronic device provided in the embodiment of the application.
Fig. 3 shows a schematic structural diagram of an electronic device according to an embodiment of the present application.
Fig. 4 shows a circuit diagram of a signal sampling processing circuit provided in an embodiment of the present application.
Fig. 5 shows a circuit diagram of a first isolation circuit provided in an embodiment of the present application.
Fig. 6 shows a circuit diagram of a switch control circuit provided in an embodiment of the present application.
Fig. 7 shows a circuit diagram of a switching circuit according to an embodiment of the present application.
Fig. 8 shows another circuit diagram of a switching circuit provided in an embodiment of the present application.
Icon: 10-an electronic device; 20-signal interface; 30-self-destroying the circuit; 301-a first signal conversion circuit; 302-a signal sampling processing circuit; 303-a main processor; 304-a control circuit; 305-a second signal conversion circuit; 306-a switching circuit; 3011-a first power conversion circuit; 3012-a second isolation circuit; 3013-a second voltage divider circuit; 3051—a first isolation circuit; 3052-a second power conversion circuit; 3053-a first voltage divider circuit; 3054-third power conversion circuit; 3055-a switch control circuit; 3056-fourth power conversion circuit; 40-a circuit to be destroyed; 50-power supply; 60-other circuits.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an electronic device 10 according to an embodiment of the present disclosure. The electronic device 10 includes a signal interface 20, a self-destruction circuit 30 and a to-be-destroyed circuit 40, wherein the self-destruction circuit 30 is electrically connected between the signal interface 20 and the to-be-destroyed circuit 40.
The electronic device 10 may be a daily commercial communication device such as a smart phone, tablet computer, car computer, general purpose computer, special purpose computer, server, etc.; and can also be various vehicle-mounted and airborne equipment in the military industry.
The electronic device 10 may receive the high-level self-destruction signal transmitted by the signal generating apparatus through the signal interface 20, that is, the high-level self-destruction signal is input into the self-destruction circuit 30 through the signal interface 20. The signal generating device may belong to the electronic apparatus 10, or may belong to another apparatus other than the electronic apparatus 10. The voltage of the high level self-destruction signal may be 18-36V, which is not limited herein.
The circuit 40 may be any storage device storing important data such as personal privacy information, company business secrets, military secrets, etc., for example, conventional various data information storage media used by daily commercial communication devices (e.g., smart phones, personal computers, etc.); alternatively, security chips in the military for storing keys or other sensitive data information, including PRM chips and SIM chips, etc.
The self-destruction circuit 30 includes a first signal conversion circuit 301, a signal sampling processing circuit 302, and a main processor 303. The input end of the first signal conversion circuit 301 is electrically connected to the signal interface 20, and the output end is electrically connected to the signal sampling processing circuit 302 and the main processor 303, respectively. The signal interface 20, the signal sampling processing circuit 302, the main processor 303 and the destruction waiting circuit 40 are electrically connected in sequence.
The first signal conversion circuit 301 is configured to receive the high-level self-destruction signal, and convert the high-level self-destruction signal into a power supply signal to power the signal sampling processing circuit 302 and the main processor 303.
The signal sampling processing circuit 302 is configured to receive the high-level self-destruction signal, convert the high-level self-destruction signal into a soft self-destruction signal, and send the soft self-destruction signal to the main processor 303.
The main processor 303 is configured to send a soft self-destruction instruction to the to-be-destroyed circuit 40 after determining that the soft self-destruction signal is valid, so that the to-be-destroyed circuit 40 is self-destroyed.
The high-level self-destruction signal input through the signal interface 20 may be converted into a power supply signal having the same power supply level as the signal sampling processing circuit 302 and the main processor 303 by the first signal conversion circuit 301 to supply power to the signal sampling processing circuit 302 and the main processor 303; on the other hand, the soft self-destruct signal of a specified level, which is determined according to the I/O operation level of the main processor 303, can be converted by the signal sampling processing circuit 302 and transmitted to the main processor 303. After determining that the soft self-destruction signal is valid, the main processor 303 may send a soft self-destruction instruction to the circuit 40 to be destroyed, so that the circuit 40 to be destroyed executes a preset self-destruction program according to the soft self-destruction instruction to realize self destruction; thereby ensuring the normal realization of the soft self-destruction function.
Referring to fig. 2, the self-destruction circuit 30 further includes a control circuit 304. The control circuit 304 is electrically connected to the output terminal of the first signal conversion circuit 301, and the control circuit 304 is electrically connected to the main processor 303 and the destruction waiting circuit 40.
The first signal conversion circuit 301 is further configured to transmit a power supply signal to the control circuit 304, and supply power to the control circuit 304.
The main processor 303 is further configured to send a soft self-destruction instruction to the control circuit 304 after determining that the soft self-destruction signal is valid.
The control circuit 304 is configured to control the self-destruction of the circuit 40 to be destroyed according to the soft self-destruction instruction.
The high-level self-destruction signal input through the signal interface 20 may also be converted into a power supply signal with the same power supply level as the control circuit 304 by the first signal conversion circuit 301, so as to supply power to the control circuit 304. After determining that the soft self-destruction signal is valid, the main processor 303 may also send a soft self-destruction instruction to the control circuit 304, so as to control the to-be-destroyed circuit 40 to implement self destruction through a self-destruction program preset in the control circuit 304.
In some embodiments, the self-destruct circuit 30 further includes a second signal conversion circuit 305. The input end of the second signal conversion circuit 305 is electrically connected to the power supply 50 of the electronic device 10, and the output end is electrically connected to the signal sampling processing circuit 302, the main processor 303, the control circuit 304, and the other circuits 60 of the electronic device 10, respectively.
The second signal conversion circuit 305 is configured to transmit the power signal provided by the power supply 50 to the signal sampling processing circuit 302, the main processor 303, the control circuit 304 and the other circuits 60, respectively, and power the signal sampling processing circuit 302, the main processor 303, the control circuit 304 and the other circuits 60 when the power supply 50 is powered normally.
The power supply 50 may be a conventional board-level dc power supply, and in a normal power supply state, the power supply 50 supplies power to the signal sampling processing circuit 302, the main processor 303, the control circuit 304 and the other circuits 60 through the second signal conversion circuit 305, so as to ensure normal operation of the circuits of the electronic device 10.
In some implementations, the self-destruct circuit 30 also includes a switching circuit 306. The input end of the switch circuit 306 is electrically connected with the signal interface 20, the output end is electrically connected with the main processor 303 and the circuit 40 to be destroyed respectively, and the control end is electrically connected with the control circuit 304.
The main processor 303 is further configured to send a hard self-destruction instruction to the control circuit 304 after receiving a soft self-destruction completion signal returned by the destructing circuit 40.
The control circuit 304 is further configured to control the switch circuit 306 to be turned on according to the hard self-destruction instruction, and transmit a high-level self-destruction signal to the circuit 40 and the main processor 303 to burn the circuit 40 and the main processor 303.
In the normal power supply state of the power supply 50, the switching circuit 306 is in an off state. After the electronic device 10 receives the high-level self-destruction signal through the signal interface 20, the self-destruction circuit 30 performs a soft self-destruction operation on the circuit to be destroyed 40. After the survivor circuit 40 completes the soft self-destruction, the survivor circuit 40 returns a soft self-destruction completion signal to the main processor 303. After receiving the soft self-destruction completion signal, the main processor 303 issues a hard self-destruction instruction to the control circuit 304. After receiving the hard self-destruction instruction, the control circuit 304 controls the switch circuit 306 to be turned on, the high-level self-destruction signal is directly poured into the power supply ends of the circuit 40 to be destroyed and the main processor 303 through the switch circuit 306, and the circuit 40 to be destroyed and the main processor 303 are directly burned through the high voltage and the large current of the high-level self-destruction signal, so that the circuit hard self-destruction function of the electronic device 10 is completed.
The structures of the first signal conversion circuit 301 and the second signal conversion circuit 305 are described below.
Referring to fig. 3, the second signal conversion circuit 305 includes a first isolation circuit 3051 and a switch control circuit 3055. The input end of the first isolation circuit 3051 is electrically connected to the power supply 50, the output end is electrically connected to the signal sampling processing circuit 302, the main processor 303, the control circuit 304 and the switch control circuit 3055, respectively, and the control end is electrically connected to the control circuit 304. The switch control circuit 3055 is electrically connected to the other circuits 60.
The first isolation circuit 3051 is configured to transmit a power signal to the signal sampling processing circuit 302, the main processor 303, and the control circuit 304, respectively, and transmit the power signal to the other circuit 60 through the switch control circuit 3055 when the power supply 50 is powered normally.
In some embodiments, the second signal conversion circuit 305 further includes a second power conversion circuit 3052, a first voltage division circuit 3053, a third power conversion circuit 3054, a switch control circuit 3055, and a fourth power conversion circuit 3056.
The output terminal of the first isolation circuit 3051 is electrically connected to the second power conversion circuit 3052, the first voltage division circuit 3053, the third power conversion circuit 3054, and the switch control circuit 3055, respectively.
The second power conversion circuit 3052 is electrically connected to the signal sampling processing circuit 302 and the main processor 303, and is configured to convert a power signal into a power supply signal having a power supply level identical to that of the signal sampling processing circuit 302 and the main processor 303, and supply power to the signal sampling processing circuit 302 and the main processor 303.
The first voltage dividing circuit 3053 is electrically connected to the control circuit 304, and is configured to send a conventional power supply signal indication to the control circuit 304, so as to prompt the control circuit 304 to normally supply power to the power source 50 at this time.
The control circuit 304 is electrically connected to the switch control circuit 3055, and is used for controlling on and off of the switch control circuit 3055. In the normal power supply state of the power supply 50, the switch control circuit 3055 is in a conductive state; when the electronic device 10 receives the high-level self-destruction signal through the signal interface 20, that is, is in the power supply state of the high-level self-destruction signal, the control circuit 304 controls the switch control circuit 3055 to be turned off.
The third power conversion circuit 3054 is electrically connected to the control circuit 304, and is configured to convert a power signal into a power signal with the same power level as the control circuit 304, and supply power to the control circuit 304.
The switch control circuit 3055, the fourth power conversion circuit 3056 and the other circuits 60 are electrically connected in sequence, and the fourth power conversion circuit 3056 is used for converting a power signal into a power supply signal with the same power supply level as the other circuits 60 to supply power to the other circuits 60.
Referring again to fig. 3, the first signal conversion circuit 301 includes a first power conversion circuit 3011 and a second isolation circuit 3012. The input end of the first power conversion circuit 3011 is electrically connected to the signal interface 20, and the output end is electrically connected to the first isolation circuit 3051, the second isolation circuit 3012, and the control circuit 304, respectively. The second isolation circuit 3012 is electrically connected to the signal sample processing circuit 302, the main processor 303, the control circuit 304, and the switch control circuit 3055, respectively.
The first power conversion circuit 3011 is configured to convert a high-level self-destruction signal into a power supply signal.
The first power conversion circuit 3011 is further configured to:
transmitting a power supply signal to the first isolation circuit 3051 to turn off the first isolation circuit 3051;
and transmitting a power supply signal to the control circuit 304, so that the control circuit 304 turns off the switch control circuit 3055 according to the power supply signal to stop supplying power to the other circuits 60;
and transmitting a power supply signal to the signal sampling processing circuit 302, the main processor 303 and the control circuit 304 via the second isolation circuit 3012, and supplying power to the signal sampling processing circuit 302, the main processor 303 and the control circuit 304.
In some embodiments, the first signal conversion circuit 301 further includes a second voltage dividing circuit 3013, where the second voltage dividing circuit 3013 is electrically connected to the control circuit 304 and is configured to send a self-destruction signal indication to the control circuit 304 to prompt the control circuit 304 to power a high-level self-destruction signal at this time.
In a normal power supply state of the power supply 50, a power supply signal is transmitted to the second power supply conversion circuit 3052, the first voltage dividing circuit 3053, and the third power supply conversion circuit 3054 through the first isolation circuit 3051 and the switch control circuit 3055, and is input to the fourth power supply conversion circuit 3056 at the same time. The normal power supply signal indication is sent to the control circuit 304 through the first voltage dividing circuit 3053, and is converted into the power supply voltage required by the signal sampling processing circuit 302 and the main processor 303 through the second power supply conversion circuit 3052, is converted into the power supply voltage required by the control circuit 304 through the third power supply conversion circuit 3054, and is converted into the power supply voltage required by the other circuits 60 through the fourth power supply conversion circuit 3056, so that the normal power supply of each circuit of the electronic device 10 is ensured.
After the electronic apparatus 10 receives the high-level self-destruction signal through the signal interface 20, the high-level self-destruction signal is input to the first power conversion circuit 3011, and the first power conversion circuit 3011 outputs a power supply signal. And then transmitting through three branches:
one branch transmits a power supply signal as an isolation control signal to the first isolation circuit 3051, so that the first isolation circuit 3051 is turned off;
the other branch sends a self-destruction signal indication to the control circuit 304 through the second voltage dividing circuit 3013, and after the control circuit 304 receives the indication, the control circuit 3055 sends a switch control signal to the switch control circuit 3055 to turn off the switch control signal, so that the power supply of other circuits 60 is turned off, the overall power consumption of the electronic equipment 10 is reduced, and the realization of the self-destruction function is prevented from being influenced by high-level self-destruction signal overload;
the third branch is transmitted to the second power conversion circuit 3052 and the third power conversion circuit 3054 through the second isolation circuit 3012, and is converted into a power supply voltage required by the signal sampling processing circuit 302 and the main processor 303 through the second power conversion circuit 3052, and is converted into a power supply voltage required by the control circuit 304 through the third power conversion circuit 3054, thereby ensuring normal power supply of the signal sampling processing circuit 302, the main processor 303 and the control circuit 304.
Referring to fig. 4, fig. 4 shows a circuit diagram of a signal sampling processing circuit 302 according to an embodiment of the present application. The signal sampling processing circuit 302 may be a comparator circuit constituted by an operational amplifier U1 and a voltage dividing resistor.
As shown in fig. 2, the positive input end of the operational amplifier U1 is electrically connected to the signal interface 20 in series with resistors R2 "and R1", one end of the resistor R3 "is electrically connected between the resistors R2" and R1", and the other end is grounded. One end of the resistor R4 'is electrically connected between the resistor R2' and the positive input end of the operational amplifier U1, and the other end is grounded. One end of the capacitor C1 "is electrically connected between the signal interface 20 and the resistor R1", and the other end is grounded. The negative input terminal of the operational amplifier U1 is electrically connected to the second power conversion circuit 3052 through a resistor R5", one end of the resistor R6" is electrically connected between the resistor R5 "and the negative input terminal of the operational amplifier U1, and the other end is grounded. The output of the operational amplifier U1 is electrically connected to the main processor 303 through a resistor R8 ". One end of the resistor R5 'is electrically connected with the negative input end of the operational amplifier U1, the other end of the resistor R5' is electrically connected with the output end of the operational amplifier U1, and the capacitor C3 'is connected in parallel with the two ends of the resistor R5'.
In the normal power supply state of the power supply 50, the level of the positive input terminal of the operational amplifier U1 is smaller than that of the negative input terminal, and the output is low. When the high-level self-destruction signal is detected, the level of the positive input end responds to the negative input end, and the output is high-level, namely, the soft self-destruction signal is output.
Alternatively, the first power conversion circuit 3011 is mainly composed of a power chip or a power module that meets the power supply index of the device, and is mainly used for converting the high-level self-destruction signal into a power supply signal, so as to provide necessary electric energy and a self-destruction judging signal for the self-destruction circuit 30.
Optionally, the main processor 303 is mainly composed of a DSP and FPGA (Field Programmable Gate Array ) combination or other high-performance processing chips and peripheral circuits, and is used for completing all functions of signal processing, resolving, storing and the like when the electronic device 10 operates normally, so as to ensure realization of various functions of the electronic device 10. When the soft self-destruction of the electronic equipment 10 occurs, the processing and the sending of the self-destruction instruction with the highest priority are carried out, so that the normal completion of the soft self-destruction function of the electronic equipment 10 is ensured. In the case of hard self-destruction, the main processor 303 is burned out together with the circuit 40 to be destroyed, thereby improving the self-destruction thoroughness of the electronic device 10.
It should be noted that, the main processor 303 may also be a processor of the electronic device 10 itself. In practical application, the method can be flexibly selected according to practical situations, and is not limited herein.
Alternatively, the control circuit 304 may be formed by a simple and fast processing chip such as a single-chip microcomputer, for completing control of the relevant execution stage instructions.
It should be noted that, the control circuit 304 may also use a controller of the electronic device 10 itself. In practical application, the method can be flexibly selected according to practical situations, and is not limited herein.
Referring to fig. 5, fig. 5 shows a circuit diagram of a first isolation circuit 3051 according to an embodiment of the disclosure. The first isolation circuit 3051 includes a first MOS transistor, a first resistor R1, and a second resistor R2. The drain electrode of the first MOS tube is electrically connected with the power supply 50, and the source electrode of the first MOS tube is electrically connected with the signal sampling processing circuit 302, the main processor 303, the control circuit 304 and the switch control circuit 3055 respectively. The grid electrode of the first MOS tube is electrically connected with the output end of the first power conversion circuit 3011 through a first resistor R1, one end of the second resistor R2 is electrically connected with the grid electrode of the first MOS tube, and the other end of the second resistor R2 is grounded.
The first MOS transistor may be a P-channel MOS transistor, and is mainly used for controlling a VGS level when a high-level self-destruction signal occurs, and turning off the first isolation circuit 3051 to prevent the converted self-destruction signal from flowing backward to the power supply 50. The MOS tube has the advantages that: the forward voltage drop is small (about 60 mV), the power supply signal passes through, the voltage drop is small, the normal operation of each partial circuit of the later stage is not affected, the switch of the power supply signal can be controlled by a self-destruction signal through a pin, and the operation stability of equipment is improved.
Optionally, the second isolation circuit 3012 is mainly composed of a low-drop, high-power schottky diode with its P-pole connected to the input and N-pole connected to the output, and is turned on in the forward direction. When the power supply 50 supplies power normally, current is prevented from flowing backward to the first power supply conversion circuit, so that the self-destruction procedure is triggered by mistake, and the electronic device 10 is damaged.
Referring to fig. 6, fig. 6 shows a circuit diagram of a switch control circuit 3055 according to an embodiment of the present application. The switch control circuit 3055 includes a second MOS transistor, a first triode, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a first capacitor C1.
The source of the second MOS transistor is electrically connected to the first isolation circuit 3051. One end of the first capacitor C1 is electrically connected with the source electrode of the second MOS tube, and the other end of the first capacitor C is grounded. The drain of the second MOS transistor is electrically connected to the other circuit 60. The grid electrode of the second MOS tube is electrically connected with the collector electrode of the first triode through a third resistor R3. One end of the fourth resistor R4 is electrically connected with the source electrode of the second MOS tube, and the other end of the fourth resistor R4 is electrically connected with the grid electrode of the second MOS tube. The base of the first transistor is electrically connected to the control circuit 304 via a fifth resistor R5. One end of the sixth resistor R6 is electrically connected to the control circuit 304, and the other end is grounded. The emitter of the first triode is grounded.
The first transistor may be an NPN transistor, and the second MOS transistor may be a P-channel MOS transistor. In the normal power supply state of the power supply 50, the switch control signal output by the control circuit 304 is high, the gate to drain of the second MOS transistor is turned on, and all other circuits 60 work normally. When the control circuit 304 receives the self-destruction signal indication, the switch control signal output by the control circuit 304 is low, the gate electrode of the second MOS tube is disconnected from the drain electrode, and the whole electronic device 10 stops working except for the circuits required by self-destruction, so that the power consumption is reduced, the high-level self-destruction signal is ensured to be stably output, and the realization of the self-destruction function is prevented from being influenced by overload of the high-level self-destruction signal.
Referring to fig. 7, fig. 7 shows a circuit diagram of a switching circuit 306 according to an embodiment of the present application. The switching circuit 306 includes a relay, a second capacitor C2, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9.
The first end of the coil of the relay is electrically connected to the control circuit 304 through a seventh resistor R7, and the second end is grounded through an eighth resistor R8. One end of the ninth resistor R9 is electrically connected to the control circuit 304, and the other end is grounded. One contact of the relay is electrically connected to the signal interface 20, and the other contact is electrically connected to both the circuit to be destroyed 40 and the main processor 303.
Referring to fig. 8, fig. 8 shows another circuit diagram of the switching circuit 306 according to an embodiment of the present application. The switch circuit 306 includes a MOS transistor, a triode, a resistor R10, a resistor R11, a resistor R12, a resistor R13, and a capacitor C10.
The source of the MOS transistor is electrically connected to the signal interface 20. One end of the capacitor C10 is electrically connected with the source electrode of the MOS tube, and the other end of the capacitor C is grounded. The drain electrode of the MOS tube is electrically connected with the circuit 40 to be destroyed and the main processor 303. The grid electrode of the MOS tube is electrically connected with the collector electrode of the triode through a resistor R10. One end of the resistor R11 is electrically connected with the source electrode of the MOS tube, and the other end of the resistor R is electrically connected with the grid electrode of the MOS tube. The base of the transistor is electrically connected to the control circuit 304 through a resistor R12. One end of the resistor R13 is electrically connected to the control circuit 304, and the other end is grounded. The emitter of the triode is grounded. The triode can be an NPN triode, and the MOS tube can be a P-channel MOS tube.
In the normal power supply state of the power supply 50, the control circuit 304 outputs a hard self-destruction switch control signal of low, and the gate-to-drain of the MOS transistor in fig. 7 is disconnected or the relay in fig. 8 is disconnected. When the control circuit 304 receives the hard self-destruction instruction sent by the main processor 303, the control circuit 304 outputs a hard self-destruction switch control signal to be high, in fig. 7, the gate to drain of the MOS transistor is turned on or the relay in fig. 8 is turned on, and the high-level self-destruction signal is directly fed into the to-be-destroyed circuit 40 and the main processor 303 to burn out the to-be-destroyed circuit 40 and the main processor 303, thereby completing the hard self-destruction of the device.
Optionally, the second power conversion circuit 3052 is composed of various power chips (such as DCDC power, LDO power, etc.) and peripheral circuits, and is configured to provide various dc power for the main processor 303 and the to-be-destroyed circuit 40 to work normally.
Optionally, the third power conversion circuit 3054 is formed by various power chips (such as DCDC power, LDO power, etc.) and peripheral circuits, and is configured to provide dc power for the control circuit 304 to work normally, so that the control circuit 304 is not affected by self-destruction signals during the self-destruction process of the device, and the stability of the device is improved.
The first voltage dividing circuit 3053 and the second voltage dividing circuit 3013 may be configured by voltage dividing resistors with corresponding values, so as to reduce the high-level indication signal to a level range suitable for the control circuit 304, and prevent the indication signal from being too high and damaging the relevant chip of the control circuit 304.
Compared with the prior art, the embodiment of the application has the following beneficial effects:
firstly, once the high-level self-destruction signal is received, the high-level self-destruction signal is utilized to supply power, so that the self-destruction effect of the circuit 40 to be destroyed is not affected no matter whether the electronic equipment 10 is unstable in power supply or is powered off;
secondly, after the circuit 40 to be destroyed completes soft self destruction, the control circuit 304 controls the switch circuit 306 to be turned on, the high-level self-destruction signal is directly poured into the power supply ends of the circuit 40 to be destroyed and the main processor 303 through the switch circuit 306, and the circuit 40 to be destroyed and the main processor 303 are directly burned through the high voltage and the high current of the high-level self-destruction signal, so that the circuit hard self-destruction function of the electronic device 10 is completed. Namely, soft and hard double self-destruction can be completed, the irrecoverability of the circuit 40 to be destroyed is ensured, and the safety of important data is greatly improved.
In summary, according to the self-destruction circuit and the electronic device provided by the embodiments of the present application, once the high-level self-destruction signal is received, the power is supplied by using the high-level self-destruction signal, so that no matter whether the electronic device is unstable in power supply or is powered off, the self-destruction effect of the circuit to be destroyed is not affected. Meanwhile, soft and hard double self-destruction can be completed, the irrecoverability of the circuit 40 to be destroyed is ensured, and the safety of important data is greatly improved.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the same, but rather, various modifications and variations may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.
Claims (7)
1. The self-destruction circuit is characterized by being applied to electronic equipment and comprises a signal sampling processing circuit, a first signal conversion circuit and a main processor;
the input end of the first signal conversion circuit is electrically connected with a signal interface of the electronic equipment, and the output end of the first signal conversion circuit is electrically connected with the signal sampling processing circuit and the main processor; the signal interface, the signal sampling processing circuit, the main processor and the circuit to be destroyed of the electronic equipment are electrically connected in sequence;
the first signal conversion circuit is used for receiving a high-level self-destruction signal and converting the high-level self-destruction signal into a power supply signal to supply power for the signal sampling processing circuit and the main processor;
the signal sampling processing circuit is used for receiving the high-level self-destruction signal, converting the high-level self-destruction signal into a soft self-destruction signal and then transmitting the soft self-destruction signal to the main processor;
the main processor is used for sending a soft self-destruction instruction to the circuit to be destroyed after determining that the soft self-destruction signal is effective so as to cause the circuit to be destroyed by itself;
the self-destruction circuit further comprises a control circuit, wherein the control circuit is electrically connected with the output end of the first signal conversion circuit, and the control circuit is electrically connected with the main processor and the circuit to be destroyed;
the first signal conversion circuit is further used for transmitting the power supply signal to the control circuit to supply power for the control circuit;
the main processor is further used for sending a soft self-destruction instruction to the control circuit after determining that the soft self-destruction signal is valid;
the control circuit is used for controlling the self-destruction of the circuit to be destroyed according to the soft self-destruction instruction;
the self-destruction circuit further comprises a switch circuit, wherein the input end of the switch circuit is electrically connected with the signal interface, the output end of the switch circuit is respectively electrically connected with the main processor and the circuit to be destroyed, and the control end of the switch circuit is electrically connected with the control circuit;
the main processor is also used for sending a hard self-destruction instruction to the control circuit after receiving a soft self-destruction completion signal returned by the circuit to be destroyed;
the control circuit is also used for controlling the switch circuit to be conducted according to the hard self-destruction instruction, and transmitting the high-level self-destruction signal to the circuit to be destroyed and the main processor so as to burn the circuit to be destroyed and the main processor;
the self-destruction circuit further comprises a second signal conversion circuit, wherein the input end of the second signal conversion circuit is electrically connected with the power supply of the electronic equipment, and the output end of the second signal conversion circuit is electrically connected with the signal sampling processing circuit, the main processor, the control circuit and other circuits of the electronic equipment respectively;
and the second signal conversion circuit is used for respectively transmitting power supply signals provided by the power supply to the signal sampling processing circuit, the main processor, the control circuit and the other circuits when the power supply normally supplies power to supply power to the signal sampling processing circuit, the main processor, the control circuit and the other circuits.
2. The self-destruct circuit of claim 1, wherein the second signal conversion circuit includes a first isolation circuit and a switch control circuit;
the input end of the first isolation circuit is electrically connected with the power supply, the output end of the first isolation circuit is respectively electrically connected with the signal sampling processing circuit, the main processor, the control circuit and the switch control circuit, and the control end of the first isolation circuit is electrically connected with the control circuit; the control circuit is electrically connected with the switch control circuit, and the switch control circuit is electrically connected with the other circuits;
the first isolation circuit is used for transmitting the power supply signal to the signal sampling processing circuit, the main processor and the control circuit respectively when the power supply supplies power normally, and transmitting the power supply signal to the other circuits through the switch control circuit.
3. The self-destruct circuit of claim 2, wherein the first signal conversion circuit includes a first power conversion circuit and a second isolation circuit;
the input end of the first power conversion circuit is electrically connected with the signal interface, and the output end of the first power conversion circuit is electrically connected with the first isolation circuit, the second isolation circuit and the control circuit respectively; the second isolation circuit is respectively and electrically connected with the signal sampling processing circuit, the main processor, the control circuit and the switch control circuit;
the first power supply conversion circuit is used for converting the high-level self-destruction signal into the power supply signal;
the first power conversion circuit is further configured to:
transmitting the power supply signal to the first isolation circuit to turn off the first isolation circuit;
transmitting the power supply signal to the control circuit so that the control circuit turns off the switch control circuit according to the power supply signal to stop supplying power to the other circuits;
and transmitting the power supply signal to the signal sampling processing circuit, the main processor and the control circuit through the second isolation circuit to supply power to the signal sampling processing circuit, the main processor and the control circuit.
4. The self-destruction circuit of claim 3, wherein the first isolation circuit comprises a first MOS transistor, a first resistor, and a second resistor;
the drain electrode of the first MOS tube is electrically connected with the power supply, and the source electrode of the first MOS tube is electrically connected with the signal sampling processing circuit, the main processor, the control circuit and the switch control circuit respectively; the grid electrode of the first MOS tube is electrically connected with the output end of the first power conversion circuit through the first resistor, one end of the second resistor is electrically connected with the grid electrode of the first MOS tube, and the other end of the second resistor is grounded.
5. The self-destruction circuit of claim 3, wherein the switch control circuit comprises a second MOS transistor, a first triode, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a first capacitor;
the source electrode of the second MOS tube is electrically connected with the first isolation circuit; one end of the first capacitor is electrically connected with the source electrode of the second MOS tube, and the other end of the first capacitor is grounded; the drain electrode of the second MOS tube is electrically connected with the other circuits; the grid electrode of the second MOS tube is electrically connected with the collector electrode of the first triode through the third resistor; one end of the fourth resistor is electrically connected with the source electrode of the second MOS tube, and the other end of the fourth resistor is electrically connected with the grid electrode of the second MOS tube;
the base electrode of the first triode is electrically connected to the control circuit through the fifth resistor; one end of the sixth resistor is electrically connected with the control circuit, and the other end of the sixth resistor is grounded; and the emitter electrode of the first triode is grounded.
6. The self-destruct circuit of claim 1, wherein the switching circuit includes a relay, a second capacitor, a seventh resistor, an eighth resistor, and a ninth resistor;
a first end of a coil of the relay is electrically connected to the control circuit through the seventh resistor, and a second end of the coil of the relay is grounded through the eighth resistor; one end of the ninth resistor is electrically connected with the control circuit, and the other end of the ninth resistor is grounded; one contact of the relay is electrically connected with the signal interface, and the other contact is electrically connected with the circuit to be destroyed and the main processor.
7. An electronic device comprising the self-destructing circuit of any one of claims 1-6.
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| CN202110062347.9A CN112711779B (en) | 2021-01-18 | 2021-01-18 | Self-destruction circuit and electronic equipment |
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| CN202110062347.9A CN112711779B (en) | 2021-01-18 | 2021-01-18 | Self-destruction circuit and electronic equipment |
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| CN112711779B true CN112711779B (en) | 2024-03-29 |
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| CN112711779A (en) | 2021-04-27 |
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