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CN111902872A - Self-termination write circuit and method - Google Patents

Self-termination write circuit and method Download PDF

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Publication number
CN111902872A
CN111902872A CN201880091692.1A CN201880091692A CN111902872A CN 111902872 A CN111902872 A CN 111902872A CN 201880091692 A CN201880091692 A CN 201880091692A CN 111902872 A CN111902872 A CN 111902872A
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CN
China
Prior art keywords
circuit
termination
self
write
memory array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201880091692.1A
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Chinese (zh)
Other versions
CN111902872B (en
Inventor
潘越
刘燕翔
段霑
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to CN202211100672.0A priority Critical patent/CN115497531A/en
Publication of CN111902872A publication Critical patent/CN111902872A/en
Application granted granted Critical
Publication of CN111902872B publication Critical patent/CN111902872B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1675—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Static Random-Access Memory (AREA)

Abstract

The application discloses a self-termination write-in circuit and a self-termination write-in method, which are used for realizing self-termination of memory array circuits in different states through the same self-termination write-in control circuit. The application self-terminating write circuit includes: a sense amplifier (201) and a control circuit (202); the sense amplifier (201) is used for comparing the reference voltage or reference current output by the reference circuit (203) with the voltage or current output by the memory array circuit (204); the control circuit (202) is used for generating a termination signal according to the comparison result and feeding back the termination signal to the memory array circuit (204), and the termination signal is used for controlling the memory array circuit (204) to stop writing the P state or the AP state. The write-in self-termination is realized after the state write-in of the storage array circuit (204) is completed, the overhead area of the circuit is saved, and the power consumption is reduced.

Description

PCT国内申请，说明书已公开。PCT domestic application, the description has been published.

Claims (12)

PCT国内申请，权利要求书已公开。PCT domestic application, the claims have been published.
CN201880091692.1A 2018-07-02 2018-07-02 Self-termination write circuit and method Active CN111902872B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211100672.0A CN115497531A (en) 2018-07-02 2018-07-02 Self-termination write circuit and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2018/094070 WO2020006662A1 (en) 2018-07-02 2018-07-02 Self-terminating write circuit and method

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN202211100672.0A Division CN115497531A (en) 2018-07-02 2018-07-02 Self-termination write circuit and method

Publications (2)

Publication Number Publication Date
CN111902872A true CN111902872A (en) 2020-11-06
CN111902872B CN111902872B (en) 2022-09-16

Family

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Family Applications (2)

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CN202211100672.0A Pending CN115497531A (en) 2018-07-02 2018-07-02 Self-termination write circuit and method
CN201880091692.1A Active CN111902872B (en) 2018-07-02 2018-07-02 Self-termination write circuit and method

Family Applications Before (1)

Application Number Title Priority Date Filing Date
CN202211100672.0A Pending CN115497531A (en) 2018-07-02 2018-07-02 Self-termination write circuit and method

Country Status (2)

Country Link
CN (2) CN115497531A (en)
WO (1) WO2020006662A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112767981A (en) * 2021-03-10 2021-05-07 中电海康无锡科技有限公司 Read-write control circuit for STT-MRAM
CN114678048A (en) * 2022-01-27 2022-06-28 北京大学 MRAM memory cell writing circuit and memory chip
CN114999546A (en) * 2022-05-27 2022-09-02 桂林电子科技大学 A kind of automatic control circuit and electronic equipment based on magnetic tunnel junction

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113990366B (en) * 2021-10-27 2025-11-04 江南大学 A write verification circuit for STT-MRAM
CN114826163B (en) * 2022-05-16 2024-03-01 合肥工业大学 Low-power-consumption high-performance trigger based on sense amplifier and working method thereof
CN115831190B (en) * 2023-02-16 2023-05-09 华中科技大学 Self-writing stop operation circuit and self-write stop operation method of memristor

Citations (8)

* Cited by examiner, † Cited by third party
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US20060227598A1 (en) * 2003-04-21 2006-10-12 Nec Corporation Magnetic random access memory using improved data read out method
US20130028010A1 (en) * 2011-07-29 2013-01-31 Qualcomm Incorporated Fast MTJ Switching Write Circuit For MRAM Array
US20140112066A1 (en) * 2012-10-18 2014-04-24 Agency For Science, Technology And Research Circuit Arrangement and Method of Forming the Same
CN103854693A (en) * 2012-11-29 2014-06-11 台湾积体电路制造股份有限公司 Magnetoresistive random access memory (mram) differential bit cell and method of use
CN104299645A (en) * 2014-10-22 2015-01-21 中国科学院微电子研究所 A write operation circuit for resistive variable memory
CN105023603A (en) * 2015-08-24 2015-11-04 西安电子科技大学宁波信息技术研究院 Spin MRAM (magnetic random access memory) self-enabling circuit with delay reading technology
CN106158000A (en) * 2015-04-07 2016-11-23 华为技术有限公司 Spin transfer torque magnetic memory cell and memorizer
CN110047523A (en) * 2018-01-15 2019-07-23 塔普思科技股份有限公司 The certainly pressure drop of resistive memories unit self stops wiring method and its circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7936625B2 (en) * 2009-03-24 2011-05-03 Seagate Technology Llc Pipeline sensing using voltage storage elements to read non-volatile memory cells
CN102169722B (en) * 2010-02-25 2014-01-08 复旦大学 Resistive random access memory with reduced initialization or setting operation power consumption and its operating method
CN102169720B (en) * 2010-02-25 2014-04-02 复旦大学 Resistor random access memory for eliminating over-write and error-write phenomena
KR102020975B1 (en) * 2013-07-30 2019-10-18 삼성전자주식회사 Current sense amplifying circuit in semiconductor memory device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060227598A1 (en) * 2003-04-21 2006-10-12 Nec Corporation Magnetic random access memory using improved data read out method
US20130028010A1 (en) * 2011-07-29 2013-01-31 Qualcomm Incorporated Fast MTJ Switching Write Circuit For MRAM Array
US20140112066A1 (en) * 2012-10-18 2014-04-24 Agency For Science, Technology And Research Circuit Arrangement and Method of Forming the Same
CN103854693A (en) * 2012-11-29 2014-06-11 台湾积体电路制造股份有限公司 Magnetoresistive random access memory (mram) differential bit cell and method of use
CN104299645A (en) * 2014-10-22 2015-01-21 中国科学院微电子研究所 A write operation circuit for resistive variable memory
CN106158000A (en) * 2015-04-07 2016-11-23 华为技术有限公司 Spin transfer torque magnetic memory cell and memorizer
CN105023603A (en) * 2015-08-24 2015-11-04 西安电子科技大学宁波信息技术研究院 Spin MRAM (magnetic random access memory) self-enabling circuit with delay reading technology
CN110047523A (en) * 2018-01-15 2019-07-23 塔普思科技股份有限公司 The certainly pressure drop of resistive memories unit self stops wiring method and its circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112767981A (en) * 2021-03-10 2021-05-07 中电海康无锡科技有限公司 Read-write control circuit for STT-MRAM
CN114678048A (en) * 2022-01-27 2022-06-28 北京大学 MRAM memory cell writing circuit and memory chip
CN114999546A (en) * 2022-05-27 2022-09-02 桂林电子科技大学 A kind of automatic control circuit and electronic equipment based on magnetic tunnel junction

Also Published As

Publication number Publication date
WO2020006662A1 (en) 2020-01-09
CN115497531A (en) 2022-12-20
CN111902872B (en) 2022-09-16

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