CN111900984B - Analog-to-digital conversion circuit, analog-to-digital conversion method, chip and household appliance - Google Patents
Analog-to-digital conversion circuit, analog-to-digital conversion method, chip and household appliance Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/129—Means for adapting the input signal to the range the converter can handle, e.g. limiting, pre-scaling ; Out-of-range indication
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Abstract
The application discloses an analog-to-digital conversion circuit, an analog-to-digital conversion method, a chip and a household appliance, wherein the analog-to-digital conversion circuit comprises a preprocessing module, a processing module and a processing module, wherein the preprocessing module is used for preprocessing an input voltage signal to be converted according to a reference voltage signal to generate a preprocessed voltage signal; the analog-to-digital conversion module is connected with the preprocessing module and used for converting the preprocessed voltage signal into a digital processing signal; the processing module is connected with the analog-to-digital conversion module and is used for carrying out calibration processing on the digital processing signals to obtain digital conversion signals corresponding to the voltage signals to be converted. By the mode, the offset error in the analog-to-digital conversion circuit can be adjusted, so that the resolution of the analog-to-digital conversion circuit is improved.
Description
Technical Field
The application relates to the technical field of analog-to-digital conversion, in particular to an analog-to-digital conversion circuit, an analog-to-digital conversion method, a chip and a household appliance.
Background
An analog-to-digital converter (Analog to Digital Converter, ADC) can be implemented to convert analog to digital, the performance of which determines the performance of the product in a certain relationship. When measuring a minute voltage signal, the offset error (offset) of the analog-to-digital converter itself may often cause a multiple of the measurement error to be amplified.
The concept of offset error refers to the linear deviation of the entire analog-to-digital conversion curve, which can be said to be the deviation of the zero point. For example, an analog-to-digital converter has a reference voltage of 1024mV and a resolution of 10 bits, and when the input signal is 5mV, the conversion value is 0, and when the input signal is 6mV, the conversion value is 1, i.e., the offset error is said to be-5 LSB, and the voltage signal below 6mV cannot be resolved.
Disclosure of Invention
The application provides an analog-to-digital conversion circuit, an analog-to-digital conversion method, a chip and a household appliance, which are used for solving the problem that a tiny input signal cannot be distinguished due to offset errors in the prior art.
In order to solve the above technical problems, the present application provides an analog-to-digital conversion circuit, comprising: the preprocessing module is used for preprocessing the input voltage signal to be converted according to the reference voltage signal to generate a preprocessed voltage signal; the analog-to-digital conversion module is connected with the preprocessing module and used for converting the preprocessed voltage signal into a digital processing signal; the processing module is connected with the analog-to-digital conversion module, and is used for carrying out calibration processing on the digital processing signals to obtain digital conversion signals corresponding to the voltage signals to be converted.
The preprocessing module receives an input voltage signal to be converted at a first moment and stores the voltage signal to be converted; a reference voltage signal is introduced at a second, subsequent instant in time to raise the voltage signal to be converted with the reference voltage signal, generating a preprocessed voltage signal.
Wherein, the preprocessing module includes: the first switch is used for receiving an input voltage signal, wherein the input voltage signal is an input voltage signal to be converted or an input reference ground voltage signal; the first end of the second switch is used for receiving a reference ground voltage signal, and the second end of the second switch is connected with the second end of the first switch through the first capacitor; a third switch, wherein a first end of the third switch is connected to a first node between the first switch and the first capacitor; the first fixed end of the fourth switch is connected to the second end of the third switch through the second capacitor, and the second fixed end of the fourth switch is connected to a reference voltage signal; the third node between the third switch and the second capacitor is connected to the signal input end of the analog-to-digital conversion module, and the fourth node between the first motionless end of the fourth switch and the second capacitor is connected to the ground input end of the analog-to-digital conversion module.
At a first moment, the first switch, the second switch and the third switch are closed and conducted, the movable end of the fourth switch is connected to the first fixed end, a path from the movable end of the fourth switch to the ground input end of the analog-to-digital conversion module is conducted, the first end of the first switch receives an input voltage signal to be converted, the input voltage signal to be converted and a reference ground voltage signal are respectively transmitted to the signal input end and the ground input end of the analog-to-digital conversion module, and the voltage signal to be converted is stored in the first capacitor and the second capacitor; at a second moment, the first switch, the second switch and the third switch are disconnected, the movable end of the fourth switch is connected to the second fixed end, the path from the movable end of the fourth switch to the reference voltage signal is conducted, and the reference voltage signal is introduced to enable the voltage signal to be converted stored in the first capacitor to be raised to a first storage voltage signal with a first level; at a third moment, the third switch is closed, a path between the first node and the third node is conducted, the first storage voltage signal stored by the first capacitor and lifted to the first level is used for charging the second capacitor, the voltage signal to be converted stored by the second capacitor is lifted, the first capacitor and the second capacitor store the second storage voltage signal of the second level, and the second storage voltage signal is used as the generated preprocessed voltage signal to be input to the signal input end of the analog-digital conversion module.
The analog-to-digital conversion circuit performs initial calibration operation by using the reference voltage signal in advance to obtain a calibration value corresponding to the reference voltage signal.
Wherein the initial calibration operation comprises: at the first moment of initial calibration, the first switch, the second switch and the third switch are closed and conducted, the movable end of the fourth switch is connected to the first fixed end, a path from the movable end of the fourth switch to the ground input end of the analog-to-digital conversion module is conducted, the first end of the first switch receives an input reference ground voltage signal, the reference ground voltage signal is respectively transmitted to the signal input end and the ground input end of the analog-to-digital conversion module, and the reference ground voltage signal is stored in the first capacitor and the second capacitor; at a second moment of initial calibration, the first switch, the second switch and the third switch are disconnected, the movable end of the fourth switch is connected to the second fixed end so as to conduct the path from the movable end of the fourth switch to the reference voltage signal, and the reference voltage signal stored in the first capacitor is further lifted by using the introduced reference voltage signal, so that a first initial calibration storage voltage signal is generated; at a third moment of initial calibration, a third switch is closed, a path between the first node and the third node is conducted, a first initial calibration storage voltage signal is utilized to charge a second capacitor, a reference ground voltage signal stored in the second capacitor is lifted, a second initial calibration storage voltage signal is generated and stored in the first capacitor and the second capacitor, wherein the second initial calibration storage voltage signal stored in the second capacitor is used as an initial calibration voltage signal and is input to a signal input end of an analog-to-digital conversion module, and the initial calibration voltage signal is converted into a corresponding initial calibration digital signal by the analog-to-digital conversion module to serve as a calibration value.
And the processing module executes calibration processing on the digital processing signal according to the calibration value to obtain a digital conversion signal corresponding to the voltage signal to be converted.
Wherein, the capacitance value of the first capacitor is the same as the capacitance value of the second capacitor.
In order to solve the above technical problems, the present application provides an analog-to-digital conversion method applied to the above analog-to-digital conversion circuit, wherein the analog-to-digital conversion method includes: preprocessing an input voltage signal to be converted according to a reference voltage signal to generate a preprocessed voltage signal; converting the preprocessed voltage signal into a digital processing signal; and performing calibration processing on the digital processing signals to obtain digital conversion signals corresponding to the voltage signals to be converted.
The method for calibrating the digital processing signal to obtain the digital conversion signal corresponding to the voltage signal to be converted comprises the following steps: acquiring a calibration value corresponding to a reference voltage signal; and obtaining a difference value between the digital processing signal and the calibration value, wherein the difference value is used as a digital conversion signal corresponding to the voltage signal to be converted.
In order to solve the above technical problems, the present application provides a chip including the above analog-to-digital conversion circuit. In order to solve the technical problems, the application provides a household appliance, which comprises the chip.
The application discloses an analog-to-digital conversion circuit, an analog-to-digital conversion method, a chip and a household appliance, wherein the analog-to-digital conversion circuit comprises a preprocessing module, a processing module and a processing module, wherein the preprocessing module is used for preprocessing an input voltage signal to be converted according to a reference voltage signal to generate a preprocessed voltage signal; the analog-to-digital conversion module is connected with the preprocessing module and used for converting the preprocessed voltage signal into a digital processing signal; the processing module is connected with the analog-to-digital conversion module and used for carrying out calibration processing on the digital processing signals to obtain digital conversion signals corresponding to the voltage signals to be converted. By the mode, the offset error in the analog-to-digital conversion circuit can be adjusted, so that the resolution of the analog-to-digital conversion circuit is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an embodiment of an analog-to-digital conversion circuit according to the present application;
FIG. 2 is a schematic circuit diagram of an embodiment of an analog-to-digital conversion circuit according to the present application;
FIG. 3 is a flow chart of an embodiment of the analog-to-digital conversion method of the present application;
FIG. 4 is a schematic diagram of a chip according to an embodiment of the present application;
Fig. 5 is a schematic structural view of an embodiment of the home appliance of the present application.
Detailed Description
In order to enable those skilled in the art to better understand the technical scheme of the present application, the analog-to-digital conversion circuit, the analog-to-digital conversion method, the chip and the household appliance provided by the present application are described in further detail below with reference to the accompanying drawings and the detailed description.
The analog signal can be processed by software only after being converted into a digital signal, and the operation can be realized by an analog-to-digital converter. Accordingly, analog-to-digital converters are widely used in various chips, home appliances, and electronic devices. There are many types of analog-to-digital converters, such as successive approximation analog-to-digital converters, integral-type converters, parallel analog-to-digital converters, pipelined analog-to-digital converters, folded analog-to-digital converters, and the like. The analog-to-digital converter may be a separate chip or may be a unit included in the chip.
The analog signal is a signal with continuous time and continuous amplitude, and the digital signal is a signal with discrete time and discrete amplitude. In order to convert an analog signal into a digital signal, an analog-to-digital converter generally undergoes four processes of sampling, holding, quantization, and encoding. The higher the conversion accuracy of the analog-to-digital converter, the closer the digital signal actually obtained by these four processes is to the ideal digital signal.
Analog-to-digital converters typically include analog-to-digital conversion circuitry, with offset error being an important parameter that determines the accuracy of the analog-to-digital conversion circuitry, the smaller the offset error, the more accurate the analog-to-digital conversion result. Many factors that cause offset errors, such as device manufacturing reasons, or may be due to a potential difference between the reference ground signal and the reference ground signal of the external input signal or the offset of the comparator itself in the circuit, etc., during circuit design.
In this regard, the application provides an analog-to-digital conversion circuit, which not only can realize analog-to-digital conversion, but also can solve the problem that a tiny input signal cannot be resolved due to an offset error in the prior art, thereby improving the resolution of the analog-to-digital conversion circuit.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an analog-to-digital conversion circuit according to an embodiment of the application. In this embodiment, the analog-to-digital conversion circuit 100 may include a preprocessing module 110, an analog-to-digital conversion module 120, and a processing module 130.
The preprocessing module 110 may be configured to preprocess the input voltage signal V0 to be converted according to the reference voltage signal VREF to generate a preprocessed voltage signal. The analog-to-digital conversion module 120 may be coupled to the preprocessing module 110 to convert the preprocessed voltage signal into a digitally processed signal. The processing module 130 may be connected to the analog-to-digital conversion module 120 to perform calibration processing on the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal V0 to be converted.
The voltage signal V0 to be converted is an analog signal, and the digital conversion signal is a digital signal, so that the voltage signal V0 to be converted, which is an analog signal, can be converted into a corresponding digital conversion signal. For example, when the voltage signal v0=5 to be converted, the digital conversion signal may be converted into "0101".
Further, the preprocessing module 110 may receive the input voltage signal V0 to be converted at the first moment, and store the voltage signal V0 to be converted; and introducing the reference voltage signal VREF at a second, subsequent moment in time to raise the voltage signal V0 to be converted with the reference voltage signal VREF, thereby generating a preprocessed voltage signal. Wherein the preprocessed voltage signal is an analog signal.
The analog-to-digital conversion module 120 may perform analog-to-digital conversion on the preprocessed voltage signal, where the analog-to-digital conversion includes four processes of sampling, holding, quantizing, and encoding. The analog-to-digital conversion module 120 may measure the preprocessed voltage signal at some specific time, i.e. complete the sampling.
Since the width of the sampling pulse is very short, the sampling output is a discontinuous narrow pulse. To digitize a sampled output signal, the sampled output resulting instantaneous analog signal is held for a period of time, i.e., is held.
Quantization is the conversion of a sampled signal of continuous amplitude into a digital signal of discrete time, discrete amplitude, the main problem of quantization being quantization error. Assuming that the noise signal is uniformly distributed in the quantization level, the quantization noise mean square value is related to the quantization interval and the input impedance value of the analog-to-digital conversion module 120.
The encoding is to encode the quantized signal into a binary code output. Where some of these four processes are combined, for example, the sampling and holding may be done using the same circuitry in the analog-to-digital conversion module 120, the quantization and encoding may be performed simultaneously during the conversion process, and the time used may be a fraction of the holding time.
It should be noted that, the reference voltage signal VREF is a signal for solving the offset error in the present embodiment, is a voltage reference of the preprocessing module 110, is a reference voltage for processing the voltage signal V0 to be converted, and may have no requirement on the accuracy thereof. In addition, the analog-to-digital conversion module 120 also includes a conversion reference voltage, which is a voltage reference of the analog-to-digital conversion module 120 and is a voltage for processing the preprocessed voltage signal. Therefore, there is no correlation between the reference voltage signal VREF and the converted reference voltage, and those skilled in the art can set the values of the reference voltage signal VREF and the converted reference voltage respectively according to actual needs. In some embodiments, the reference voltage signal VREF and the transition reference voltage may or may not be the same.
The embodiment provides an analog-to-digital conversion circuit, wherein a preprocessing module can introduce a reference voltage signal to raise and convert a voltage signal to obtain a preprocessed voltage signal; the analog-to-digital conversion module can convert the preprocessed voltage signal into a digital processing signal; the processing module performs calibration processing on the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal to be converted. By lifting the converted voltage signal, the analog-to-digital conversion circuit can distinguish and process the tiny converted voltage signal, namely eliminating or reducing offset errors.
In addition, compared with the digital calibration in the related art, that is, a reference voltage point is given to be converted once, the conversion value of the reference voltage is used for addition, or an operational amplifier is added to raise the output signal, the former can only aim at the situation that the offset error is biased upwards (that is, input 0mV, output conversion value is 10), but the situation that the offset error is biased downwards (that is, input 5mV, output conversion value is 0) can not be calibrated, and the latter is added to the operational amplifier to introduce noise, so that the overall performance is reduced. The analog-to-digital conversion circuit of the embodiment can be used when the offset error is biased upwards or downwards, so that the absolute error of the analog-to-digital conversion circuit caused by the offset error can be solved; and does not bring additional noise.
Referring to fig. 2, fig. 2 is a schematic circuit diagram of an analog-to-digital conversion circuit according to an embodiment of the application. IN this embodiment, the analog-to-digital conversion module 120 may include a signal input terminal adc_in and a ground input terminal adc_gnd. The preprocessing module 110 may include four switches S0 to S3 and two capacitors C0 and C1. The capacitance value of the first capacitor C0 and the capacitance value of the second capacitor C1 may be the same.
Specifically, the first end of the first switch S0 is configured to receive the input voltage signal VIN, where the input voltage signal VIN is the input voltage signal V0 to be converted or the input reference ground voltage signal GND. The first end of the second switch S1 is configured to receive the ground voltage GND, wherein the second end of the second switch S2 is connected to the second end of the first switch S0 through the first capacitor C0.
The first end of the third switch S2 is connected to a first node between the first switch S0 and the first capacitor C0. The fourth switch S3 is a single pole double throw switch comprising one movable end and two stationary ends, the movable end being the so-called "knife". The single pole double throw switch can control the signal output to two different directions. The moving terminal a of the fourth switch S3 is connected to the second node between the second switch S1 and the first capacitor C0, the first stationary terminal b of the fourth switch S3 is connected to the second terminal of the third switch S2 through the second capacitor C1, and the second stationary terminal C of the fourth switch S3 is connected to the reference voltage signal VREF.
The third node between the third switch S2 and the second capacitor C1 is connected to the signal input terminal adc_in of the analog-to-digital conversion module 120, and the fourth node between the first stationary terminal b of the fourth switch and the second capacitor C1 is connected to the ground input terminal adc_gnd of the analog-to-digital conversion module 110.
The first switch S0, the second switch S1, the third switch S2, the fourth switch S3, and the like may be controlled by a control device to realize on and off of the switches. Program software may be provided in the control device to control the on and off of the first switch S0, the second switch S1, the third switch S2 and the fourth switch S3 at respective times.
In this embodiment, the operation of generating the digital processing signal may include:
at the first moment, the first switch S0, the second switch S1, and the third switch S2 are turned on, and the moving terminal a of the fourth switch S3 is connected to the first stationary terminal b to be turned on to the path of the ground input terminal adc_gnd of the analog-to-digital conversion module 120, and the first terminal of the first switch S0 receives the input voltage signal V0 to be converted, so that the input voltage signal to be converted and the reference ground voltage signal GND are respectively transferred to the signal input terminal adc_in and the ground input terminal adc_gnd of the analog-to-digital conversion module 120, and the voltage signal to be converted is stored IN the first capacitor C0 and the second capacitor C1.
At the second moment, the first switch S0, the second switch S1, and the third switch S2 are turned off, and the moving terminal a of the fourth switch S4 is connected to the second stationary terminal C to be turned on to the path of the reference voltage signal VREF, so that the reference voltage signal VREF is introduced to raise the voltage signal V0 to be converted stored in the first capacitor C0 to the first storage voltage signal of the first level. Wherein, the first storage voltage signal=the voltage signal v0+ to be converted is referenced to the voltage signal VREF.
At a subsequent third moment, the first switch S0, the second switch S1 are opened, the third switch S2 is closed to conduct a path between the first node between the first switch S0 and the first capacitor C0 and a path between the third switch S2 and the third node between the second capacitor C1, thereby charging the second capacitor C1 with the first storage voltage signal stored by the first capacitor C0 and raised to the first level to raise the voltage signal V0 to be converted stored by the second capacitor C1, so that the first capacitor C0 and the second capacitor C1 store the second storage voltage signal at the second level, wherein the second storage voltage signal = the voltage signal to be convertedThe second stored voltage signal is input as a generated preprocessed voltage signal to the signal input adc_in of the analog-to-digital conversion module 120, i.e. at this time
At a fourth time, the first switch S0, the second switch S1, and the third switch S2 are turned off, and the analog-to-digital conversion module 120 performs analog-to-digital conversion processing on the preprocessed voltage signal to obtain a digital processing signal.
Further, the processing module 130 may perform calibration processing on the digital processing signal according to the calibration value to obtain a digital conversion signal corresponding to the voltage signal V0 to be converted, for example, subtracting the calibration value from the digital processing signal to obtain the digital conversion signal.
The analog-to-digital conversion circuit 120 may perform an initial calibration operation with the reference voltage signal VREF in advance to obtain a calibration value corresponding to the reference voltage signal.
In this embodiment, the initial calibration operation may include:
At the first moment of initial calibration, the first switch S0, the second switch S1, and the third switch S2 are turned on, and the moving terminal a of the fourth switch S4 is connected to the first stationary terminal b to be turned on to the path of the ground input terminal adc_gnd of the analog-to-digital conversion module 120, and the first terminal of the first switch S0 receives the input reference ground voltage signal GND, so as to transmit the reference ground voltage signal GND to the signal input terminal adc_in and the ground input terminal adc_gnd of the analog-to-digital conversion module, respectively, and store the reference ground voltage signal GND IN the first capacitor and the second capacitor.
At a second time of the initial calibration, the first switch S0, the second switch S1, and the third switch S2 are turned off, and the movable terminal a of the fourth switch S3 is connected to the second stationary terminal C to be turned on to the path of the reference voltage signal VREF, so that the reference ground voltage signal GND stored in the first capacitor C0 is further raised by using the introduced reference voltage signal VREF, thereby generating a first initial calibration storage voltage signal. Wherein the first initial calibration stores the voltage signal=0+ reference voltage signal VREF.
At a third time of the initial calibration, the first switch S0, the second switch S1 are opened, the third switch S2 is closed to turn on a path between the first node between the first switch S0 and the first capacitor C0 and a path between the third switch S2 and the third node between the second capacitor C1 to charge the second capacitor C1 with the first initial calibration storage voltage signal to raise the reference ground voltage signal GND stored in the second capacitor C1 to generate a second initial calibration storage voltage signal and store the second initial calibration storage voltage signal in the first capacitor C0 and the second capacitor C1, The second initial calibration storage voltage signal stored on the second capacitor C1 is input as an initial calibration voltage signal to the signal input terminal adc_in of the analog-to-digital conversion block 120, and at this time,To convert the initial calibration voltage signal into a corresponding initial calibration digital signal as a calibration value using the analog-to-digital conversion module 120.
As can be seen from the above, the operation of obtaining the digital processing signal is different from the initial calibration operation in that the input voltage signal VIN is different: in the operation of obtaining a digital processing signal, the input voltage signal is a voltage signal V0 to be converted; in the operation of the initial calibration operation, the input voltage signal is the reference ground voltage signal GND. The calibration value is used for eliminating the influence caused by the lifting of the reference voltage signal VREF by the voltage signal to be converted.
For example, when the analog-to-digital conversion module 120 has an offset error and the offset error is biased downward, i.e., when the input voltage signal is 5mV, the conversion value is 0 (0000); when the input voltage signal is 6mV, the conversion value is 1 (0001); when the input voltage signal is 7mV, the conversion value is 2 (0010); when the input voltage signal is 8mV, the conversion value is 3 (0011) … …, i.e., the analog-to-digital conversion module 120 has an offset error of-5 LSB. After the analog-to-digital conversion circuit 100 in the embodiment is adopted, as shown in the following table, if the input voltage signal v0=4 mV to be converted, the reference voltage signal vref=12 mV; the pre-processed voltage signal=4+6=10 mV, the resulting digitally processed signal is 5 (0101); the initial calibration voltage signal=12/2=6 mV, the calibration value obtained is 1 (0001), i.e. the digital conversion signal can be obtained to be 5-1=4 (0100), just in line with the ideal digital conversion value, and so on. The following table lists the results of the correlation processing of the voltage signal V0 to be converted from 1 to 6V, and the finally obtained digital conversion signal is consistent with the ideal digital conversion value.
In this embodiment, the reference voltage signal is 12mV, and if the voltage signal to be processed is 1mV, the digital conversion signal is 1 (0001), the micro voltage signal can be converted, and the converted value is consistent with the ideal digital conversion value, i.e. the analog-to-digital conversion circuit 100 has eliminated the offset error.
In addition, the reference voltage signal VREF needs to be greater than the reference ground voltage signal GND, and the reference ground voltage signal GND is 0. The excessive reference voltage signal VREF can cause larger deviation between the input analog quantity and the converted digital quantity, and the excessive reference voltage signal VREF can cause incapability of completely eliminating offset errors, so that a person skilled in the art can set the magnitude of the reference voltage signal VREF according to the product requirement.
The calibration process is performed on the digitally processed signal according to the calibration value, and the digitally processed signal may be added or subtracted with the calibration value to obtain the digitally converted signal. In other embodiments, other calibration processes may be employed.
Alternatively, to eliminate offset errors and to match the designed sampling time in mass production, calibration bits may be reserved for the reference voltage signal VREF and the first capacitance C0.
Based on the analog-to-digital conversion circuit 100, the application further provides an analog-to-digital conversion method. Referring to fig. 3, fig. 3 is a flow chart of an embodiment of the analog-to-digital conversion method of the present application. The method of the present embodiment includes the steps of:
S11: the input voltage signal to be converted is preprocessed according to the reference voltage signal to generate a preprocessed voltage signal.
The preprocessing module 110 in the analog-to-digital conversion circuit 100 may preprocess the input voltage signal V0 to be converted according to the reference voltage signal VREF to generate a preprocessed voltage signal. Wherein the operation of preprocessing may include boosting the voltage signal V0 to be converted using the reference voltage signal VREF.
Specifically, the preprocessing module 110 may receive the input signal V0 to be converted at the first moment, and store the signal V0 to be converted; and introducing a reference voltage signal VREF at a subsequent second time and third time to raise the signal V0 to be converted using the reference voltage signal VREF, thereby generating a preprocessed voltage signal. For example, the voltage signal V0 to be converted may be raised to the first storage voltage signal at the first level at the second time by using the reference voltage signal VREF, and the second storage voltage signal may be obtained from the first storage voltage signal at the third time, and the second storage voltage signal may be used as the preprocessed voltage signal.
S12: the preprocessed voltage signal is converted into a digitally processed signal.
The analog-to-digital conversion module 120 in the analog-to-digital conversion circuit 100 may convert the preprocessed voltage signal into a digital processed signal, where the voltage signal V0 to be converted and the preprocessed voltage signal are both analog signals, and the digital processed signal is a digital signal, so as to complete conversion from analog quantity to digital quantity. Specifically, the analog-to-digital conversion module 120 may fourier transform the voltage signal to be converted to obtain a digital processing signal.
S13: and performing calibration processing on the digital processing signals to obtain digital conversion signals corresponding to the voltage signals to be converted.
The processing module 130 in the analog conversion circuit 100 may perform calibration processing on the digital signal to obtain a digital conversion signal corresponding to the voltage signal to be converted. In this embodiment, since the reference voltage signal is used to raise the voltage signal to be converted, the digital processing signal is a digital signal obtained by converting the voltage signal after the corresponding preprocessing, and therefore the digital processing signal needs to be calibrated to obtain the digital conversion signal corresponding to the voltage signal V0 to be converted.
Specifically, the processing module 130 may obtain a calibration value corresponding to the reference voltage signal VREF; and obtaining a difference value between the digital processing signal and the calibration value, taking the difference value as a digital conversion signal corresponding to the voltage signal to be converted, namely using the digital processing signal to carry out by using the calibration value corresponding to the reference voltage signal VREF, and obtaining the digital conversion signal.
Wherein the step of obtaining the calibration value may comprise: the preprocessing module 110 preprocesses the reference voltage signal VREF to generate an initial calibration voltage signal; the analog-to-digital conversion module 120 converts the initial calibration voltage signal to a calibration value.
Specifically, the preprocessing module 110 may receive the input reference ground voltage signal GND at the first time of the initial calibration, and store the reference ground voltage signal GND; and introducing a reference voltage signal VREF at a second time of a subsequent initial calibration to raise the reference ground voltage signal GND using the reference voltage signal VREF, thereby generating a first initial calibration storage voltage signal; at a third moment of initial calibration, a second initial calibration storage voltage signal is obtained by using the first initial calibration storage voltage signal, the second initial calibration storage voltage signal is input into the analog-to-digital conversion module 120 as an initial calibration voltage signal, and the analog-to-digital conversion module 120 is used for converting the initial calibration voltage signal into a corresponding initial calibration digital signal to serve as a calibration value.
The embodiment discloses an analog-to-digital conversion method, which uses a reference voltage signal VREF to raise a signal to be processed to obtain a digital processing signal, so that a micro signal can be distinguished; processing the digital processing signal through a calibration value corresponding to the reference voltage signal VREF to obtain a digital conversion signal corresponding to the signal to be processed, thereby eliminating the influence caused by the reference voltage signal VREF; thus, the whole absolute error caused by the offset error can be solved without introducing extra noise.
Based on the analog-to-digital conversion circuit 100, the application also provides a chip. Referring to fig. 4, fig. 4 is a schematic structural diagram of an embodiment of a chip of the present application. In this embodiment, the chip 200 may include the above-described analog-to-digital conversion circuit 100.
The chip 200 may be an ADC, or other chips integrated with the ADC. Chip 200, which may also be understood as a microcircuit, microchip, integrated circuit, etc., is a generic term for semiconductor component products. In this embodiment, the chip 200 may be a miniaturized analog-to-digital conversion circuit 100 fabricated on a semiconductor wafer surface.
Based on the analog-to-digital conversion circuit 100, the application further provides a household appliance. Referring to fig. 5, fig. 5 is a schematic structural view of an embodiment of the household appliance of the present application. In the present embodiment, the home appliance 300 may include the chip 200 including the analog-to-digital conversion circuit 100 described above. The home appliance 300 may be a refrigerator, a television, a washing machine, or other home appliances.
It is to be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application. Further, for convenience of description, only some, but not all, of the structures related to the present application are shown in the drawings. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The terms "first," "second," and the like in this disclosure are used for distinguishing between different objects and not for describing a particular sequential order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The foregoing description is only of embodiments of the present application, and is not intended to limit the scope of the application, and all equivalent structures or equivalent processes using the descriptions and the drawings of the present application or directly or indirectly applied to other related technical fields are included in the scope of the present application.
Claims (11)
1. An analog-to-digital conversion circuit, comprising:
the preprocessing module is used for receiving an input voltage signal to be converted at a first moment and storing the voltage signal to be converted; introducing a reference voltage signal at a second subsequent moment to raise the voltage signal to be converted by using the reference voltage signal to generate a preprocessed voltage signal;
The analog-to-digital conversion module is connected with the preprocessing module and is used for converting the preprocessed voltage signal into a digital processing signal;
and the processing module is connected with the analog-to-digital conversion module, and is used for carrying out calibration processing on the digital processing signals to obtain digital conversion signals corresponding to the voltage signals to be converted.
2. The analog-to-digital conversion circuit of claim 1, wherein the preprocessing module comprises:
The first end of the first switch is used for receiving an input voltage signal, wherein the input voltage signal is the input voltage signal to be converted or an input reference ground voltage signal;
the first end of the second switch is used for receiving the reference ground voltage signal, and the second end of the second switch is connected with the second end of the first switch through a first capacitor;
A third switch, wherein a first end of the third switch is connected to a first node between the first switch and the first capacitance;
A fourth switch, wherein the fourth switch is a single-pole double-throw switch, a moving end of the fourth switch is connected with a second node between the second switch and the first capacitor, a first fixed end of the fourth switch is connected with a second end of the third switch through a second capacitor, and a second fixed end of the fourth switch is connected with the reference voltage signal;
the third node between the third switch and the second capacitor is connected to the signal input end of the analog-to-digital conversion module, and the fourth node between the first motionless end of the fourth switch and the second capacitor is connected to the ground input end of the analog-to-digital conversion module.
3. The analog-to-digital conversion circuit according to claim 2, wherein at the first moment, the first switch, the second switch and the third switch are closed and turned on, a moving end of the fourth switch is connected to the first fixed end, a path from the moving end of the fourth switch to a ground input end of the analog-to-digital conversion module is turned on, the first end of the first switch receives the input voltage signal to be converted, the input voltage signal to be converted and the reference ground voltage signal are respectively transmitted to the signal input end and the ground input end of the analog-to-digital conversion module, and the voltage signal to be converted is stored in the first capacitor and the second capacitor;
At the second moment, the first switch, the second switch and the third switch are disconnected, the movable end of the fourth switch is connected to the second fixed end, a path from the movable end of the fourth switch to the reference voltage signal is conducted, and the reference voltage signal is introduced to enable the voltage signal to be converted stored in the first capacitor to be raised to a first storage voltage signal with a first level;
and at a third moment, the third switch is closed, a path between the first node and the third node is conducted, the first storage voltage signal stored by the first capacitor and lifted to a first level is utilized to charge the second capacitor, the voltage signal to be converted stored by the second capacitor is lifted, the first capacitor and the second capacitor store a second storage voltage signal of a second level, and the second storage voltage signal is input to the signal input end of the analog-to-digital conversion module as a generated preprocessed voltage signal.
4. The analog-to-digital conversion circuit of claim 2, wherein the analog-to-digital conversion circuit performs an initial calibration operation using the reference voltage signal in advance to obtain a calibration value corresponding to the reference voltage signal.
5. The analog-to-digital conversion circuit of claim 4, wherein the initial calibration operation comprises:
At a first moment of initial calibration, the first switch, the second switch and the third switch are closed and conducted, a movable end of the fourth switch is connected to the first fixed end, a path from the movable end of the fourth switch to a ground input end of the analog-to-digital conversion module is conducted, the first end of the first switch receives the input reference ground voltage signal, the reference ground voltage signal is respectively transmitted to the signal input end and the ground input end of the analog-to-digital conversion module, and the reference ground voltage signal is stored in the first capacitor and the second capacitor;
At a second moment of initial calibration, the first switch, the second switch and the third switch are disconnected, a movable end of the fourth switch is connected to the second fixed end, a path from the movable end of the fourth switch to the reference voltage signal is conducted, and the reference voltage signal stored in the first capacitor is further lifted by using the introduced reference voltage signal, so that a first initial calibration storage voltage signal is generated;
and at a third moment of initial calibration, the third switch is closed, a path between the first node and the third node is conducted, the first initial calibration storage voltage signal is utilized to charge the second capacitor, the reference ground voltage signal stored by the second capacitor is lifted, a second initial calibration storage voltage signal is generated and stored in the first capacitor and the second capacitor, the second initial calibration storage voltage signal stored in the second capacitor is used as an initial calibration voltage signal and is input to the signal input end of the analog-to-digital conversion module, and the analog-to-digital conversion module is utilized to convert the initial calibration voltage signal into a corresponding initial calibration digital signal serving as the calibration value.
6. The analog-to-digital conversion circuit of claim 5, wherein the processing module performs a calibration process on the digital processing signal according to the calibration value to obtain a digital conversion signal corresponding to the voltage signal to be converted.
7. The analog-to-digital conversion circuit of claim 2, wherein a capacitance value of the first capacitor is the same as a capacitance value of the second capacitor.
8. An analog-to-digital conversion method for use in an analog-to-digital conversion circuit according to any one of claims 1-7, wherein the analog-to-digital conversion method comprises:
Receiving an input voltage signal to be converted at a first moment, and storing the voltage signal to be converted;
Introducing a reference voltage signal at a second subsequent moment to raise the voltage signal to be converted by using the reference voltage signal to generate a preprocessed voltage signal;
converting the preprocessed voltage signal into a digital processing signal;
And performing calibration processing on the digital processing signals to obtain digital conversion signals corresponding to the voltage signals to be converted.
9. The method for analog-to-digital conversion according to claim 8, wherein performing calibration processing on the digital processing signal to obtain a digital conversion signal corresponding to the voltage signal to be converted comprises:
Acquiring a calibration value corresponding to the reference voltage signal;
and obtaining a difference value between the digital processing signal and the calibration value, wherein the difference value is used as the digital conversion signal corresponding to the voltage signal to be converted.
10. A chip comprising an analog to digital conversion circuit as claimed in any one of claims 1 to 7.
11. A household appliance, characterized in that it comprises a chip as claimed in claim 10.
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| US10090848B1 (en) * | 2018-01-14 | 2018-10-02 | Shenzhen GOODIX Technology Co., Ltd. | Data converters systematic error calibration using on chip generated precise reference signal |
| CN111175591B (en) * | 2018-11-13 | 2022-04-08 | 湖南中车时代电动汽车股份有限公司 | A signal detection circuit |
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