[go: up one dir, main page]

CN111316439A - 非挥发性存储器的制造方法 - Google Patents

非挥发性存储器的制造方法 Download PDF

Info

Publication number
CN111316439A
CN111316439A CN201780096452.6A CN201780096452A CN111316439A CN 111316439 A CN111316439 A CN 111316439A CN 201780096452 A CN201780096452 A CN 201780096452A CN 111316439 A CN111316439 A CN 111316439A
Authority
CN
China
Prior art keywords
memory
logic
manufacturing
forming
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201780096452.6A
Other languages
English (en)
Other versions
CN111316439B (zh
Inventor
宁丹
王腾锋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Analog Circuit Technology Inc
Original Assignee
Chengdu Analog Circuit Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Analog Circuit Technology Inc filed Critical Chengdu Analog Circuit Technology Inc
Publication of CN111316439A publication Critical patent/CN111316439A/zh
Application granted granted Critical
Publication of CN111316439B publication Critical patent/CN111316439B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42Simultaneous manufacture of periphery and memory cells
    • H10B41/43Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/031Manufacture or treatment of data-storage electrodes
    • H10D64/035Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10P50/264
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)

Abstract

一种非挥发性存储器的制造方法,包括步骤:在基底(50)上形成栅氧化层(60);将逻辑栅极多晶硅(10,10')通过至少两次沉积过程后,形成存储单元的叠层电容;通过蚀刻工艺移除多余的逻辑栅极多晶硅(10,10'),形成存储晶体管和外围逻辑晶体管。本发明所述方法,通过至少两次沉积形成存储晶体管的叠层电容,于标准逻辑工艺中制造出存储器,使得存储器的制造工艺更简单,与逻辑工艺兼容性好,成本低。

Description

PCT国内申请,说明书已公开。

Claims (18)

  1. PCT国内申请,权利要求书已公开。
CN201780096452.6A 2017-11-02 2017-11-02 非挥发性存储器的制造方法 Active CN111316439B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2017/109171 WO2019084883A1 (zh) 2017-11-02 2017-11-02 非挥发性存储器的制造方法

Publications (2)

Publication Number Publication Date
CN111316439A true CN111316439A (zh) 2020-06-19
CN111316439B CN111316439B (zh) 2022-10-25

Family

ID=66332758

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201780096452.6A Active CN111316439B (zh) 2017-11-02 2017-11-02 非挥发性存储器的制造方法

Country Status (4)

Country Link
US (1) US11296194B2 (zh)
CN (1) CN111316439B (zh)
TW (1) TWI689083B (zh)
WO (1) WO2019084883A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116454088A (zh) * 2023-06-12 2023-07-18 成都锐成芯微科技股份有限公司 系统级芯片及其制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101127329A (zh) * 2006-08-17 2008-02-20 海力士半导体有限公司 快闪存储器件及其制造方法
CN101685820A (zh) * 2008-09-23 2010-03-31 力晶半导体股份有限公司 存储器元件及其制造方法、半导体元件
US20150084110A1 (en) * 2013-09-24 2015-03-26 Semiconductor Manufacturing International (Beijing) Corporation Flash memory and fabrication method thereof
CN106356374A (zh) * 2015-07-13 2017-01-25 中芯国际集成电路制造(上海)有限公司 快闪存储器及其制作方法
CN106653758A (zh) * 2015-10-28 2017-05-10 中芯国际集成电路制造(上海)有限公司 快闪存储器的制作方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100647482B1 (ko) * 2004-09-16 2006-11-23 삼성전자주식회사 반도체 장치 및 그 제조 방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101127329A (zh) * 2006-08-17 2008-02-20 海力士半导体有限公司 快闪存储器件及其制造方法
CN101685820A (zh) * 2008-09-23 2010-03-31 力晶半导体股份有限公司 存储器元件及其制造方法、半导体元件
US20150084110A1 (en) * 2013-09-24 2015-03-26 Semiconductor Manufacturing International (Beijing) Corporation Flash memory and fabrication method thereof
CN106356374A (zh) * 2015-07-13 2017-01-25 中芯国际集成电路制造(上海)有限公司 快闪存储器及其制作方法
CN106653758A (zh) * 2015-10-28 2017-05-10 中芯国际集成电路制造(上海)有限公司 快闪存储器的制作方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116454088A (zh) * 2023-06-12 2023-07-18 成都锐成芯微科技股份有限公司 系统级芯片及其制备方法
CN116454088B (zh) * 2023-06-12 2023-09-15 成都锐成芯微科技股份有限公司 系统级芯片及其制备方法

Also Published As

Publication number Publication date
TW201933582A (zh) 2019-08-16
WO2019084883A1 (zh) 2019-05-09
US20200243653A1 (en) 2020-07-30
US11296194B2 (en) 2022-04-05
CN111316439B (zh) 2022-10-25
TWI689083B (zh) 2020-03-21

Similar Documents

Publication Publication Date Title
TWI664665B (zh) 金屬浮動閘極合成三維反及型記憶體裝置與相關聯方法
WO2015119893A3 (en) Method of fabricating a charge-trapping gate stack using a cmos process flow
CN106030802B (zh) 在3d nand存储器结构和相关设备中的隧道氧化层形成的方法
CN103794565A (zh) 逻辑晶体管和非易失性存储器的制造方法
CN111684605A (zh) 半导体装置及其制造方法
JP2014204041A5 (zh)
CN107204337A (zh) 半导体存储装置及其制造方法
JP2009033141A5 (zh)
JP2017139308A5 (zh)
CN104538363A (zh) Sonos闪存存储器的结构及制造方法
CN111316439A (zh) 非挥发性存储器的制造方法
JP2015164185A5 (zh)
JP2014157893A5 (zh)
CN102709230A (zh) 一种形成半导体通孔的方法
CN104167392B (zh) 三维nand存储器的制造方法
KR101454365B1 (ko) 내장된 플래시 메모리
CN103855095B (zh) 一种半导体器件的制造方法
CN104183471B (zh) 一种半导体器件的制造方法
CN102938419B (zh) 一种自对准硅化物晶体管及其制造方法
CN106033706A (zh) 半导体元件及其制造方法
CN105047549A (zh) 利用冗余硅工艺降低高k金属栅器件阈值电压波动的方法
US20150372003A1 (en) Nonvolatile semiconductor memory device and method for manufacturing same
CN102437175B (zh) 单一厚度栅氧层实现多级工作电压半导体器件及制备方法
CN103903968B (zh) 一种半导体器件及其制造方法
CN108615678A (zh) 一种形成浮栅的方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant